1/* 2 * Low-level system-call handling, trap handlers and context-switching 3 * 4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> 5 * Copyright (C) 2008-2009 PetaLogix 6 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> 7 * Copyright (C) 2001,2002 NEC Corporation 8 * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> 9 * 10 * This file is subject to the terms and conditions of the GNU General 11 * Public License. See the file COPYING in the main directory of this 12 * archive for more details. 13 * 14 * Written by Miles Bader <miles@gnu.org> 15 * Heavily modified by John Williams for Microblaze 16 */ 17 18#include <linux/sys.h> 19#include <linux/linkage.h> 20 21#include <asm/entry.h> 22#include <asm/current.h> 23#include <asm/processor.h> 24#include <asm/exceptions.h> 25#include <asm/asm-offsets.h> 26#include <asm/thread_info.h> 27 28#include <asm/page.h> 29#include <asm/unistd.h> 30 31#include <linux/errno.h> 32#include <asm/signal.h> 33 34#undef DEBUG 35 36/* The size of a state save frame. */ 37#define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE) 38 39/* The offset of the struct pt_regs in a `state save frame' on the stack. */ 40#define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */ 41 42#define C_ENTRY(name) .globl name; .align 4; name 43 44/* 45 * Various ways of setting and clearing BIP in flags reg. 46 * This is mucky, but necessary using microblaze version that 47 * allows msr ops to write to BIP 48 */ 49#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR 50 .macro clear_bip 51 msrclr r0, MSR_BIP 52 .endm 53 54 .macro set_bip 55 msrset r0, MSR_BIP 56 .endm 57 58 .macro clear_eip 59 msrclr r0, MSR_EIP 60 .endm 61 62 .macro set_ee 63 msrset r0, MSR_EE 64 .endm 65 66 .macro disable_irq 67 msrclr r0, MSR_IE 68 .endm 69 70 .macro enable_irq 71 msrset r0, MSR_IE 72 .endm 73 74 .macro set_ums 75 msrset r0, MSR_UMS 76 msrclr r0, MSR_VMS 77 .endm 78 79 .macro set_vms 80 msrclr r0, MSR_UMS 81 msrset r0, MSR_VMS 82 .endm 83 84 .macro clear_ums 85 msrclr r0, MSR_UMS 86 .endm 87 88 .macro clear_vms_ums 89 msrclr r0, MSR_VMS | MSR_UMS 90 .endm 91#else 92 .macro clear_bip 93 mfs r11, rmsr 94 andi r11, r11, ~MSR_BIP 95 mts rmsr, r11 96 .endm 97 98 .macro set_bip 99 mfs r11, rmsr 100 ori r11, r11, MSR_BIP 101 mts rmsr, r11 102 .endm 103 104 .macro clear_eip 105 mfs r11, rmsr 106 andi r11, r11, ~MSR_EIP 107 mts rmsr, r11 108 .endm 109 110 .macro set_ee 111 mfs r11, rmsr 112 ori r11, r11, MSR_EE 113 mts rmsr, r11 114 .endm 115 116 .macro disable_irq 117 mfs r11, rmsr 118 andi r11, r11, ~MSR_IE 119 mts rmsr, r11 120 .endm 121 122 .macro enable_irq 123 mfs r11, rmsr 124 ori r11, r11, MSR_IE 125 mts rmsr, r11 126 .endm 127 128 .macro set_ums 129 mfs r11, rmsr 130 ori r11, r11, MSR_VMS 131 andni r11, r11, MSR_UMS 132 mts rmsr, r11 133 .endm 134 135 .macro set_vms 136 mfs r11, rmsr 137 ori r11, r11, MSR_VMS 138 andni r11, r11, MSR_UMS 139 mts rmsr, r11 140 .endm 141 142 .macro clear_ums 143 mfs r11, rmsr 144 andni r11, r11, MSR_UMS 145 mts rmsr,r11 146 .endm 147 148 .macro clear_vms_ums 149 mfs r11, rmsr 150 andni r11, r11, (MSR_VMS|MSR_UMS) 151 mts rmsr,r11 152 .endm 153#endif 154 155/* Define how to call high-level functions. With MMU, virtual mode must be 156 * enabled when calling the high-level function. Clobbers R11. 157 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL 158 */ 159 160/* turn on virtual protected mode save */ 161#define VM_ON \ 162 set_ums; \ 163 rted r0, 2f; \ 164 nop; \ 1652: 166 167/* turn off virtual protected mode save and user mode save*/ 168#define VM_OFF \ 169 clear_vms_ums; \ 170 rted r0, TOPHYS(1f); \ 171 nop; \ 1721: 173 174#define SAVE_REGS \ 175 swi r2, r1, PTO+PT_R2; /* Save SDA */ \ 176 swi r3, r1, PTO+PT_R3; \ 177 swi r4, r1, PTO+PT_R4; \ 178 swi r5, r1, PTO+PT_R5; \ 179 swi r6, r1, PTO+PT_R6; \ 180 swi r7, r1, PTO+PT_R7; \ 181 swi r8, r1, PTO+PT_R8; \ 182 swi r9, r1, PTO+PT_R9; \ 183 swi r10, r1, PTO+PT_R10; \ 184 swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\ 185 swi r12, r1, PTO+PT_R12; \ 186 swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \ 187 swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \ 188 swi r15, r1, PTO+PT_R15; /* Save LP */ \ 189 swi r16, r1, PTO+PT_R16; \ 190 swi r17, r1, PTO+PT_R17; \ 191 swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \ 192 swi r19, r1, PTO+PT_R19; \ 193 swi r20, r1, PTO+PT_R20; \ 194 swi r21, r1, PTO+PT_R21; \ 195 swi r22, r1, PTO+PT_R22; \ 196 swi r23, r1, PTO+PT_R23; \ 197 swi r24, r1, PTO+PT_R24; \ 198 swi r25, r1, PTO+PT_R25; \ 199 swi r26, r1, PTO+PT_R26; \ 200 swi r27, r1, PTO+PT_R27; \ 201 swi r28, r1, PTO+PT_R28; \ 202 swi r29, r1, PTO+PT_R29; \ 203 swi r30, r1, PTO+PT_R30; \ 204 swi r31, r1, PTO+PT_R31; /* Save current task reg */ \ 205 mfs r11, rmsr; /* save MSR */ \ 206 swi r11, r1, PTO+PT_MSR; 207 208#define RESTORE_REGS \ 209 lwi r11, r1, PTO+PT_MSR; \ 210 mts rmsr , r11; \ 211 lwi r2, r1, PTO+PT_R2; /* restore SDA */ \ 212 lwi r3, r1, PTO+PT_R3; \ 213 lwi r4, r1, PTO+PT_R4; \ 214 lwi r5, r1, PTO+PT_R5; \ 215 lwi r6, r1, PTO+PT_R6; \ 216 lwi r7, r1, PTO+PT_R7; \ 217 lwi r8, r1, PTO+PT_R8; \ 218 lwi r9, r1, PTO+PT_R9; \ 219 lwi r10, r1, PTO+PT_R10; \ 220 lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\ 221 lwi r12, r1, PTO+PT_R12; \ 222 lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \ 223 lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ 224 lwi r15, r1, PTO+PT_R15; /* restore LP */ \ 225 lwi r16, r1, PTO+PT_R16; \ 226 lwi r17, r1, PTO+PT_R17; \ 227 lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \ 228 lwi r19, r1, PTO+PT_R19; \ 229 lwi r20, r1, PTO+PT_R20; \ 230 lwi r21, r1, PTO+PT_R21; \ 231 lwi r22, r1, PTO+PT_R22; \ 232 lwi r23, r1, PTO+PT_R23; \ 233 lwi r24, r1, PTO+PT_R24; \ 234 lwi r25, r1, PTO+PT_R25; \ 235 lwi r26, r1, PTO+PT_R26; \ 236 lwi r27, r1, PTO+PT_R27; \ 237 lwi r28, r1, PTO+PT_R28; \ 238 lwi r29, r1, PTO+PT_R29; \ 239 lwi r30, r1, PTO+PT_R30; \ 240 lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */ 241 242#define SAVE_STATE \ 243 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ 244 /* See if already in kernel mode.*/ \ 245 mfs r1, rmsr; \ 246 andi r1, r1, MSR_UMS; \ 247 bnei r1, 1f; \ 248 /* Kernel-mode state save. */ \ 249 /* Reload kernel stack-ptr. */ \ 250 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ 251 /* FIXME: I can add these two lines to one */ \ 252 /* tophys(r1,r1); */ \ 253 /* addik r1, r1, -STATE_SAVE_SIZE; */ \ 254 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \ 255 SAVE_REGS \ 256 brid 2f; \ 257 swi r1, r1, PTO+PT_MODE; \ 2581: /* User-mode state save. */ \ 259 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ 260 tophys(r1,r1); \ 261 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \ 262 /* MS these three instructions can be added to one */ \ 263 /* addik r1, r1, THREAD_SIZE; */ \ 264 /* tophys(r1,r1); */ \ 265 /* addik r1, r1, -STATE_SAVE_SIZE; */ \ 266 addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \ 267 SAVE_REGS \ 268 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ 269 swi r11, r1, PTO+PT_R1; /* Store user SP. */ \ 270 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ \ 271 /* MS: I am clearing UMS even in case when I come from kernel space */ \ 272 clear_ums; \ 2732: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 274 275.text 276 277/* 278 * User trap. 279 * 280 * System calls are handled here. 281 * 282 * Syscall protocol: 283 * Syscall number in r12, args in r5-r10 284 * Return value in r3 285 * 286 * Trap entered via brki instruction, so BIP bit is set, and interrupts 287 * are masked. This is nice, means we don't have to CLI before state save 288 */ 289C_ENTRY(_user_exception): 290 addi r14, r14, 4 /* return address is 4 byte after call */ 291 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ 292 293 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ 294 tophys(r1,r1); 295 lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */ 296 /* MS these three instructions can be added to one */ 297 /* addik r1, r1, THREAD_SIZE; */ 298 /* tophys(r1,r1); */ 299 /* addik r1, r1, -STATE_SAVE_SIZE; */ 300 addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; 301 SAVE_REGS 302 swi r0, r1, PTO + PT_R3 303 swi r0, r1, PTO + PT_R4 304 305 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 306 swi r11, r1, PTO+PT_R1; /* Store user SP. */ 307 clear_ums; 308 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 309 /* Save away the syscall number. */ 310 swi r12, r1, PTO+PT_R0; 311 tovirt(r1,r1) 312 313/* where the trap should return need -8 to adjust for rtsd r15, 8*/ 314/* Jump to the appropriate function for the system call number in r12 315 * (r12 is not preserved), or return an error if r12 is not valid. The LP 316 * register should point to the location where 317 * the called function should return. [note that MAKE_SYS_CALL uses label 1] */ 318 319 /* Step into virtual mode */ 320 rtbd r0, 3f 321 nop 3223: 323 lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */ 324 lwi r11, r11, TI_FLAGS /* get flags in thread info */ 325 andi r11, r11, _TIF_WORK_SYSCALL_MASK 326 beqi r11, 4f 327 328 addik r3, r0, -ENOSYS 329 swi r3, r1, PTO + PT_R3 330 brlid r15, do_syscall_trace_enter 331 addik r5, r1, PTO + PT_R0 332 333 # do_syscall_trace_enter returns the new syscall nr. 334 addk r12, r0, r3 335 lwi r5, r1, PTO+PT_R5; 336 lwi r6, r1, PTO+PT_R6; 337 lwi r7, r1, PTO+PT_R7; 338 lwi r8, r1, PTO+PT_R8; 339 lwi r9, r1, PTO+PT_R9; 340 lwi r10, r1, PTO+PT_R10; 3414: 342/* Jump to the appropriate function for the system call number in r12 343 * (r12 is not preserved), or return an error if r12 is not valid. 344 * The LP register should point to the location where the called function 345 * should return. [note that MAKE_SYS_CALL uses label 1] */ 346 /* See if the system call number is valid */ 347 addi r11, r12, -__NR_syscalls; 348 bgei r11,5f; 349 /* Figure out which function to use for this system call. */ 350 /* Note Microblaze barrel shift is optional, so don't rely on it */ 351 add r12, r12, r12; /* convert num -> ptr */ 352 add r12, r12, r12; 353 354#ifdef DEBUG 355 /* Trac syscalls and stored them to r0_ram */ 356 lwi r3, r12, 0x400 + r0_ram 357 addi r3, r3, 1 358 swi r3, r12, 0x400 + r0_ram 359#endif 360 361 # Find and jump into the syscall handler. 362 lwi r12, r12, sys_call_table 363 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 364 addi r15, r0, ret_from_trap-8 365 bra r12 366 367 /* The syscall number is invalid, return an error. */ 3685: 369 rtsd r15, 8; /* looks like a normal subroutine return */ 370 addi r3, r0, -ENOSYS; 371 372/* Entry point used to return from a syscall/trap */ 373/* We re-enable BIP bit before state restore */ 374C_ENTRY(ret_from_trap): 375 swi r3, r1, PTO + PT_R3 376 swi r4, r1, PTO + PT_R4 377 378 /* We're returning to user mode, so check for various conditions that 379 * trigger rescheduling. */ 380 /* FIXME: Restructure all these flag checks. */ 381 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 382 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 383 andi r11, r11, _TIF_WORK_SYSCALL_MASK 384 beqi r11, 1f 385 386 brlid r15, do_syscall_trace_leave 387 addik r5, r1, PTO + PT_R0 3881: 389 /* We're returning to user mode, so check for various conditions that 390 * trigger rescheduling. */ 391 /* get thread info from current task */ 392 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 393 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 394 andi r11, r11, _TIF_NEED_RESCHED; 395 beqi r11, 5f; 396 397 bralid r15, schedule; /* Call scheduler */ 398 nop; /* delay slot */ 399 400 /* Maybe handle a signal */ 4015: /* get thread info from current task*/ 402 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 403 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 404 andi r11, r11, _TIF_SIGPENDING; 405 beqi r11, 1f; /* Signals to handle, handle them */ 406 407 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 408 addi r7, r0, 1; /* Arg 3: int in_syscall */ 409 bralid r15, do_signal; /* Handle any signals */ 410 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 411 412/* Finally, return to user state. */ 4131: set_bip; /* Ints masked for state restore */ 414 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ 415 VM_OFF; 416 tophys(r1,r1); 417 RESTORE_REGS; 418 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 419 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ 420TRAP_return: /* Make global symbol for debugging */ 421 rtbd r14, 0; /* Instructions to return from an IRQ */ 422 nop; 423 424 425/* These syscalls need access to the struct pt_regs on the stack, so we 426 implement them in assembly (they're basically all wrappers anyway). */ 427 428C_ENTRY(sys_fork_wrapper): 429 addi r5, r0, SIGCHLD /* Arg 0: flags */ 430 lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */ 431 addik r7, r1, PTO /* Arg 2: parent context */ 432 add r8. r0, r0 /* Arg 3: (unused) */ 433 add r9, r0, r0; /* Arg 4: (unused) */ 434 brid do_fork /* Do real work (tail-call) */ 435 add r10, r0, r0; /* Arg 5: (unused) */ 436 437/* This the initial entry point for a new child thread, with an appropriate 438 stack in place that makes it look the the child is in the middle of an 439 syscall. This function is actually `returned to' from switch_thread 440 (copy_thread makes ret_from_fork the return address in each new thread's 441 saved context). */ 442C_ENTRY(ret_from_fork): 443 bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ 444 add r3, r5, r0; /* switch_thread returns the prev task */ 445 /* ( in the delay slot ) */ 446 brid ret_from_trap; /* Do normal trap return */ 447 add r3, r0, r0; /* Child's fork call should return 0. */ 448 449C_ENTRY(sys_vfork): 450 brid microblaze_vfork /* Do real work (tail-call) */ 451 addik r5, r1, PTO 452 453C_ENTRY(sys_clone): 454 bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ 455 lwi r6, r1, PTO + PT_R1; /* If so, use paret's stack ptr */ 4561: addik r7, r1, PTO; /* Arg 2: parent context */ 457 add r8, r0, r0; /* Arg 3: (unused) */ 458 add r9, r0, r0; /* Arg 4: (unused) */ 459 brid do_fork /* Do real work (tail-call) */ 460 add r10, r0, r0; /* Arg 5: (unused) */ 461 462C_ENTRY(sys_execve): 463 brid microblaze_execve; /* Do real work (tail-call).*/ 464 addik r8, r1, PTO; /* add user context as 4th arg */ 465 466C_ENTRY(sys_rt_sigreturn_wrapper): 467 brid sys_rt_sigreturn /* Do real work */ 468 addik r5, r1, PTO; /* add user context as 1st arg */ 469 470/* 471 * HW EXCEPTION rutine start 472 */ 473C_ENTRY(full_exception_trap): 474 /* adjust exception address for privileged instruction 475 * for finding where is it */ 476 addik r17, r17, -4 477 SAVE_STATE /* Save registers */ 478 /* PC, before IRQ/trap - this is one instruction above */ 479 swi r17, r1, PTO+PT_PC; 480 tovirt(r1,r1) 481 /* FIXME this can be store directly in PT_ESR reg. 482 * I tested it but there is a fault */ 483 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 484 addik r15, r0, ret_from_exc - 8 485 mfs r6, resr 486 mfs r7, rfsr; /* save FSR */ 487 mts rfsr, r0; /* Clear sticky fsr */ 488 rted r0, full_exception 489 addik r5, r1, PTO /* parameter struct pt_regs * regs */ 490 491/* 492 * Unaligned data trap. 493 * 494 * Unaligned data trap last on 4k page is handled here. 495 * 496 * Trap entered via exception, so EE bit is set, and interrupts 497 * are masked. This is nice, means we don't have to CLI before state save 498 * 499 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S" 500 */ 501C_ENTRY(unaligned_data_trap): 502 /* MS: I have to save r11 value and then restore it because 503 * set_bit, clear_eip, set_ee use r11 as temp register if MSR 504 * instructions are not used. We don't need to do if MSR instructions 505 * are used and they use r0 instead of r11. 506 * I am using ENTRY_SP which should be primary used only for stack 507 * pointer saving. */ 508 swi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 509 set_bip; /* equalize initial state for all possible entries */ 510 clear_eip; 511 set_ee; 512 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 513 SAVE_STATE /* Save registers.*/ 514 /* PC, before IRQ/trap - this is one instruction above */ 515 swi r17, r1, PTO+PT_PC; 516 tovirt(r1,r1) 517 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 518 addik r15, r0, ret_from_exc-8 519 mfs r3, resr /* ESR */ 520 mfs r4, rear /* EAR */ 521 rtbd r0, _unaligned_data_exception 522 addik r7, r1, PTO /* parameter struct pt_regs * regs */ 523 524/* 525 * Page fault traps. 526 * 527 * If the real exception handler (from hw_exception_handler.S) didn't find 528 * the mapping for the process, then we're thrown here to handle such situation. 529 * 530 * Trap entered via exceptions, so EE bit is set, and interrupts 531 * are masked. This is nice, means we don't have to CLI before state save 532 * 533 * Build a standard exception frame for TLB Access errors. All TLB exceptions 534 * will bail out to this point if they can't resolve the lightweight TLB fault. 535 * 536 * The C function called is in "arch/microblaze/mm/fault.c", declared as: 537 * void do_page_fault(struct pt_regs *regs, 538 * unsigned long address, 539 * unsigned long error_code) 540 */ 541/* data and intruction trap - which is choose is resolved int fault.c */ 542C_ENTRY(page_fault_data_trap): 543 SAVE_STATE /* Save registers.*/ 544 /* PC, before IRQ/trap - this is one instruction above */ 545 swi r17, r1, PTO+PT_PC; 546 tovirt(r1,r1) 547 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 548 addik r15, r0, ret_from_exc-8 549 mfs r6, rear /* parameter unsigned long address */ 550 mfs r7, resr /* parameter unsigned long error_code */ 551 rted r0, do_page_fault 552 addik r5, r1, PTO /* parameter struct pt_regs * regs */ 553 554C_ENTRY(page_fault_instr_trap): 555 SAVE_STATE /* Save registers.*/ 556 /* PC, before IRQ/trap - this is one instruction above */ 557 swi r17, r1, PTO+PT_PC; 558 tovirt(r1,r1) 559 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 560 addik r15, r0, ret_from_exc-8 561 mfs r6, rear /* parameter unsigned long address */ 562 ori r7, r0, 0 /* parameter unsigned long error_code */ 563 rted r0, do_page_fault 564 addik r5, r1, PTO /* parameter struct pt_regs * regs */ 565 566/* Entry point used to return from an exception. */ 567C_ENTRY(ret_from_exc): 568 lwi r11, r1, PTO + PT_MODE; 569 bnei r11, 2f; /* See if returning to kernel mode, */ 570 /* ... if so, skip resched &c. */ 571 572 /* We're returning to user mode, so check for various conditions that 573 trigger rescheduling. */ 574 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 575 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 576 andi r11, r11, _TIF_NEED_RESCHED; 577 beqi r11, 5f; 578 579/* Call the scheduler before returning from a syscall/trap. */ 580 bralid r15, schedule; /* Call scheduler */ 581 nop; /* delay slot */ 582 583 /* Maybe handle a signal */ 5845: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 585 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 586 andi r11, r11, _TIF_SIGPENDING; 587 beqi r11, 1f; /* Signals to handle, handle them */ 588 589 /* 590 * Handle a signal return; Pending signals should be in r18. 591 * 592 * Not all registers are saved by the normal trap/interrupt entry 593 * points (for instance, call-saved registers (because the normal 594 * C-compiler calling sequence in the kernel makes sure they're 595 * preserved), and call-clobbered registers in the case of 596 * traps), but signal handlers may want to examine or change the 597 * complete register state. Here we save anything not saved by 598 * the normal entry sequence, so that it may be safely restored 599 * (in a possibly modified form) after do_signal returns. */ 600 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 601 addi r7, r0, 0; /* Arg 3: int in_syscall */ 602 bralid r15, do_signal; /* Handle any signals */ 603 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 604 605/* Finally, return to user state. */ 6061: set_bip; /* Ints masked for state restore */ 607 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ 608 VM_OFF; 609 tophys(r1,r1); 610 611 RESTORE_REGS; 612 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 613 614 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ 615 bri 6f; 616/* Return to kernel state. */ 6172: set_bip; /* Ints masked for state restore */ 618 VM_OFF; 619 tophys(r1,r1); 620 RESTORE_REGS; 621 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */ 622 623 tovirt(r1,r1); 6246: 625EXC_return: /* Make global symbol for debugging */ 626 rtbd r14, 0; /* Instructions to return from an IRQ */ 627 nop; 628 629/* 630 * HW EXCEPTION rutine end 631 */ 632 633/* 634 * Hardware maskable interrupts. 635 * 636 * The stack-pointer (r1) should have already been saved to the memory 637 * location PER_CPU(ENTRY_SP). 638 */ 639C_ENTRY(_interrupt): 640/* MS: we are in physical address */ 641/* Save registers, switch to proper stack, convert SP to virtual.*/ 642 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) 643 /* MS: See if already in kernel mode. */ 644 mfs r1, rmsr 645 nop 646 andi r1, r1, MSR_UMS 647 bnei r1, 1f 648 649/* Kernel-mode state save. */ 650 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) 651 tophys(r1,r1); /* MS: I have in r1 physical address where stack is */ 652 /* save registers */ 653/* MS: Make room on the stack -> activation record */ 654 addik r1, r1, -STATE_SAVE_SIZE; 655 SAVE_REGS 656 brid 2f; 657 swi r1, r1, PTO + PT_MODE; /* 0 - user mode, 1 - kernel mode */ 6581: 659/* User-mode state save. */ 660 /* MS: get the saved current */ 661 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 662 tophys(r1,r1); 663 lwi r1, r1, TS_THREAD_INFO; 664 addik r1, r1, THREAD_SIZE; 665 tophys(r1,r1); 666 /* save registers */ 667 addik r1, r1, -STATE_SAVE_SIZE; 668 SAVE_REGS 669 /* calculate mode */ 670 swi r0, r1, PTO + PT_MODE; 671 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 672 swi r11, r1, PTO+PT_R1; 673 clear_ums; 6742: 675 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 676 tovirt(r1,r1) 677 addik r15, r0, irq_call; 678irq_call:rtbd r0, do_IRQ; 679 addik r5, r1, PTO; 680 681/* MS: we are in virtual mode */ 682ret_from_irq: 683 lwi r11, r1, PTO + PT_MODE; 684 bnei r11, 2f; 685 686 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 687 lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */ 688 andi r11, r11, _TIF_NEED_RESCHED; 689 beqi r11, 5f 690 bralid r15, schedule; 691 nop; /* delay slot */ 692 693 /* Maybe handle a signal */ 6945: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */ 695 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 696 andi r11, r11, _TIF_SIGPENDING; 697 beqid r11, no_intr_resched 698/* Handle a signal return; Pending signals should be in r18. */ 699 addi r7, r0, 0; /* Arg 3: int in_syscall */ 700 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 701 bralid r15, do_signal; /* Handle any signals */ 702 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 703 704/* Finally, return to user state. */ 705no_intr_resched: 706 /* Disable interrupts, we are now committed to the state restore */ 707 disable_irq 708 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); 709 VM_OFF; 710 tophys(r1,r1); 711 RESTORE_REGS 712 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ 713 lwi r1, r1, PT_R1 - PT_SIZE; 714 bri 6f; 715/* MS: Return to kernel state. */ 7162: 717#ifdef CONFIG_PREEMPT 718 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 719 /* MS: get preempt_count from thread info */ 720 lwi r5, r11, TI_PREEMPT_COUNT; 721 bgti r5, restore; 722 723 lwi r5, r11, TI_FLAGS; /* get flags in thread info */ 724 andi r5, r5, _TIF_NEED_RESCHED; 725 beqi r5, restore /* if zero jump over */ 726 727preempt: 728 /* interrupts are off that's why I am calling preempt_chedule_irq */ 729 bralid r15, preempt_schedule_irq 730 nop 731 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 732 lwi r5, r11, TI_FLAGS; /* get flags in thread info */ 733 andi r5, r5, _TIF_NEED_RESCHED; 734 bnei r5, preempt /* if non zero jump to resched */ 735restore: 736#endif 737 VM_OFF /* MS: turn off MMU */ 738 tophys(r1,r1) 739 RESTORE_REGS 740 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */ 741 tovirt(r1,r1); 7426: 743IRQ_return: /* MS: Make global symbol for debugging */ 744 rtid r14, 0 745 nop 746 747/* 748 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18 749 * and call handling function with saved pt_regs 750 */ 751C_ENTRY(_debug_exception): 752 /* BIP bit is set on entry, no interrupts can occur */ 753 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) 754 755 mfs r1, rmsr 756 nop 757 andi r1, r1, MSR_UMS 758 bnei r1, 1f 759/* MS: Kernel-mode state save - kgdb */ 760 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ 761 762 /* BIP bit is set on entry, no interrupts can occur */ 763 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; 764 SAVE_REGS; 765 /* save all regs to pt_reg structure */ 766 swi r0, r1, PTO+PT_R0; /* R0 must be saved too */ 767 swi r14, r1, PTO+PT_R14 /* rewrite saved R14 value */ 768 swi r16, r1, PTO+PT_PC; /* PC and r16 are the same */ 769 /* save special purpose registers to pt_regs */ 770 mfs r11, rear; 771 swi r11, r1, PTO+PT_EAR; 772 mfs r11, resr; 773 swi r11, r1, PTO+PT_ESR; 774 mfs r11, rfsr; 775 swi r11, r1, PTO+PT_FSR; 776 777 /* stack pointer is in physical address at it is decrease 778 * by STATE_SAVE_SIZE but we need to get correct R1 value */ 779 addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + STATE_SAVE_SIZE; 780 swi r11, r1, PTO+PT_R1 781 /* MS: r31 - current pointer isn't changed */ 782 tovirt(r1,r1) 783#ifdef CONFIG_KGDB 784 addi r5, r1, PTO /* pass pt_reg address as the first arg */ 785 la r15, r0, dbtrap_call; /* return address */ 786 rtbd r0, microblaze_kgdb_break 787 nop; 788#endif 789 /* MS: Place handler for brki from kernel space if KGDB is OFF. 790 * It is very unlikely that another brki instruction is called. */ 791 bri 0 792 793/* MS: User-mode state save - gdb */ 7941: lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ 795 tophys(r1,r1); 796 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ 797 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ 798 tophys(r1,r1); 799 800 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */ 801 SAVE_REGS; 802 swi r16, r1, PTO+PT_PC; /* Save LP */ 803 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ 804 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 805 swi r11, r1, PTO+PT_R1; /* Store user SP. */ 806 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 807 tovirt(r1,r1) 808 set_vms; 809 addik r5, r1, PTO; 810 addik r15, r0, dbtrap_call; 811dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */ 812 rtbd r0, sw_exception 813 nop 814 815 /* MS: The first instruction for the second part of the gdb/kgdb */ 816 set_bip; /* Ints masked for state restore */ 817 lwi r11, r1, PTO + PT_MODE; 818 bnei r11, 2f; 819/* MS: Return to user space - gdb */ 820 /* Get current task ptr into r11 */ 821 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 822 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 823 andi r11, r11, _TIF_NEED_RESCHED; 824 beqi r11, 5f; 825 826 /* Call the scheduler before returning from a syscall/trap. */ 827 bralid r15, schedule; /* Call scheduler */ 828 nop; /* delay slot */ 829 830 /* Maybe handle a signal */ 8315: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 832 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 833 andi r11, r11, _TIF_SIGPENDING; 834 beqi r11, 1f; /* Signals to handle, handle them */ 835 836 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */ 837 addi r7, r0, 0; /* Arg 3: int in_syscall */ 838 bralid r15, do_signal; /* Handle any signals */ 839 add r6, r0, r0; /* Arg 2: sigset_t *oldset */ 840 841/* Finally, return to user state. */ 8421: swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ 843 VM_OFF; 844 tophys(r1,r1); 845 /* MS: Restore all regs */ 846 RESTORE_REGS 847 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space */ 848 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */ 849DBTRAP_return_user: /* MS: Make global symbol for debugging */ 850 rtbd r16, 0; /* MS: Instructions to return from a debug trap */ 851 nop; 852 853/* MS: Return to kernel state - kgdb */ 8542: VM_OFF; 855 tophys(r1,r1); 856 /* MS: Restore all regs */ 857 RESTORE_REGS 858 lwi r14, r1, PTO+PT_R14; 859 lwi r16, r1, PTO+PT_PC; 860 addik r1, r1, STATE_SAVE_SIZE; /* MS: Clean up stack space */ 861 tovirt(r1,r1); 862DBTRAP_return_kernel: /* MS: Make global symbol for debugging */ 863 rtbd r16, 0; /* MS: Instructions to return from a debug trap */ 864 nop; 865 866 867ENTRY(_switch_to) 868 /* prepare return value */ 869 addk r3, r0, CURRENT_TASK 870 871 /* save registers in cpu_context */ 872 /* use r11 and r12, volatile registers, as temp register */ 873 /* give start of cpu_context for previous process */ 874 addik r11, r5, TI_CPU_CONTEXT 875 swi r1, r11, CC_R1 876 swi r2, r11, CC_R2 877 /* skip volatile registers. 878 * they are saved on stack when we jumped to _switch_to() */ 879 /* dedicated registers */ 880 swi r13, r11, CC_R13 881 swi r14, r11, CC_R14 882 swi r15, r11, CC_R15 883 swi r16, r11, CC_R16 884 swi r17, r11, CC_R17 885 swi r18, r11, CC_R18 886 /* save non-volatile registers */ 887 swi r19, r11, CC_R19 888 swi r20, r11, CC_R20 889 swi r21, r11, CC_R21 890 swi r22, r11, CC_R22 891 swi r23, r11, CC_R23 892 swi r24, r11, CC_R24 893 swi r25, r11, CC_R25 894 swi r26, r11, CC_R26 895 swi r27, r11, CC_R27 896 swi r28, r11, CC_R28 897 swi r29, r11, CC_R29 898 swi r30, r11, CC_R30 899 /* special purpose registers */ 900 mfs r12, rmsr 901 swi r12, r11, CC_MSR 902 mfs r12, rear 903 swi r12, r11, CC_EAR 904 mfs r12, resr 905 swi r12, r11, CC_ESR 906 mfs r12, rfsr 907 swi r12, r11, CC_FSR 908 909 /* update r31, the current-give me pointer to task which will be next */ 910 lwi CURRENT_TASK, r6, TI_TASK 911 /* stored it to current_save too */ 912 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE) 913 914 /* get new process' cpu context and restore */ 915 /* give me start where start context of next task */ 916 addik r11, r6, TI_CPU_CONTEXT 917 918 /* non-volatile registers */ 919 lwi r30, r11, CC_R30 920 lwi r29, r11, CC_R29 921 lwi r28, r11, CC_R28 922 lwi r27, r11, CC_R27 923 lwi r26, r11, CC_R26 924 lwi r25, r11, CC_R25 925 lwi r24, r11, CC_R24 926 lwi r23, r11, CC_R23 927 lwi r22, r11, CC_R22 928 lwi r21, r11, CC_R21 929 lwi r20, r11, CC_R20 930 lwi r19, r11, CC_R19 931 /* dedicated registers */ 932 lwi r18, r11, CC_R18 933 lwi r17, r11, CC_R17 934 lwi r16, r11, CC_R16 935 lwi r15, r11, CC_R15 936 lwi r14, r11, CC_R14 937 lwi r13, r11, CC_R13 938 /* skip volatile registers */ 939 lwi r2, r11, CC_R2 940 lwi r1, r11, CC_R1 941 942 /* special purpose registers */ 943 lwi r12, r11, CC_FSR 944 mts rfsr, r12 945 lwi r12, r11, CC_MSR 946 mts rmsr, r12 947 948 rtsd r15, 8 949 nop 950 951ENTRY(_reset) 952 brai 0x70; /* Jump back to FS-boot */ 953 954 /* These are compiled and loaded into high memory, then 955 * copied into place in mach_early_setup */ 956 .section .init.ivt, "ax" 957 .org 0x0 958 /* this is very important - here is the reset vector */ 959 /* in current MMU branch you don't care what is here - it is 960 * used from bootloader site - but this is correct for FS-BOOT */ 961 brai 0x70 962 nop 963 brai TOPHYS(_user_exception); /* syscall handler */ 964 brai TOPHYS(_interrupt); /* Interrupt handler */ 965 brai TOPHYS(_debug_exception); /* debug trap handler */ 966 brai TOPHYS(_hw_exception_handler); /* HW exception handler */ 967 968.section .rodata,"a" 969#include "syscall_table.S" 970 971syscall_table_size=(.-sys_call_table) 972 973type_SYSCALL: 974 .ascii "SYSCALL\0" 975type_IRQ: 976 .ascii "IRQ\0" 977type_IRQ_PREEMPT: 978 .ascii "IRQ (PREEMPTED)\0" 979type_SYSCALL_PREEMPT: 980 .ascii " SYSCALL (PREEMPTED)\0" 981 982 /* 983 * Trap decoding for stack unwinder 984 * Tuples are (start addr, end addr, string) 985 * If return address lies on [start addr, end addr], 986 * unwinder displays 'string' 987 */ 988 989 .align 4 990.global microblaze_trap_handlers 991microblaze_trap_handlers: 992 /* Exact matches come first */ 993 .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL 994 .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ 995 /* Fuzzy matches go here */ 996 .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT 997 .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT 998 /* End of table */ 999 .word 0 ; .word 0 ; .word 0 1000