1/* 2 * Low-level system-call handling, trap handlers and context-switching 3 * 4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> 5 * Copyright (C) 2008-2009 PetaLogix 6 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au> 7 * Copyright (C) 2001,2002 NEC Corporation 8 * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org> 9 * 10 * This file is subject to the terms and conditions of the GNU General 11 * Public License. See the file COPYING in the main directory of this 12 * archive for more details. 13 * 14 * Written by Miles Bader <miles@gnu.org> 15 * Heavily modified by John Williams for Microblaze 16 */ 17 18#include <linux/sys.h> 19#include <linux/linkage.h> 20 21#include <asm/entry.h> 22#include <asm/current.h> 23#include <asm/processor.h> 24#include <asm/exceptions.h> 25#include <asm/asm-offsets.h> 26#include <asm/thread_info.h> 27 28#include <asm/page.h> 29#include <asm/unistd.h> 30 31#include <linux/errno.h> 32#include <asm/signal.h> 33 34#undef DEBUG 35 36#ifdef DEBUG 37/* Create space for syscalls counting. */ 38.section .data 39.global syscall_debug_table 40.align 4 41syscall_debug_table: 42 .space (__NR_syscalls * 4) 43#endif /* DEBUG */ 44 45#define C_ENTRY(name) .globl name; .align 4; name 46 47/* 48 * Various ways of setting and clearing BIP in flags reg. 49 * This is mucky, but necessary using microblaze version that 50 * allows msr ops to write to BIP 51 */ 52#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR 53 .macro clear_bip 54 msrclr r0, MSR_BIP 55 .endm 56 57 .macro set_bip 58 msrset r0, MSR_BIP 59 .endm 60 61 .macro clear_eip 62 msrclr r0, MSR_EIP 63 .endm 64 65 .macro set_ee 66 msrset r0, MSR_EE 67 .endm 68 69 .macro disable_irq 70 msrclr r0, MSR_IE 71 .endm 72 73 .macro enable_irq 74 msrset r0, MSR_IE 75 .endm 76 77 .macro set_ums 78 msrset r0, MSR_UMS 79 msrclr r0, MSR_VMS 80 .endm 81 82 .macro set_vms 83 msrclr r0, MSR_UMS 84 msrset r0, MSR_VMS 85 .endm 86 87 .macro clear_ums 88 msrclr r0, MSR_UMS 89 .endm 90 91 .macro clear_vms_ums 92 msrclr r0, MSR_VMS | MSR_UMS 93 .endm 94#else 95 .macro clear_bip 96 mfs r11, rmsr 97 andi r11, r11, ~MSR_BIP 98 mts rmsr, r11 99 .endm 100 101 .macro set_bip 102 mfs r11, rmsr 103 ori r11, r11, MSR_BIP 104 mts rmsr, r11 105 .endm 106 107 .macro clear_eip 108 mfs r11, rmsr 109 andi r11, r11, ~MSR_EIP 110 mts rmsr, r11 111 .endm 112 113 .macro set_ee 114 mfs r11, rmsr 115 ori r11, r11, MSR_EE 116 mts rmsr, r11 117 .endm 118 119 .macro disable_irq 120 mfs r11, rmsr 121 andi r11, r11, ~MSR_IE 122 mts rmsr, r11 123 .endm 124 125 .macro enable_irq 126 mfs r11, rmsr 127 ori r11, r11, MSR_IE 128 mts rmsr, r11 129 .endm 130 131 .macro set_ums 132 mfs r11, rmsr 133 ori r11, r11, MSR_VMS 134 andni r11, r11, MSR_UMS 135 mts rmsr, r11 136 .endm 137 138 .macro set_vms 139 mfs r11, rmsr 140 ori r11, r11, MSR_VMS 141 andni r11, r11, MSR_UMS 142 mts rmsr, r11 143 .endm 144 145 .macro clear_ums 146 mfs r11, rmsr 147 andni r11, r11, MSR_UMS 148 mts rmsr,r11 149 .endm 150 151 .macro clear_vms_ums 152 mfs r11, rmsr 153 andni r11, r11, (MSR_VMS|MSR_UMS) 154 mts rmsr,r11 155 .endm 156#endif 157 158/* Define how to call high-level functions. With MMU, virtual mode must be 159 * enabled when calling the high-level function. Clobbers R11. 160 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL 161 */ 162 163/* turn on virtual protected mode save */ 164#define VM_ON \ 165 set_ums; \ 166 rted r0, 2f; \ 167 nop; \ 1682: 169 170/* turn off virtual protected mode save and user mode save*/ 171#define VM_OFF \ 172 clear_vms_ums; \ 173 rted r0, TOPHYS(1f); \ 174 nop; \ 1751: 176 177#define SAVE_REGS \ 178 swi r2, r1, PT_R2; /* Save SDA */ \ 179 swi r3, r1, PT_R3; \ 180 swi r4, r1, PT_R4; \ 181 swi r5, r1, PT_R5; \ 182 swi r6, r1, PT_R6; \ 183 swi r7, r1, PT_R7; \ 184 swi r8, r1, PT_R8; \ 185 swi r9, r1, PT_R9; \ 186 swi r10, r1, PT_R10; \ 187 swi r11, r1, PT_R11; /* save clobbered regs after rval */\ 188 swi r12, r1, PT_R12; \ 189 swi r13, r1, PT_R13; /* Save SDA2 */ \ 190 swi r14, r1, PT_PC; /* PC, before IRQ/trap */ \ 191 swi r15, r1, PT_R15; /* Save LP */ \ 192 swi r16, r1, PT_R16; \ 193 swi r17, r1, PT_R17; \ 194 swi r18, r1, PT_R18; /* Save asm scratch reg */ \ 195 swi r19, r1, PT_R19; \ 196 swi r20, r1, PT_R20; \ 197 swi r21, r1, PT_R21; \ 198 swi r22, r1, PT_R22; \ 199 swi r23, r1, PT_R23; \ 200 swi r24, r1, PT_R24; \ 201 swi r25, r1, PT_R25; \ 202 swi r26, r1, PT_R26; \ 203 swi r27, r1, PT_R27; \ 204 swi r28, r1, PT_R28; \ 205 swi r29, r1, PT_R29; \ 206 swi r30, r1, PT_R30; \ 207 swi r31, r1, PT_R31; /* Save current task reg */ \ 208 mfs r11, rmsr; /* save MSR */ \ 209 swi r11, r1, PT_MSR; 210 211#define RESTORE_REGS \ 212 lwi r11, r1, PT_MSR; \ 213 mts rmsr , r11; \ 214 lwi r2, r1, PT_R2; /* restore SDA */ \ 215 lwi r3, r1, PT_R3; \ 216 lwi r4, r1, PT_R4; \ 217 lwi r5, r1, PT_R5; \ 218 lwi r6, r1, PT_R6; \ 219 lwi r7, r1, PT_R7; \ 220 lwi r8, r1, PT_R8; \ 221 lwi r9, r1, PT_R9; \ 222 lwi r10, r1, PT_R10; \ 223 lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\ 224 lwi r12, r1, PT_R12; \ 225 lwi r13, r1, PT_R13; /* restore SDA2 */ \ 226 lwi r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\ 227 lwi r15, r1, PT_R15; /* restore LP */ \ 228 lwi r16, r1, PT_R16; \ 229 lwi r17, r1, PT_R17; \ 230 lwi r18, r1, PT_R18; /* restore asm scratch reg */ \ 231 lwi r19, r1, PT_R19; \ 232 lwi r20, r1, PT_R20; \ 233 lwi r21, r1, PT_R21; \ 234 lwi r22, r1, PT_R22; \ 235 lwi r23, r1, PT_R23; \ 236 lwi r24, r1, PT_R24; \ 237 lwi r25, r1, PT_R25; \ 238 lwi r26, r1, PT_R26; \ 239 lwi r27, r1, PT_R27; \ 240 lwi r28, r1, PT_R28; \ 241 lwi r29, r1, PT_R29; \ 242 lwi r30, r1, PT_R30; \ 243 lwi r31, r1, PT_R31; /* Restore cur task reg */ 244 245#define SAVE_STATE \ 246 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \ 247 /* See if already in kernel mode.*/ \ 248 mfs r1, rmsr; \ 249 andi r1, r1, MSR_UMS; \ 250 bnei r1, 1f; \ 251 /* Kernel-mode state save. */ \ 252 /* Reload kernel stack-ptr. */ \ 253 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ 254 /* FIXME: I can add these two lines to one */ \ 255 /* tophys(r1,r1); */ \ 256 /* addik r1, r1, -PT_SIZE; */ \ 257 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \ 258 SAVE_REGS \ 259 brid 2f; \ 260 swi r1, r1, PT_MODE; \ 2611: /* User-mode state save. */ \ 262 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\ 263 tophys(r1,r1); \ 264 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \ 265 /* MS these three instructions can be added to one */ \ 266 /* addik r1, r1, THREAD_SIZE; */ \ 267 /* tophys(r1,r1); */ \ 268 /* addik r1, r1, -PT_SIZE; */ \ 269 addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \ 270 SAVE_REGS \ 271 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \ 272 swi r11, r1, PT_R1; /* Store user SP. */ \ 273 swi r0, r1, PT_MODE; /* Was in user-mode. */ \ 274 /* MS: I am clearing UMS even in case when I come from kernel space */ \ 275 clear_ums; \ 2762: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 277 278.text 279 280/* 281 * User trap. 282 * 283 * System calls are handled here. 284 * 285 * Syscall protocol: 286 * Syscall number in r12, args in r5-r10 287 * Return value in r3 288 * 289 * Trap entered via brki instruction, so BIP bit is set, and interrupts 290 * are masked. This is nice, means we don't have to CLI before state save 291 */ 292C_ENTRY(_user_exception): 293 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */ 294 addi r14, r14, 4 /* return address is 4 byte after call */ 295 296 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ 297 tophys(r1,r1); 298 lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */ 299/* calculate kernel stack pointer from task struct 8k */ 300 addik r1, r1, THREAD_SIZE; 301 tophys(r1,r1); 302 303 addik r1, r1, -PT_SIZE; /* Make room on the stack. */ 304 SAVE_REGS 305 swi r0, r1, PT_R3 306 swi r0, r1, PT_R4 307 308 swi r0, r1, PT_MODE; /* Was in user-mode. */ 309 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 310 swi r11, r1, PT_R1; /* Store user SP. */ 311 clear_ums; 3122: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 313 /* Save away the syscall number. */ 314 swi r12, r1, PT_R0; 315 tovirt(r1,r1) 316 317/* where the trap should return need -8 to adjust for rtsd r15, 8*/ 318/* Jump to the appropriate function for the system call number in r12 319 * (r12 is not preserved), or return an error if r12 is not valid. The LP 320 * register should point to the location where 321 * the called function should return. [note that MAKE_SYS_CALL uses label 1] */ 322 323 /* Step into virtual mode */ 324 rtbd r0, 3f 325 nop 3263: 327 lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */ 328 lwi r11, r11, TI_FLAGS /* get flags in thread info */ 329 andi r11, r11, _TIF_WORK_SYSCALL_MASK 330 beqi r11, 4f 331 332 addik r3, r0, -ENOSYS 333 swi r3, r1, PT_R3 334 brlid r15, do_syscall_trace_enter 335 addik r5, r1, PT_R0 336 337 # do_syscall_trace_enter returns the new syscall nr. 338 addk r12, r0, r3 339 lwi r5, r1, PT_R5; 340 lwi r6, r1, PT_R6; 341 lwi r7, r1, PT_R7; 342 lwi r8, r1, PT_R8; 343 lwi r9, r1, PT_R9; 344 lwi r10, r1, PT_R10; 3454: 346/* Jump to the appropriate function for the system call number in r12 347 * (r12 is not preserved), or return an error if r12 is not valid. 348 * The LP register should point to the location where the called function 349 * should return. [note that MAKE_SYS_CALL uses label 1] */ 350 /* See if the system call number is valid */ 351 addi r11, r12, -__NR_syscalls; 352 bgei r11,5f; 353 /* Figure out which function to use for this system call. */ 354 /* Note Microblaze barrel shift is optional, so don't rely on it */ 355 add r12, r12, r12; /* convert num -> ptr */ 356 add r12, r12, r12; 357 addi r30, r0, 1 /* restarts allowed */ 358 359#ifdef DEBUG 360 /* Trac syscalls and stored them to syscall_debug_table */ 361 /* The first syscall location stores total syscall number */ 362 lwi r3, r0, syscall_debug_table 363 addi r3, r3, 1 364 swi r3, r0, syscall_debug_table 365 lwi r3, r12, syscall_debug_table 366 addi r3, r3, 1 367 swi r3, r12, syscall_debug_table 368#endif 369 370 # Find and jump into the syscall handler. 371 lwi r12, r12, sys_call_table 372 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 373 addi r15, r0, ret_from_trap-8 374 bra r12 375 376 /* The syscall number is invalid, return an error. */ 3775: 378 rtsd r15, 8; /* looks like a normal subroutine return */ 379 addi r3, r0, -ENOSYS; 380 381/* Entry point used to return from a syscall/trap */ 382/* We re-enable BIP bit before state restore */ 383C_ENTRY(ret_from_trap): 384 swi r3, r1, PT_R3 385 swi r4, r1, PT_R4 386 387 lwi r11, r1, PT_MODE; 388/* See if returning to kernel mode, if so, skip resched &c. */ 389 bnei r11, 2f; 390 /* We're returning to user mode, so check for various conditions that 391 * trigger rescheduling. */ 392 /* FIXME: Restructure all these flag checks. */ 393 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 394 lwi r11, r11, TI_FLAGS; /* get flags in thread info */ 395 andi r11, r11, _TIF_WORK_SYSCALL_MASK 396 beqi r11, 1f 397 398 brlid r15, do_syscall_trace_leave 399 addik r5, r1, PT_R0 4001: 401 /* We're returning to user mode, so check for various conditions that 402 * trigger rescheduling. */ 403 /* get thread info from current task */ 404 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 405 lwi r19, r11, TI_FLAGS; /* get flags in thread info */ 406 andi r11, r19, _TIF_NEED_RESCHED; 407 beqi r11, 5f; 408 409 bralid r15, schedule; /* Call scheduler */ 410 nop; /* delay slot */ 411 bri 1b 412 413 /* Maybe handle a signal */ 4145: 415 andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; 416 beqi r11, 4f; /* Signals to handle, handle them */ 417 418 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ 419 bralid r15, do_notify_resume; /* Handle any signals */ 420 add r6, r30, r0; /* Arg 2: int in_syscall */ 421 add r30, r0, r0 /* no more restarts */ 422 bri 1b 423 424/* Finally, return to user state. */ 4254: set_bip; /* Ints masked for state restore */ 426 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ 427 VM_OFF; 428 tophys(r1,r1); 429 RESTORE_REGS; 430 addik r1, r1, PT_SIZE /* Clean up stack space. */ 431 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */ 432 bri 6f; 433 434/* Return to kernel state. */ 4352: set_bip; /* Ints masked for state restore */ 436 VM_OFF; 437 tophys(r1,r1); 438 RESTORE_REGS; 439 addik r1, r1, PT_SIZE /* Clean up stack space. */ 440 tovirt(r1,r1); 4416: 442TRAP_return: /* Make global symbol for debugging */ 443 rtbd r14, 0; /* Instructions to return from an IRQ */ 444 nop; 445 446 447/* This the initial entry point for a new child thread, with an appropriate 448 stack in place that makes it look the the child is in the middle of an 449 syscall. This function is actually `returned to' from switch_thread 450 (copy_thread makes ret_from_fork the return address in each new thread's 451 saved context). */ 452C_ENTRY(ret_from_fork): 453 bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ 454 add r5, r3, r0; /* switch_thread returns the prev task */ 455 /* ( in the delay slot ) */ 456 brid ret_from_trap; /* Do normal trap return */ 457 add r3, r0, r0; /* Child's fork call should return 0. */ 458 459C_ENTRY(ret_from_kernel_thread): 460 bralid r15, schedule_tail; /* ...which is schedule_tail's arg */ 461 add r5, r3, r0; /* switch_thread returns the prev task */ 462 /* ( in the delay slot ) */ 463 brald r15, r20 /* fn was left in r20 */ 464 addk r5, r0, r19 /* ... and argument - in r19 */ 465 brid ret_from_trap 466 add r3, r0, r0 467 468C_ENTRY(sys_rt_sigreturn_wrapper): 469 addik r30, r0, 0 /* no restarts */ 470 brid sys_rt_sigreturn /* Do real work */ 471 addik r5, r1, 0; /* add user context as 1st arg */ 472 473/* 474 * HW EXCEPTION rutine start 475 */ 476C_ENTRY(full_exception_trap): 477 /* adjust exception address for privileged instruction 478 * for finding where is it */ 479 addik r17, r17, -4 480 SAVE_STATE /* Save registers */ 481 /* PC, before IRQ/trap - this is one instruction above */ 482 swi r17, r1, PT_PC; 483 tovirt(r1,r1) 484 /* FIXME this can be store directly in PT_ESR reg. 485 * I tested it but there is a fault */ 486 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 487 addik r15, r0, ret_from_exc - 8 488 mfs r6, resr 489 mfs r7, rfsr; /* save FSR */ 490 mts rfsr, r0; /* Clear sticky fsr */ 491 rted r0, full_exception 492 addik r5, r1, 0 /* parameter struct pt_regs * regs */ 493 494/* 495 * Unaligned data trap. 496 * 497 * Unaligned data trap last on 4k page is handled here. 498 * 499 * Trap entered via exception, so EE bit is set, and interrupts 500 * are masked. This is nice, means we don't have to CLI before state save 501 * 502 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S" 503 */ 504C_ENTRY(unaligned_data_trap): 505 /* MS: I have to save r11 value and then restore it because 506 * set_bit, clear_eip, set_ee use r11 as temp register if MSR 507 * instructions are not used. We don't need to do if MSR instructions 508 * are used and they use r0 instead of r11. 509 * I am using ENTRY_SP which should be primary used only for stack 510 * pointer saving. */ 511 swi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 512 set_bip; /* equalize initial state for all possible entries */ 513 clear_eip; 514 set_ee; 515 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 516 SAVE_STATE /* Save registers.*/ 517 /* PC, before IRQ/trap - this is one instruction above */ 518 swi r17, r1, PT_PC; 519 tovirt(r1,r1) 520 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 521 addik r15, r0, ret_from_exc-8 522 mfs r3, resr /* ESR */ 523 mfs r4, rear /* EAR */ 524 rtbd r0, _unaligned_data_exception 525 addik r7, r1, 0 /* parameter struct pt_regs * regs */ 526 527/* 528 * Page fault traps. 529 * 530 * If the real exception handler (from hw_exception_handler.S) didn't find 531 * the mapping for the process, then we're thrown here to handle such situation. 532 * 533 * Trap entered via exceptions, so EE bit is set, and interrupts 534 * are masked. This is nice, means we don't have to CLI before state save 535 * 536 * Build a standard exception frame for TLB Access errors. All TLB exceptions 537 * will bail out to this point if they can't resolve the lightweight TLB fault. 538 * 539 * The C function called is in "arch/microblaze/mm/fault.c", declared as: 540 * void do_page_fault(struct pt_regs *regs, 541 * unsigned long address, 542 * unsigned long error_code) 543 */ 544/* data and intruction trap - which is choose is resolved int fault.c */ 545C_ENTRY(page_fault_data_trap): 546 SAVE_STATE /* Save registers.*/ 547 /* PC, before IRQ/trap - this is one instruction above */ 548 swi r17, r1, PT_PC; 549 tovirt(r1,r1) 550 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 551 addik r15, r0, ret_from_exc-8 552 mfs r6, rear /* parameter unsigned long address */ 553 mfs r7, resr /* parameter unsigned long error_code */ 554 rted r0, do_page_fault 555 addik r5, r1, 0 /* parameter struct pt_regs * regs */ 556 557C_ENTRY(page_fault_instr_trap): 558 SAVE_STATE /* Save registers.*/ 559 /* PC, before IRQ/trap - this is one instruction above */ 560 swi r17, r1, PT_PC; 561 tovirt(r1,r1) 562 /* where the trap should return need -8 to adjust for rtsd r15, 8 */ 563 addik r15, r0, ret_from_exc-8 564 mfs r6, rear /* parameter unsigned long address */ 565 ori r7, r0, 0 /* parameter unsigned long error_code */ 566 rted r0, do_page_fault 567 addik r5, r1, 0 /* parameter struct pt_regs * regs */ 568 569/* Entry point used to return from an exception. */ 570C_ENTRY(ret_from_exc): 571 lwi r11, r1, PT_MODE; 572 bnei r11, 2f; /* See if returning to kernel mode, */ 573 /* ... if so, skip resched &c. */ 574 575 /* We're returning to user mode, so check for various conditions that 576 trigger rescheduling. */ 5771: 578 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 579 lwi r19, r11, TI_FLAGS; /* get flags in thread info */ 580 andi r11, r19, _TIF_NEED_RESCHED; 581 beqi r11, 5f; 582 583/* Call the scheduler before returning from a syscall/trap. */ 584 bralid r15, schedule; /* Call scheduler */ 585 nop; /* delay slot */ 586 bri 1b 587 588 /* Maybe handle a signal */ 5895: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; 590 beqi r11, 4f; /* Signals to handle, handle them */ 591 592 /* 593 * Handle a signal return; Pending signals should be in r18. 594 * 595 * Not all registers are saved by the normal trap/interrupt entry 596 * points (for instance, call-saved registers (because the normal 597 * C-compiler calling sequence in the kernel makes sure they're 598 * preserved), and call-clobbered registers in the case of 599 * traps), but signal handlers may want to examine or change the 600 * complete register state. Here we save anything not saved by 601 * the normal entry sequence, so that it may be safely restored 602 * (in a possibly modified form) after do_notify_resume returns. */ 603 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ 604 bralid r15, do_notify_resume; /* Handle any signals */ 605 addi r6, r0, 0; /* Arg 2: int in_syscall */ 606 bri 1b 607 608/* Finally, return to user state. */ 6094: set_bip; /* Ints masked for state restore */ 610 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ 611 VM_OFF; 612 tophys(r1,r1); 613 614 RESTORE_REGS; 615 addik r1, r1, PT_SIZE /* Clean up stack space. */ 616 617 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */ 618 bri 6f; 619/* Return to kernel state. */ 6202: set_bip; /* Ints masked for state restore */ 621 VM_OFF; 622 tophys(r1,r1); 623 RESTORE_REGS; 624 addik r1, r1, PT_SIZE /* Clean up stack space. */ 625 626 tovirt(r1,r1); 6276: 628EXC_return: /* Make global symbol for debugging */ 629 rtbd r14, 0; /* Instructions to return from an IRQ */ 630 nop; 631 632/* 633 * HW EXCEPTION rutine end 634 */ 635 636/* 637 * Hardware maskable interrupts. 638 * 639 * The stack-pointer (r1) should have already been saved to the memory 640 * location PER_CPU(ENTRY_SP). 641 */ 642C_ENTRY(_interrupt): 643/* MS: we are in physical address */ 644/* Save registers, switch to proper stack, convert SP to virtual.*/ 645 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) 646 /* MS: See if already in kernel mode. */ 647 mfs r1, rmsr 648 nop 649 andi r1, r1, MSR_UMS 650 bnei r1, 1f 651 652/* Kernel-mode state save. */ 653 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) 654 tophys(r1,r1); /* MS: I have in r1 physical address where stack is */ 655 /* save registers */ 656/* MS: Make room on the stack -> activation record */ 657 addik r1, r1, -PT_SIZE; 658 SAVE_REGS 659 brid 2f; 660 swi r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */ 6611: 662/* User-mode state save. */ 663 /* MS: get the saved current */ 664 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 665 tophys(r1,r1); 666 lwi r1, r1, TS_THREAD_INFO; 667 addik r1, r1, THREAD_SIZE; 668 tophys(r1,r1); 669 /* save registers */ 670 addik r1, r1, -PT_SIZE; 671 SAVE_REGS 672 /* calculate mode */ 673 swi r0, r1, PT_MODE; 674 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 675 swi r11, r1, PT_R1; 676 clear_ums; 6772: 678 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 679 tovirt(r1,r1) 680 addik r15, r0, irq_call; 681irq_call:rtbd r0, do_IRQ; 682 addik r5, r1, 0; 683 684/* MS: we are in virtual mode */ 685ret_from_irq: 686 lwi r11, r1, PT_MODE; 687 bnei r11, 2f; 688 6891: 690 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 691 lwi r19, r11, TI_FLAGS; /* MS: get flags from thread info */ 692 andi r11, r19, _TIF_NEED_RESCHED; 693 beqi r11, 5f 694 bralid r15, schedule; 695 nop; /* delay slot */ 696 bri 1b 697 698 /* Maybe handle a signal */ 6995: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; 700 beqid r11, no_intr_resched 701/* Handle a signal return; Pending signals should be in r18. */ 702 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ 703 bralid r15, do_notify_resume; /* Handle any signals */ 704 addi r6, r0, 0; /* Arg 2: int in_syscall */ 705 bri 1b 706 707/* Finally, return to user state. */ 708no_intr_resched: 709 /* Disable interrupts, we are now committed to the state restore */ 710 disable_irq 711 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); 712 VM_OFF; 713 tophys(r1,r1); 714 RESTORE_REGS 715 addik r1, r1, PT_SIZE /* MS: Clean up stack space. */ 716 lwi r1, r1, PT_R1 - PT_SIZE; 717 bri 6f; 718/* MS: Return to kernel state. */ 7192: 720#ifdef CONFIG_PREEMPT 721 lwi r11, CURRENT_TASK, TS_THREAD_INFO; 722 /* MS: get preempt_count from thread info */ 723 lwi r5, r11, TI_PREEMPT_COUNT; 724 bgti r5, restore; 725 726 lwi r5, r11, TI_FLAGS; /* get flags in thread info */ 727 andi r5, r5, _TIF_NEED_RESCHED; 728 beqi r5, restore /* if zero jump over */ 729 730preempt: 731 /* interrupts are off that's why I am calling preempt_chedule_irq */ 732 bralid r15, preempt_schedule_irq 733 nop 734 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 735 lwi r5, r11, TI_FLAGS; /* get flags in thread info */ 736 andi r5, r5, _TIF_NEED_RESCHED; 737 bnei r5, preempt /* if non zero jump to resched */ 738restore: 739#endif 740 VM_OFF /* MS: turn off MMU */ 741 tophys(r1,r1) 742 RESTORE_REGS 743 addik r1, r1, PT_SIZE /* MS: Clean up stack space. */ 744 tovirt(r1,r1); 7456: 746IRQ_return: /* MS: Make global symbol for debugging */ 747 rtid r14, 0 748 nop 749 750/* 751 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18 752 * and call handling function with saved pt_regs 753 */ 754C_ENTRY(_debug_exception): 755 /* BIP bit is set on entry, no interrupts can occur */ 756 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) 757 758 mfs r1, rmsr 759 nop 760 andi r1, r1, MSR_UMS 761 bnei r1, 1f 762/* MS: Kernel-mode state save - kgdb */ 763 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/ 764 765 /* BIP bit is set on entry, no interrupts can occur */ 766 addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; 767 SAVE_REGS; 768 /* save all regs to pt_reg structure */ 769 swi r0, r1, PT_R0; /* R0 must be saved too */ 770 swi r14, r1, PT_R14 /* rewrite saved R14 value */ 771 swi r16, r1, PT_PC; /* PC and r16 are the same */ 772 /* save special purpose registers to pt_regs */ 773 mfs r11, rear; 774 swi r11, r1, PT_EAR; 775 mfs r11, resr; 776 swi r11, r1, PT_ESR; 777 mfs r11, rfsr; 778 swi r11, r1, PT_FSR; 779 780 /* stack pointer is in physical address at it is decrease 781 * by PT_SIZE but we need to get correct R1 value */ 782 addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE; 783 swi r11, r1, PT_R1 784 /* MS: r31 - current pointer isn't changed */ 785 tovirt(r1,r1) 786#ifdef CONFIG_KGDB 787 addi r5, r1, 0 /* pass pt_reg address as the first arg */ 788 addik r15, r0, dbtrap_call; /* return address */ 789 rtbd r0, microblaze_kgdb_break 790 nop; 791#endif 792 /* MS: Place handler for brki from kernel space if KGDB is OFF. 793 * It is very unlikely that another brki instruction is called. */ 794 bri 0 795 796/* MS: User-mode state save - gdb */ 7971: lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */ 798 tophys(r1,r1); 799 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ 800 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */ 801 tophys(r1,r1); 802 803 addik r1, r1, -PT_SIZE; /* Make room on the stack. */ 804 SAVE_REGS; 805 swi r16, r1, PT_PC; /* Save LP */ 806 swi r0, r1, PT_MODE; /* Was in user-mode. */ 807 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); 808 swi r11, r1, PT_R1; /* Store user SP. */ 809 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); 810 tovirt(r1,r1) 811 set_vms; 812 addik r5, r1, 0; 813 addik r15, r0, dbtrap_call; 814dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */ 815 rtbd r0, sw_exception 816 nop 817 818 /* MS: The first instruction for the second part of the gdb/kgdb */ 819 set_bip; /* Ints masked for state restore */ 820 lwi r11, r1, PT_MODE; 821 bnei r11, 2f; 822/* MS: Return to user space - gdb */ 8231: 824 /* Get current task ptr into r11 */ 825 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */ 826 lwi r19, r11, TI_FLAGS; /* get flags in thread info */ 827 andi r11, r19, _TIF_NEED_RESCHED; 828 beqi r11, 5f; 829 830 /* Call the scheduler before returning from a syscall/trap. */ 831 bralid r15, schedule; /* Call scheduler */ 832 nop; /* delay slot */ 833 bri 1b 834 835 /* Maybe handle a signal */ 8365: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; 837 beqi r11, 4f; /* Signals to handle, handle them */ 838 839 addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */ 840 bralid r15, do_notify_resume; /* Handle any signals */ 841 addi r6, r0, 0; /* Arg 2: int in_syscall */ 842 bri 1b 843 844/* Finally, return to user state. */ 8454: swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */ 846 VM_OFF; 847 tophys(r1,r1); 848 /* MS: Restore all regs */ 849 RESTORE_REGS 850 addik r1, r1, PT_SIZE /* Clean up stack space */ 851 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */ 852DBTRAP_return_user: /* MS: Make global symbol for debugging */ 853 rtbd r16, 0; /* MS: Instructions to return from a debug trap */ 854 nop; 855 856/* MS: Return to kernel state - kgdb */ 8572: VM_OFF; 858 tophys(r1,r1); 859 /* MS: Restore all regs */ 860 RESTORE_REGS 861 lwi r14, r1, PT_R14; 862 lwi r16, r1, PT_PC; 863 addik r1, r1, PT_SIZE; /* MS: Clean up stack space */ 864 tovirt(r1,r1); 865DBTRAP_return_kernel: /* MS: Make global symbol for debugging */ 866 rtbd r16, 0; /* MS: Instructions to return from a debug trap */ 867 nop; 868 869 870ENTRY(_switch_to) 871 /* prepare return value */ 872 addk r3, r0, CURRENT_TASK 873 874 /* save registers in cpu_context */ 875 /* use r11 and r12, volatile registers, as temp register */ 876 /* give start of cpu_context for previous process */ 877 addik r11, r5, TI_CPU_CONTEXT 878 swi r1, r11, CC_R1 879 swi r2, r11, CC_R2 880 /* skip volatile registers. 881 * they are saved on stack when we jumped to _switch_to() */ 882 /* dedicated registers */ 883 swi r13, r11, CC_R13 884 swi r14, r11, CC_R14 885 swi r15, r11, CC_R15 886 swi r16, r11, CC_R16 887 swi r17, r11, CC_R17 888 swi r18, r11, CC_R18 889 /* save non-volatile registers */ 890 swi r19, r11, CC_R19 891 swi r20, r11, CC_R20 892 swi r21, r11, CC_R21 893 swi r22, r11, CC_R22 894 swi r23, r11, CC_R23 895 swi r24, r11, CC_R24 896 swi r25, r11, CC_R25 897 swi r26, r11, CC_R26 898 swi r27, r11, CC_R27 899 swi r28, r11, CC_R28 900 swi r29, r11, CC_R29 901 swi r30, r11, CC_R30 902 /* special purpose registers */ 903 mfs r12, rmsr 904 swi r12, r11, CC_MSR 905 mfs r12, rear 906 swi r12, r11, CC_EAR 907 mfs r12, resr 908 swi r12, r11, CC_ESR 909 mfs r12, rfsr 910 swi r12, r11, CC_FSR 911 912 /* update r31, the current-give me pointer to task which will be next */ 913 lwi CURRENT_TASK, r6, TI_TASK 914 /* stored it to current_save too */ 915 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE) 916 917 /* get new process' cpu context and restore */ 918 /* give me start where start context of next task */ 919 addik r11, r6, TI_CPU_CONTEXT 920 921 /* non-volatile registers */ 922 lwi r30, r11, CC_R30 923 lwi r29, r11, CC_R29 924 lwi r28, r11, CC_R28 925 lwi r27, r11, CC_R27 926 lwi r26, r11, CC_R26 927 lwi r25, r11, CC_R25 928 lwi r24, r11, CC_R24 929 lwi r23, r11, CC_R23 930 lwi r22, r11, CC_R22 931 lwi r21, r11, CC_R21 932 lwi r20, r11, CC_R20 933 lwi r19, r11, CC_R19 934 /* dedicated registers */ 935 lwi r18, r11, CC_R18 936 lwi r17, r11, CC_R17 937 lwi r16, r11, CC_R16 938 lwi r15, r11, CC_R15 939 lwi r14, r11, CC_R14 940 lwi r13, r11, CC_R13 941 /* skip volatile registers */ 942 lwi r2, r11, CC_R2 943 lwi r1, r11, CC_R1 944 945 /* special purpose registers */ 946 lwi r12, r11, CC_FSR 947 mts rfsr, r12 948 lwi r12, r11, CC_MSR 949 mts rmsr, r12 950 951 rtsd r15, 8 952 nop 953 954ENTRY(_reset) 955 brai 0; /* Jump to reset vector */ 956 957 /* These are compiled and loaded into high memory, then 958 * copied into place in mach_early_setup */ 959 .section .init.ivt, "ax" 960#if CONFIG_MANUAL_RESET_VECTOR 961 .org 0x0 962 brai CONFIG_MANUAL_RESET_VECTOR 963#endif 964 .org 0x8 965 brai TOPHYS(_user_exception); /* syscall handler */ 966 .org 0x10 967 brai TOPHYS(_interrupt); /* Interrupt handler */ 968 .org 0x18 969 brai TOPHYS(_debug_exception); /* debug trap handler */ 970 .org 0x20 971 brai TOPHYS(_hw_exception_handler); /* HW exception handler */ 972 973.section .rodata,"a" 974#include "syscall_table.S" 975 976syscall_table_size=(.-sys_call_table) 977 978type_SYSCALL: 979 .ascii "SYSCALL\0" 980type_IRQ: 981 .ascii "IRQ\0" 982type_IRQ_PREEMPT: 983 .ascii "IRQ (PREEMPTED)\0" 984type_SYSCALL_PREEMPT: 985 .ascii " SYSCALL (PREEMPTED)\0" 986 987 /* 988 * Trap decoding for stack unwinder 989 * Tuples are (start addr, end addr, string) 990 * If return address lies on [start addr, end addr], 991 * unwinder displays 'string' 992 */ 993 994 .align 4 995.global microblaze_trap_handlers 996microblaze_trap_handlers: 997 /* Exact matches come first */ 998 .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL 999 .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ 1000 /* Fuzzy matches go here */ 1001 .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT 1002 .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT 1003 /* End of table */ 1004 .word 0 ; .word 0 ; .word 0 1005