xref: /openbmc/linux/arch/microblaze/include/asm/pci.h (revision b51d4a3e)
1 /*
2  * This program is free software; you can redistribute it and/or
3  * modify it under the terms of the GNU General Public License
4  * as published by the Free Software Foundation; either version
5  * 2 of the License, or (at your option) any later version.
6  *
7  * Based on powerpc version
8  */
9 
10 #ifndef __ASM_MICROBLAZE_PCI_H
11 #define __ASM_MICROBLAZE_PCI_H
12 #ifdef __KERNEL__
13 
14 #include <linux/types.h>
15 #include <linux/slab.h>
16 #include <linux/string.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pci.h>
19 
20 #include <asm/scatterlist.h>
21 #include <asm/io.h>
22 #include <asm/prom.h>
23 #include <asm/pci-bridge.h>
24 
25 #define PCIBIOS_MIN_IO		0x1000
26 #define PCIBIOS_MIN_MEM		0x10000000
27 
28 struct pci_dev;
29 
30 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
31 #define IOBASE_BRIDGE_NUMBER	0
32 #define IOBASE_MEMORY		1
33 #define IOBASE_IO		2
34 #define IOBASE_ISA_IO		3
35 #define IOBASE_ISA_MEM		4
36 
37 #define pcibios_scan_all_fns(a, b)	0
38 
39 /*
40  * Set this to 1 if you want the kernel to re-assign all PCI
41  * bus numbers (don't do that on ppc64 yet !)
42  */
43 #define pcibios_assign_all_busses()	0
44 
45 static inline void pcibios_penalize_isa_irq(int irq, int active)
46 {
47 	/* We don't do dynamic PCI IRQ allocation */
48 }
49 
50 #ifdef CONFIG_PCI
51 extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
52 extern struct dma_map_ops *get_pci_dma_ops(void);
53 #else	/* CONFIG_PCI */
54 #define set_pci_dma_ops(d)
55 #define get_pci_dma_ops()	NULL
56 #endif
57 
58 #ifdef CONFIG_PCI
59 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
60 					enum pci_dma_burst_strategy *strat,
61 					unsigned long *strategy_parameter)
62 {
63 	*strat = PCI_DMA_BURST_INFINITY;
64 	*strategy_parameter = ~0UL;
65 }
66 #endif
67 
68 extern int pci_domain_nr(struct pci_bus *bus);
69 
70 /* Decide whether to display the domain number in /proc */
71 extern int pci_proc_domain(struct pci_bus *bus);
72 
73 struct vm_area_struct;
74 /* Map a range of PCI memory or I/O space for a device into user space */
75 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
76 			enum pci_mmap_state mmap_state, int write_combine);
77 
78 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
79 #define HAVE_PCI_MMAP	1
80 
81 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
82 			   size_t count);
83 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
84 			   size_t count);
85 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
86 				      struct vm_area_struct *vma,
87 				      enum pci_mmap_state mmap_state);
88 
89 #define HAVE_PCI_LEGACY	1
90 
91 /* The PCI address space does equal the physical memory
92  * address space (no IOMMU).  The IDE and SCSI device layers use
93  * this boolean for bounce buffer decisions.
94  */
95 #define PCI_DMA_BUS_IS_PHYS     (1)
96 
97 extern void pcibios_resource_to_bus(struct pci_dev *dev,
98 			struct pci_bus_region *region,
99 			struct resource *res);
100 
101 extern void pcibios_bus_to_resource(struct pci_dev *dev,
102 			struct resource *res,
103 			struct pci_bus_region *region);
104 
105 static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
106 			struct resource *res)
107 {
108 	struct resource *root = NULL;
109 
110 	if (res->flags & IORESOURCE_IO)
111 		root = &ioport_resource;
112 	if (res->flags & IORESOURCE_MEM)
113 		root = &iomem_resource;
114 
115 	return root;
116 }
117 
118 extern void pcibios_claim_one_bus(struct pci_bus *b);
119 
120 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
121 
122 extern void pcibios_resource_survey(void);
123 
124 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
125 extern int remove_phb_dynamic(struct pci_controller *phb);
126 
127 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
128 					struct pci_bus *bus, int devfn);
129 
130 extern void of_scan_pci_bridge(struct device_node *node,
131 				struct pci_dev *dev);
132 
133 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
134 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
135 
136 extern int pci_read_irq_line(struct pci_dev *dev);
137 
138 extern int pci_bus_find_capability(struct pci_bus *bus,
139 						unsigned int devfn, int cap);
140 
141 struct file;
142 extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
143 					 unsigned long pfn,
144 					 unsigned long size,
145 					 pgprot_t prot);
146 
147 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
148 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
149 				 const struct resource *rsrc,
150 				 resource_size_t *start, resource_size_t *end);
151 
152 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
153 extern void pcibios_setup_bus_self(struct pci_bus *bus);
154 
155 /* This part of code was originally in xilinx-pci.h */
156 #ifdef CONFIG_PCI_XILINX
157 extern void __init xilinx_pci_init(void);
158 #else
159 static inline void __init xilinx_pci_init(void) { return; }
160 #endif
161 
162 #include <asm-generic/pci-dma-compat.h>
163 
164 #endif	/* __KERNEL__ */
165 #endif /* __ASM_MICROBLAZE_PCI_H */
166