xref: /openbmc/linux/arch/microblaze/include/asm/pci.h (revision 733cc218)
1 /*
2  * This program is free software; you can redistribute it and/or
3  * modify it under the terms of the GNU General Public License
4  * as published by the Free Software Foundation; either version
5  * 2 of the License, or (at your option) any later version.
6  *
7  * Based on powerpc version
8  */
9 
10 #ifndef __ASM_MICROBLAZE_PCI_H
11 #define __ASM_MICROBLAZE_PCI_H
12 #ifdef __KERNEL__
13 
14 #include <linux/types.h>
15 #include <linux/slab.h>
16 #include <linux/string.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pci.h>
19 
20 #include <asm/scatterlist.h>
21 #include <asm/io.h>
22 #include <asm/prom.h>
23 #include <asm/pci-bridge.h>
24 
25 #define PCIBIOS_MIN_IO		0x1000
26 #define PCIBIOS_MIN_MEM		0x10000000
27 
28 struct pci_dev;
29 
30 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
31 #define IOBASE_BRIDGE_NUMBER	0
32 #define IOBASE_MEMORY		1
33 #define IOBASE_IO		2
34 #define IOBASE_ISA_IO		3
35 #define IOBASE_ISA_MEM		4
36 
37 #define pcibios_scan_all_fns(a, b)	0
38 
39 /*
40  * Set this to 1 if you want the kernel to re-assign all PCI
41  * bus numbers (don't do that on ppc64 yet !)
42  */
43 #define pcibios_assign_all_busses() \
44 	(pci_has_flag(PCI_REASSIGN_ALL_BUS))
45 
46 static inline void pcibios_set_master(struct pci_dev *dev)
47 {
48 	/* No special bus mastering setup handling */
49 }
50 
51 static inline void pcibios_penalize_isa_irq(int irq, int active)
52 {
53 	/* We don't do dynamic PCI IRQ allocation */
54 }
55 
56 #ifdef CONFIG_PCI
57 extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
58 extern struct dma_map_ops *get_pci_dma_ops(void);
59 #else	/* CONFIG_PCI */
60 #define set_pci_dma_ops(d)
61 #define get_pci_dma_ops()	NULL
62 #endif
63 
64 #ifdef CONFIG_PCI
65 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
66 					enum pci_dma_burst_strategy *strat,
67 					unsigned long *strategy_parameter)
68 {
69 	*strat = PCI_DMA_BURST_INFINITY;
70 	*strategy_parameter = ~0UL;
71 }
72 #endif
73 
74 extern int pci_domain_nr(struct pci_bus *bus);
75 
76 /* Decide whether to display the domain number in /proc */
77 extern int pci_proc_domain(struct pci_bus *bus);
78 
79 struct vm_area_struct;
80 /* Map a range of PCI memory or I/O space for a device into user space */
81 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
82 			enum pci_mmap_state mmap_state, int write_combine);
83 
84 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
85 #define HAVE_PCI_MMAP	1
86 
87 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
88 			   size_t count);
89 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
90 			   size_t count);
91 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
92 				      struct vm_area_struct *vma,
93 				      enum pci_mmap_state mmap_state);
94 
95 #define HAVE_PCI_LEGACY	1
96 
97 /* pci_unmap_{page,single} is a nop so... */
98 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
99 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
100 #define pci_unmap_addr(PTR, ADDR_NAME)		(0)
101 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)	do { } while (0)
102 #define pci_unmap_len(PTR, LEN_NAME)		(0)
103 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)	do { } while (0)
104 
105 /* The PCI address space does equal the physical memory
106  * address space (no IOMMU).  The IDE and SCSI device layers use
107  * this boolean for bounce buffer decisions.
108  */
109 #define PCI_DMA_BUS_IS_PHYS     (1)
110 
111 extern void pcibios_resource_to_bus(struct pci_dev *dev,
112 			struct pci_bus_region *region,
113 			struct resource *res);
114 
115 extern void pcibios_bus_to_resource(struct pci_dev *dev,
116 			struct resource *res,
117 			struct pci_bus_region *region);
118 
119 static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
120 			struct resource *res)
121 {
122 	struct resource *root = NULL;
123 
124 	if (res->flags & IORESOURCE_IO)
125 		root = &ioport_resource;
126 	if (res->flags & IORESOURCE_MEM)
127 		root = &iomem_resource;
128 
129 	return root;
130 }
131 
132 extern void pcibios_claim_one_bus(struct pci_bus *b);
133 
134 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
135 
136 extern void pcibios_resource_survey(void);
137 
138 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
139 extern int remove_phb_dynamic(struct pci_controller *phb);
140 
141 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
142 					struct pci_bus *bus, int devfn);
143 
144 extern void of_scan_pci_bridge(struct device_node *node,
145 				struct pci_dev *dev);
146 
147 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
148 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
149 
150 extern int pci_read_irq_line(struct pci_dev *dev);
151 
152 extern int pci_bus_find_capability(struct pci_bus *bus,
153 						unsigned int devfn, int cap);
154 
155 struct file;
156 extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
157 					 unsigned long pfn,
158 					 unsigned long size,
159 					 pgprot_t prot);
160 
161 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
162 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
163 				 const struct resource *rsrc,
164 				 resource_size_t *start, resource_size_t *end);
165 
166 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
167 extern void pcibios_setup_bus_self(struct pci_bus *bus);
168 
169 /* This part of code was originaly in xilinx-pci.h */
170 #ifdef CONFIG_PCI_XILINX
171 extern void __init xilinx_pci_init(void);
172 #else
173 static inline void __init xilinx_pci_init(void) { return; }
174 #endif
175 
176 #endif	/* __KERNEL__ */
177 #endif /* __ASM_MICROBLAZE_PCI_H */
178