xref: /openbmc/linux/arch/microblaze/include/asm/pci.h (revision 72bdee79)
1 /*
2  * This program is free software; you can redistribute it and/or
3  * modify it under the terms of the GNU General Public License
4  * as published by the Free Software Foundation; either version
5  * 2 of the License, or (at your option) any later version.
6  *
7  * Based on powerpc version
8  */
9 
10 #ifndef __ASM_MICROBLAZE_PCI_H
11 #define __ASM_MICROBLAZE_PCI_H
12 #ifdef __KERNEL__
13 
14 #include <linux/types.h>
15 #include <linux/slab.h>
16 #include <linux/string.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pci.h>
19 
20 #include <asm/scatterlist.h>
21 #include <asm/io.h>
22 #include <asm/prom.h>
23 #include <asm/pci-bridge.h>
24 
25 #define PCIBIOS_MIN_IO		0x1000
26 #define PCIBIOS_MIN_MEM		0x10000000
27 
28 struct pci_dev;
29 
30 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
31 #define IOBASE_BRIDGE_NUMBER	0
32 #define IOBASE_MEMORY		1
33 #define IOBASE_IO		2
34 #define IOBASE_ISA_IO		3
35 #define IOBASE_ISA_MEM		4
36 
37 #define pcibios_scan_all_fns(a, b)	0
38 
39 /*
40  * Set this to 1 if you want the kernel to re-assign all PCI
41  * bus numbers (don't do that on ppc64 yet !)
42  */
43 #define pcibios_assign_all_busses()	0
44 
45 static inline void pcibios_set_master(struct pci_dev *dev)
46 {
47 	/* No special bus mastering setup handling */
48 }
49 
50 static inline void pcibios_penalize_isa_irq(int irq, int active)
51 {
52 	/* We don't do dynamic PCI IRQ allocation */
53 }
54 
55 #ifdef CONFIG_PCI
56 extern void set_pci_dma_ops(struct dma_map_ops *dma_ops);
57 extern struct dma_map_ops *get_pci_dma_ops(void);
58 #else	/* CONFIG_PCI */
59 #define set_pci_dma_ops(d)
60 #define get_pci_dma_ops()	NULL
61 #endif
62 
63 #ifdef CONFIG_PCI
64 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
65 					enum pci_dma_burst_strategy *strat,
66 					unsigned long *strategy_parameter)
67 {
68 	*strat = PCI_DMA_BURST_INFINITY;
69 	*strategy_parameter = ~0UL;
70 }
71 #endif
72 
73 extern int pci_domain_nr(struct pci_bus *bus);
74 
75 /* Decide whether to display the domain number in /proc */
76 extern int pci_proc_domain(struct pci_bus *bus);
77 
78 struct vm_area_struct;
79 /* Map a range of PCI memory or I/O space for a device into user space */
80 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
81 			enum pci_mmap_state mmap_state, int write_combine);
82 
83 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
84 #define HAVE_PCI_MMAP	1
85 
86 extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
87 			   size_t count);
88 extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
89 			   size_t count);
90 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
91 				      struct vm_area_struct *vma,
92 				      enum pci_mmap_state mmap_state);
93 
94 #define HAVE_PCI_LEGACY	1
95 
96 /* The PCI address space does equal the physical memory
97  * address space (no IOMMU).  The IDE and SCSI device layers use
98  * this boolean for bounce buffer decisions.
99  */
100 #define PCI_DMA_BUS_IS_PHYS     (1)
101 
102 extern void pcibios_resource_to_bus(struct pci_dev *dev,
103 			struct pci_bus_region *region,
104 			struct resource *res);
105 
106 extern void pcibios_bus_to_resource(struct pci_dev *dev,
107 			struct resource *res,
108 			struct pci_bus_region *region);
109 
110 static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
111 			struct resource *res)
112 {
113 	struct resource *root = NULL;
114 
115 	if (res->flags & IORESOURCE_IO)
116 		root = &ioport_resource;
117 	if (res->flags & IORESOURCE_MEM)
118 		root = &iomem_resource;
119 
120 	return root;
121 }
122 
123 extern void pcibios_claim_one_bus(struct pci_bus *b);
124 
125 extern void pcibios_finish_adding_to_bus(struct pci_bus *bus);
126 
127 extern void pcibios_resource_survey(void);
128 
129 extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
130 extern int remove_phb_dynamic(struct pci_controller *phb);
131 
132 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
133 					struct pci_bus *bus, int devfn);
134 
135 extern void of_scan_pci_bridge(struct device_node *node,
136 				struct pci_dev *dev);
137 
138 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
139 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
140 
141 extern int pci_read_irq_line(struct pci_dev *dev);
142 
143 extern int pci_bus_find_capability(struct pci_bus *bus,
144 						unsigned int devfn, int cap);
145 
146 struct file;
147 extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
148 					 unsigned long pfn,
149 					 unsigned long size,
150 					 pgprot_t prot);
151 
152 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
153 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
154 				 const struct resource *rsrc,
155 				 resource_size_t *start, resource_size_t *end);
156 
157 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
158 extern void pcibios_setup_bus_self(struct pci_bus *bus);
159 
160 /* This part of code was originally in xilinx-pci.h */
161 #ifdef CONFIG_PCI_XILINX
162 extern void __init xilinx_pci_init(void);
163 #else
164 static inline void __init xilinx_pci_init(void) { return; }
165 #endif
166 
167 #include <asm-generic/pci-dma-compat.h>
168 
169 #endif	/* __KERNEL__ */
170 #endif /* __ASM_MICROBLAZE_PCI_H */
171