1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
4  * Copyright (C) 2007-2009 PetaLogix
5  * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
6  * based on v850 version which was
7  * Copyright (C) 2001,02,03 NEC Electronics Corporation
8  * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
9  */
10 
11 #ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
12 #define _ASM_MICROBLAZE_CACHEFLUSH_H
13 
14 /* Somebody depends on this; sigh... */
15 #include <linux/mm.h>
16 #include <linux/io.h>
17 
18 /* Look at Documentation/core-api/cachetlb.rst */
19 
20 /*
21  * Cache handling functions.
22  * Microblaze has a write-through data cache, meaning that the data cache
23  * never needs to be flushed.  The only flushing operations that are
24  * implemented are to invalidate the instruction cache.  These are called
25  * after loading a user application into memory, we must invalidate the
26  * instruction cache to make sure we don't fetch old, bad code.
27  */
28 
29 /* struct cache, d=dcache, i=icache, fl = flush, iv = invalidate,
30  * suffix r = range */
31 struct scache {
32 	/* icache */
33 	void (*ie)(void); /* enable */
34 	void (*id)(void); /* disable */
35 	void (*ifl)(void); /* flush */
36 	void (*iflr)(unsigned long a, unsigned long b);
37 	void (*iin)(void); /* invalidate */
38 	void (*iinr)(unsigned long a, unsigned long b);
39 	/* dcache */
40 	void (*de)(void); /* enable */
41 	void (*dd)(void); /* disable */
42 	void (*dfl)(void); /* flush */
43 	void (*dflr)(unsigned long a, unsigned long b);
44 	void (*din)(void); /* invalidate */
45 	void (*dinr)(unsigned long a, unsigned long b);
46 };
47 
48 /* microblaze cache */
49 extern struct scache *mbc;
50 
51 void microblaze_cache_init(void);
52 
53 #define enable_icache()					mbc->ie();
54 #define disable_icache()				mbc->id();
55 #define flush_icache()					mbc->ifl();
56 #define flush_icache_range(start, end)			mbc->iflr(start, end);
57 #define invalidate_icache()				mbc->iin();
58 #define invalidate_icache_range(start, end)		mbc->iinr(start, end);
59 
60 #define flush_icache_user_range(vma, pg, adr, len)	flush_icache();
61 #define flush_icache_page(vma, pg)			do { } while (0)
62 
63 #define enable_dcache()					mbc->de();
64 #define disable_dcache()				mbc->dd();
65 /* FIXME for LL-temac driver */
66 #define invalidate_dcache()				mbc->din();
67 #define invalidate_dcache_range(start, end)		mbc->dinr(start, end);
68 #define flush_dcache()					mbc->dfl();
69 #define flush_dcache_range(start, end)			mbc->dflr(start, end);
70 
71 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
72 /* MS: We have to implement it because of rootfs-jffs2 issue on WB */
73 #define flush_dcache_page(page) \
74 do { \
75 	unsigned long addr = (unsigned long) page_address(page); /* virtual */ \
76 	addr = (u32)virt_to_phys((void *)addr); \
77 	flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \
78 } while (0);
79 
80 #define flush_dcache_mmap_lock(mapping)		do { } while (0)
81 #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
82 
83 #define flush_cache_dup_mm(mm)				do { } while (0)
84 #define flush_cache_vmap(start, end)			do { } while (0)
85 #define flush_cache_vunmap(start, end)			do { } while (0)
86 #define flush_cache_mm(mm)			do { } while (0)
87 
88 #define flush_cache_page(vma, vmaddr, pfn) \
89 	flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
90 
91 /* MS: kgdb code use this macro, wrong len with FLASH */
92 #if 0
93 #define flush_cache_range(vma, start, len)	{	\
94 	flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \
95 	flush_dcache_range((unsigned) (start), (unsigned) (start) + (len)); \
96 }
97 #endif
98 
99 #define flush_cache_range(vma, start, len) do { } while (0)
100 
101 static inline void copy_to_user_page(struct vm_area_struct *vma,
102 				     struct page *page, unsigned long vaddr,
103 				     void *dst, void *src, int len)
104 {
105 	u32 addr = virt_to_phys(dst);
106 	memcpy(dst, src, len);
107 	if (vma->vm_flags & VM_EXEC) {
108 		invalidate_icache_range(addr, addr + PAGE_SIZE);
109 		flush_dcache_range(addr, addr + PAGE_SIZE);
110 	}
111 }
112 
113 static inline void copy_from_user_page(struct vm_area_struct *vma,
114 				       struct page *page, unsigned long vaddr,
115 				       void *dst, void *src, int len)
116 {
117 	memcpy(dst, src, len);
118 }
119 
120 #endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */
121