1 /* 2 * arch/m68k/q40/config.c 3 * 4 * Copyright (C) 1999 Richard Zidlicky 5 * 6 * originally based on: 7 * 8 * linux/bvme/config.c 9 * 10 * This file is subject to the terms and conditions of the GNU General Public 11 * License. See the file README.legal in the main directory of this archive 12 * for more details. 13 */ 14 15 #include <linux/config.h> 16 #include <linux/types.h> 17 #include <linux/kernel.h> 18 #include <linux/mm.h> 19 #include <linux/tty.h> 20 #include <linux/console.h> 21 #include <linux/linkage.h> 22 #include <linux/init.h> 23 #include <linux/major.h> 24 #include <linux/serial_reg.h> 25 #include <linux/rtc.h> 26 #include <linux/vt_kern.h> 27 28 #include <asm/io.h> 29 #include <asm/rtc.h> 30 #include <asm/bootinfo.h> 31 #include <asm/system.h> 32 #include <asm/pgtable.h> 33 #include <asm/setup.h> 34 #include <asm/irq.h> 35 #include <asm/traps.h> 36 #include <asm/machdep.h> 37 #include <asm/q40_master.h> 38 39 extern irqreturn_t q40_process_int (int level, struct pt_regs *regs); 40 extern void q40_init_IRQ (void); 41 static void q40_get_model(char *model); 42 static int q40_get_hardware_list(char *buffer); 43 extern void q40_sched_init(irqreturn_t (*handler)(int, void *, struct pt_regs *)); 44 45 extern unsigned long q40_gettimeoffset (void); 46 extern int q40_hwclk (int, struct rtc_time *); 47 extern unsigned int q40_get_ss (void); 48 extern int q40_set_clock_mmss (unsigned long); 49 static int q40_get_rtc_pll(struct rtc_pll_info *pll); 50 static int q40_set_rtc_pll(struct rtc_pll_info *pll); 51 extern void q40_reset (void); 52 void q40_halt(void); 53 extern void q40_waitbut(void); 54 void q40_set_vectors (void); 55 56 extern void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/ ); 57 58 extern char m68k_debug_device[]; 59 static void q40_mem_console_write(struct console *co, const char *b, 60 unsigned int count); 61 62 extern int ql_ticks; 63 64 static struct console q40_console_driver = { 65 .name = "debug", 66 .flags = CON_PRINTBUFFER, 67 .index = -1, 68 }; 69 70 71 /* early debugging function:*/ 72 extern char *q40_mem_cptr; /*=(char *)0xff020000;*/ 73 static int _cpleft; 74 75 static void q40_mem_console_write(struct console *co, const char *s, 76 unsigned int count) 77 { 78 char *p=(char *)s; 79 80 if (count<_cpleft) 81 while (count-- >0){ 82 *q40_mem_cptr=*p++; 83 q40_mem_cptr+=4; 84 _cpleft--; 85 } 86 } 87 #if 0 88 void printq40(char *str) 89 { 90 int l=strlen(str); 91 char *p=q40_mem_cptr; 92 93 while (l-- >0 && _cpleft-- >0) 94 { 95 *p=*str++; 96 p+=4; 97 } 98 q40_mem_cptr=p; 99 } 100 #endif 101 102 static int halted=0; 103 104 #ifdef CONFIG_HEARTBEAT 105 static void q40_heartbeat(int on) 106 { 107 if (halted) return; 108 109 if (on) 110 Q40_LED_ON(); 111 else 112 Q40_LED_OFF(); 113 } 114 #endif 115 116 void q40_reset(void) 117 { 118 halted=1; 119 printk ("\n\n*******************************************\n" 120 "Called q40_reset : press the RESET button!! \n" 121 "*******************************************\n"); 122 Q40_LED_ON(); 123 while(1) ; 124 } 125 void q40_halt(void) 126 { 127 halted=1; 128 printk ("\n\n*******************\n" 129 " Called q40_halt\n" 130 "*******************\n"); 131 Q40_LED_ON(); 132 while(1) ; 133 } 134 135 static void q40_get_model(char *model) 136 { 137 sprintf(model, "Q40"); 138 } 139 140 /* No hardware options on Q40? */ 141 142 static int q40_get_hardware_list(char *buffer) 143 { 144 *buffer = '\0'; 145 return 0; 146 } 147 148 static unsigned int serports[]={0x3f8,0x2f8,0x3e8,0x2e8,0}; 149 void q40_disable_irqs(void) 150 { 151 unsigned i,j; 152 153 j=0; 154 while((i=serports[j++])) outb(0,i+UART_IER); 155 master_outb(0,EXT_ENABLE_REG); 156 master_outb(0,KEY_IRQ_ENABLE_REG); 157 } 158 159 void __init config_q40(void) 160 { 161 mach_sched_init = q40_sched_init; 162 163 mach_init_IRQ = q40_init_IRQ; 164 mach_gettimeoffset = q40_gettimeoffset; 165 mach_hwclk = q40_hwclk; 166 mach_get_ss = q40_get_ss; 167 mach_get_rtc_pll = q40_get_rtc_pll; 168 mach_set_rtc_pll = q40_set_rtc_pll; 169 mach_set_clock_mmss = q40_set_clock_mmss; 170 171 mach_reset = q40_reset; 172 mach_get_model = q40_get_model; 173 mach_get_hardware_list = q40_get_hardware_list; 174 175 #if defined(CONFIG_INPUT_M68K_BEEP) || defined(CONFIG_INPUT_M68K_BEEP_MODULE) 176 mach_beep = q40_mksound; 177 #endif 178 #ifdef CONFIG_HEARTBEAT 179 mach_heartbeat = q40_heartbeat; 180 #endif 181 mach_halt = q40_halt; 182 183 /* disable a few things that SMSQ might have left enabled */ 184 q40_disable_irqs(); 185 186 /* no DMA at all, but ide-scsi requires it.. make sure 187 * all physical RAM fits into the boundary - otherwise 188 * allocator may play costly and useless tricks */ 189 mach_max_dma_address = 1024*1024*1024; 190 191 /* useful for early debugging stages - writes kernel messages into SRAM */ 192 if (!strncmp( m68k_debug_device,"mem",3 )) 193 { 194 /*printk("using NVRAM debug, q40_mem_cptr=%p\n",q40_mem_cptr);*/ 195 _cpleft=2000-((long)q40_mem_cptr-0xff020000)/4; 196 q40_console_driver.write = q40_mem_console_write; 197 register_console(&q40_console_driver); 198 } 199 } 200 201 202 int q40_parse_bootinfo(const struct bi_record *rec) 203 { 204 return 1; 205 } 206 207 208 static inline unsigned char bcd2bin (unsigned char b) 209 { 210 return ((b>>4)*10 + (b&15)); 211 } 212 213 static inline unsigned char bin2bcd (unsigned char b) 214 { 215 return (((b/10)*16) + (b%10)); 216 } 217 218 219 unsigned long q40_gettimeoffset (void) 220 { 221 return 5000*(ql_ticks!=0); 222 } 223 224 225 /* 226 * Looks like op is non-zero for setting the clock, and zero for 227 * reading the clock. 228 * 229 * struct hwclk_time { 230 * unsigned sec; 0..59 231 * unsigned min; 0..59 232 * unsigned hour; 0..23 233 * unsigned day; 1..31 234 * unsigned mon; 0..11 235 * unsigned year; 00... 236 * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set 237 * }; 238 */ 239 240 int q40_hwclk(int op, struct rtc_time *t) 241 { 242 if (op) 243 { /* Write.... */ 244 Q40_RTC_CTRL |= Q40_RTC_WRITE; 245 246 Q40_RTC_SECS = bin2bcd(t->tm_sec); 247 Q40_RTC_MINS = bin2bcd(t->tm_min); 248 Q40_RTC_HOUR = bin2bcd(t->tm_hour); 249 Q40_RTC_DATE = bin2bcd(t->tm_mday); 250 Q40_RTC_MNTH = bin2bcd(t->tm_mon + 1); 251 Q40_RTC_YEAR = bin2bcd(t->tm_year%100); 252 if (t->tm_wday >= 0) 253 Q40_RTC_DOW = bin2bcd(t->tm_wday+1); 254 255 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE); 256 } 257 else 258 { /* Read.... */ 259 Q40_RTC_CTRL |= Q40_RTC_READ; 260 261 t->tm_year = bcd2bin (Q40_RTC_YEAR); 262 t->tm_mon = bcd2bin (Q40_RTC_MNTH)-1; 263 t->tm_mday = bcd2bin (Q40_RTC_DATE); 264 t->tm_hour = bcd2bin (Q40_RTC_HOUR); 265 t->tm_min = bcd2bin (Q40_RTC_MINS); 266 t->tm_sec = bcd2bin (Q40_RTC_SECS); 267 268 Q40_RTC_CTRL &= ~(Q40_RTC_READ); 269 270 if (t->tm_year < 70) 271 t->tm_year += 100; 272 t->tm_wday = bcd2bin(Q40_RTC_DOW)-1; 273 274 } 275 276 return 0; 277 } 278 279 unsigned int q40_get_ss(void) 280 { 281 return bcd2bin(Q40_RTC_SECS); 282 } 283 284 /* 285 * Set the minutes and seconds from seconds value 'nowtime'. Fail if 286 * clock is out by > 30 minutes. Logic lifted from atari code. 287 */ 288 289 int q40_set_clock_mmss (unsigned long nowtime) 290 { 291 int retval = 0; 292 short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; 293 294 int rtc_minutes; 295 296 297 rtc_minutes = bcd2bin (Q40_RTC_MINS); 298 299 if ((rtc_minutes < real_minutes 300 ? real_minutes - rtc_minutes 301 : rtc_minutes - real_minutes) < 30) 302 { 303 Q40_RTC_CTRL |= Q40_RTC_WRITE; 304 Q40_RTC_MINS = bin2bcd(real_minutes); 305 Q40_RTC_SECS = bin2bcd(real_seconds); 306 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE); 307 } 308 else 309 retval = -1; 310 311 312 return retval; 313 } 314 315 316 /* get and set PLL calibration of RTC clock */ 317 #define Q40_RTC_PLL_MASK ((1<<5)-1) 318 #define Q40_RTC_PLL_SIGN (1<<5) 319 320 static int q40_get_rtc_pll(struct rtc_pll_info *pll) 321 { 322 int tmp=Q40_RTC_CTRL; 323 pll->pll_value = tmp & Q40_RTC_PLL_MASK; 324 if (tmp & Q40_RTC_PLL_SIGN) 325 pll->pll_value = -pll->pll_value; 326 pll->pll_max=31; 327 pll->pll_min=-31; 328 pll->pll_posmult=512; 329 pll->pll_negmult=256; 330 pll->pll_clock=125829120; 331 return 0; 332 } 333 334 static int q40_set_rtc_pll(struct rtc_pll_info *pll) 335 { 336 if (!pll->pll_ctrl){ 337 /* the docs are a bit unclear so I am doublesetting */ 338 /* RTC_WRITE here ... */ 339 int tmp = (pll->pll_value & 31) | (pll->pll_value<0 ? 32 : 0) | 340 Q40_RTC_WRITE; 341 Q40_RTC_CTRL |= Q40_RTC_WRITE; 342 Q40_RTC_CTRL = tmp; 343 Q40_RTC_CTRL &= ~(Q40_RTC_WRITE); 344 return 0; 345 } else 346 return -EINVAL; 347 } 348