1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Based upon linux/arch/m68k/mm/sun3mmu.c 4 * Based upon linux/arch/ppc/mm/mmu_context.c 5 * 6 * Implementations of mm routines specific to the Coldfire MMU. 7 * 8 * Copyright (c) 2008 Freescale Semiconductor, Inc. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/types.h> 13 #include <linux/mm.h> 14 #include <linux/init.h> 15 #include <linux/string.h> 16 #include <linux/memblock.h> 17 18 #include <asm/setup.h> 19 #include <asm/page.h> 20 #include <asm/mmu_context.h> 21 #include <asm/mcf_pgalloc.h> 22 #include <asm/tlbflush.h> 23 24 #define KMAPAREA(x) ((x >= VMALLOC_START) && (x < KMAP_END)) 25 26 mm_context_t next_mmu_context; 27 unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1]; 28 atomic_t nr_free_contexts; 29 struct mm_struct *context_mm[LAST_CONTEXT+1]; 30 unsigned long num_pages; 31 32 /* 33 * ColdFire paging_init derived from sun3. 34 */ 35 void __init paging_init(void) 36 { 37 pgd_t *pg_dir; 38 pte_t *pg_table; 39 unsigned long address, size; 40 unsigned long next_pgtable, bootmem_end; 41 unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0 }; 42 int i; 43 44 empty_zero_page = (void *) memblock_alloc(PAGE_SIZE, PAGE_SIZE); 45 if (!empty_zero_page) 46 panic("%s: Failed to allocate %lu bytes align=0x%lx\n", 47 __func__, PAGE_SIZE, PAGE_SIZE); 48 49 pg_dir = swapper_pg_dir; 50 memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir)); 51 52 size = num_pages * sizeof(pte_t); 53 size = (size + PAGE_SIZE) & ~(PAGE_SIZE-1); 54 next_pgtable = (unsigned long) memblock_alloc(size, PAGE_SIZE); 55 if (!next_pgtable) 56 panic("%s: Failed to allocate %lu bytes align=0x%lx\n", 57 __func__, size, PAGE_SIZE); 58 59 bootmem_end = (next_pgtable + size + PAGE_SIZE) & PAGE_MASK; 60 pg_dir += PAGE_OFFSET >> PGDIR_SHIFT; 61 62 address = PAGE_OFFSET; 63 while (address < (unsigned long)high_memory) { 64 pg_table = (pte_t *) next_pgtable; 65 next_pgtable += PTRS_PER_PTE * sizeof(pte_t); 66 pgd_val(*pg_dir) = (unsigned long) pg_table; 67 pg_dir++; 68 69 /* now change pg_table to kernel virtual addresses */ 70 for (i = 0; i < PTRS_PER_PTE; ++i, ++pg_table) { 71 pte_t pte = pfn_pte(virt_to_pfn(address), PAGE_INIT); 72 if (address >= (unsigned long) high_memory) 73 pte_val(pte) = 0; 74 75 set_pte(pg_table, pte); 76 address += PAGE_SIZE; 77 } 78 } 79 80 current->mm = NULL; 81 max_zone_pfn[ZONE_DMA] = PFN_DOWN(_ramend); 82 free_area_init(max_zone_pfn); 83 } 84 85 int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) 86 { 87 unsigned long flags, mmuar, mmutr; 88 struct mm_struct *mm; 89 pgd_t *pgd; 90 p4d_t *p4d; 91 pud_t *pud; 92 pmd_t *pmd; 93 pte_t *pte; 94 int asid; 95 96 local_irq_save(flags); 97 98 mmuar = (dtlb) ? mmu_read(MMUAR) : 99 regs->pc + (extension_word * sizeof(long)); 100 101 mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm; 102 if (!mm) { 103 local_irq_restore(flags); 104 return -1; 105 } 106 107 pgd = pgd_offset(mm, mmuar); 108 if (pgd_none(*pgd)) { 109 local_irq_restore(flags); 110 return -1; 111 } 112 113 p4d = p4d_offset(pgd, mmuar); 114 if (p4d_none(*p4d)) { 115 local_irq_restore(flags); 116 return -1; 117 } 118 119 pud = pud_offset(p4d, mmuar); 120 if (pud_none(*pud)) { 121 local_irq_restore(flags); 122 return -1; 123 } 124 125 pmd = pmd_offset(pud, mmuar); 126 if (pmd_none(*pmd)) { 127 local_irq_restore(flags); 128 return -1; 129 } 130 131 pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar) 132 : pte_offset_map(pmd, mmuar); 133 if (pte_none(*pte) || !pte_present(*pte)) { 134 local_irq_restore(flags); 135 return -1; 136 } 137 138 if (write) { 139 if (!pte_write(*pte)) { 140 local_irq_restore(flags); 141 return -1; 142 } 143 set_pte(pte, pte_mkdirty(*pte)); 144 } 145 146 set_pte(pte, pte_mkyoung(*pte)); 147 asid = mm->context & 0xff; 148 if (!pte_dirty(*pte) && !KMAPAREA(mmuar)) 149 set_pte(pte, pte_wrprotect(*pte)); 150 151 mmutr = (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) | MMUTR_V; 152 if ((mmuar < TASK_UNMAPPED_BASE) || (mmuar >= TASK_SIZE)) 153 mmutr |= (pte->pte & CF_PAGE_MMUTR_MASK) >> CF_PAGE_MMUTR_SHIFT; 154 mmu_write(MMUTR, mmutr); 155 156 mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) | 157 ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X); 158 159 if (dtlb) 160 mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA); 161 else 162 mmu_write(MMUOR, MMUOR_ITLB | MMUOR_ACC | MMUOR_UAA); 163 164 local_irq_restore(flags); 165 return 0; 166 } 167 168 void __init cf_bootmem_alloc(void) 169 { 170 unsigned long memstart; 171 172 /* _rambase and _ramend will be naturally page aligned */ 173 m68k_memory[0].addr = _rambase; 174 m68k_memory[0].size = _ramend - _rambase; 175 176 memblock_add_node(m68k_memory[0].addr, m68k_memory[0].size, 0); 177 178 /* compute total pages in system */ 179 num_pages = PFN_DOWN(_ramend - _rambase); 180 181 /* page numbers */ 182 memstart = PAGE_ALIGN(_ramstart); 183 min_low_pfn = PFN_DOWN(_rambase); 184 max_pfn = max_low_pfn = PFN_DOWN(_ramend); 185 high_memory = (void *)_ramend; 186 187 /* Reserve kernel text/data/bss */ 188 memblock_reserve(_rambase, memstart - _rambase); 189 190 m68k_virt_to_node_shift = fls(_ramend - 1) - 6; 191 module_fixup(NULL, __start_fixup, __stop_fixup); 192 193 /* setup node data */ 194 m68k_setup_node(0); 195 } 196 197 /* 198 * Initialize the context management stuff. 199 * The following was taken from arch/ppc/mmu_context.c 200 */ 201 void __init cf_mmu_context_init(void) 202 { 203 /* 204 * Some processors have too few contexts to reserve one for 205 * init_mm, and require using context 0 for a normal task. 206 * Other processors reserve the use of context zero for the kernel. 207 * This code assumes FIRST_CONTEXT < 32. 208 */ 209 context_map[0] = (1 << FIRST_CONTEXT) - 1; 210 next_mmu_context = FIRST_CONTEXT; 211 atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1); 212 } 213 214 /* 215 * Steal a context from a task that has one at the moment. 216 * This is only used on 8xx and 4xx and we presently assume that 217 * they don't do SMP. If they do then thicfpgalloc.hs will have to check 218 * whether the MM we steal is in use. 219 * We also assume that this is only used on systems that don't 220 * use an MMU hash table - this is true for 8xx and 4xx. 221 * This isn't an LRU system, it just frees up each context in 222 * turn (sort-of pseudo-random replacement :). This would be the 223 * place to implement an LRU scheme if anyone was motivated to do it. 224 * -- paulus 225 */ 226 void steal_context(void) 227 { 228 struct mm_struct *mm; 229 /* 230 * free up context `next_mmu_context' 231 * if we shouldn't free context 0, don't... 232 */ 233 if (next_mmu_context < FIRST_CONTEXT) 234 next_mmu_context = FIRST_CONTEXT; 235 mm = context_mm[next_mmu_context]; 236 flush_tlb_mm(mm); 237 destroy_context(mm); 238 } 239 240