1 /* 2 * Operating System Services (OSS) chip handling 3 * Written by Joshua M. Thompson (funaho@jurai.org) 4 * 5 * 6 * This chip is used in the IIfx in place of VIA #2. It acts like a fancy 7 * VIA chip with prorammable interrupt levels. 8 * 9 * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some 10 * recent insights into OSS operational details. 11 * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped 12 * to mostly match the A/UX interrupt scheme supported on the 13 * VIA side. Also added support for enabling the ISM irq again 14 * since we now have a functional IOP manager. 15 */ 16 17 #include <linux/types.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/irq.h> 23 24 #include <asm/macintosh.h> 25 #include <asm/macints.h> 26 #include <asm/mac_via.h> 27 #include <asm/mac_oss.h> 28 29 int oss_present; 30 volatile struct mac_oss *oss; 31 32 /* 33 * Initialize the OSS 34 * 35 * The OSS "detection" code is actually in via_init() which is always called 36 * before us. Thus we can count on oss_present being valid on entry. 37 */ 38 39 void __init oss_init(void) 40 { 41 int i; 42 43 if (!oss_present) return; 44 45 oss = (struct mac_oss *) OSS_BASE; 46 47 /* Disable all interrupts. Unlike a VIA it looks like we */ 48 /* do this by setting the source's interrupt level to zero. */ 49 50 for (i = 0; i < OSS_NUM_SOURCES; i++) 51 oss->irq_level[i] = 0; 52 } 53 54 /* 55 * Initialize OSS for Nubus access 56 */ 57 58 void __init oss_nubus_init(void) 59 { 60 } 61 62 /* 63 * Handle miscellaneous OSS interrupts. 64 */ 65 66 static void oss_irq(unsigned int irq, struct irq_desc *desc) 67 { 68 int events = oss->irq_pending & 69 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM); 70 71 #ifdef DEBUG_IRQS 72 if ((console_loglevel == 10) && !(events & OSS_IP_SCSI)) { 73 printk("oss_irq: irq %u events = 0x%04X\n", irq, 74 (int) oss->irq_pending); 75 } 76 #endif 77 78 if (events & OSS_IP_IOPSCC) { 79 oss->irq_pending &= ~OSS_IP_IOPSCC; 80 generic_handle_irq(IRQ_MAC_SCC); 81 } 82 83 if (events & OSS_IP_SCSI) { 84 oss->irq_pending &= ~OSS_IP_SCSI; 85 generic_handle_irq(IRQ_MAC_SCSI); 86 } 87 88 if (events & OSS_IP_IOPISM) { 89 oss->irq_pending &= ~OSS_IP_IOPISM; 90 generic_handle_irq(IRQ_MAC_ADB); 91 } 92 } 93 94 /* 95 * Nubus IRQ handler, OSS style 96 * 97 * Unlike the VIA/RBV this is on its own autovector interrupt level. 98 */ 99 100 static void oss_nubus_irq(unsigned int irq, struct irq_desc *desc) 101 { 102 int events, irq_bit, i; 103 104 events = oss->irq_pending & OSS_IP_NUBUS; 105 if (!events) 106 return; 107 108 #ifdef DEBUG_NUBUS_INT 109 if (console_loglevel > 7) { 110 printk("oss_nubus_irq: events = 0x%04X\n", events); 111 } 112 #endif 113 /* There are only six slots on the OSS, not seven */ 114 115 i = 6; 116 irq_bit = 0x40; 117 do { 118 --i; 119 irq_bit >>= 1; 120 if (events & irq_bit) { 121 oss->irq_pending &= ~irq_bit; 122 generic_handle_irq(NUBUS_SOURCE_BASE + i); 123 } 124 } while(events & (irq_bit - 1)); 125 } 126 127 /* 128 * Register the OSS and NuBus interrupt dispatchers. 129 * 130 * This IRQ mapping is laid out with two things in mind: first, we try to keep 131 * things on their own levels to avoid having to do double-dispatches. Second, 132 * the levels match as closely as possible the alternate IRQ mapping mode (aka 133 * "A/UX mode") available on some VIA machines. 134 */ 135 136 #define OSS_IRQLEV_IOPISM IRQ_AUTO_1 137 #define OSS_IRQLEV_SCSI IRQ_AUTO_2 138 #define OSS_IRQLEV_NUBUS IRQ_AUTO_3 139 #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 140 #define OSS_IRQLEV_VIA1 IRQ_AUTO_6 141 142 void __init oss_register_interrupts(void) 143 { 144 irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq); 145 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq); 146 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); 147 irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq); 148 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); 149 150 /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */ 151 oss->irq_level[OSS_VIA1] = IRQ_AUTO_6; 152 } 153 154 /* 155 * Enable an OSS interrupt 156 * 157 * It looks messy but it's rather straightforward. The switch() statement 158 * just maps the machspec interrupt numbers to the right OSS interrupt 159 * source (if the OSS handles that interrupt) and then sets the interrupt 160 * level for that source to nonzero, thus enabling the interrupt. 161 */ 162 163 void oss_irq_enable(int irq) { 164 #ifdef DEBUG_IRQUSE 165 printk("oss_irq_enable(%d)\n", irq); 166 #endif 167 switch(irq) { 168 case IRQ_MAC_SCC: 169 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; 170 return; 171 case IRQ_MAC_ADB: 172 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; 173 return; 174 case IRQ_MAC_SCSI: 175 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; 176 return; 177 case IRQ_NUBUS_9: 178 case IRQ_NUBUS_A: 179 case IRQ_NUBUS_B: 180 case IRQ_NUBUS_C: 181 case IRQ_NUBUS_D: 182 case IRQ_NUBUS_E: 183 irq -= NUBUS_SOURCE_BASE; 184 oss->irq_level[irq] = OSS_IRQLEV_NUBUS; 185 return; 186 } 187 188 if (IRQ_SRC(irq) == 1) 189 via_irq_enable(irq); 190 } 191 192 /* 193 * Disable an OSS interrupt 194 * 195 * Same as above except we set the source's interrupt level to zero, 196 * to disable the interrupt. 197 */ 198 199 void oss_irq_disable(int irq) { 200 #ifdef DEBUG_IRQUSE 201 printk("oss_irq_disable(%d)\n", irq); 202 #endif 203 switch(irq) { 204 case IRQ_MAC_SCC: 205 oss->irq_level[OSS_IOPSCC] = 0; 206 return; 207 case IRQ_MAC_ADB: 208 oss->irq_level[OSS_IOPISM] = 0; 209 return; 210 case IRQ_MAC_SCSI: 211 oss->irq_level[OSS_SCSI] = 0; 212 return; 213 case IRQ_NUBUS_9: 214 case IRQ_NUBUS_A: 215 case IRQ_NUBUS_B: 216 case IRQ_NUBUS_C: 217 case IRQ_NUBUS_D: 218 case IRQ_NUBUS_E: 219 irq -= NUBUS_SOURCE_BASE; 220 oss->irq_level[irq] = 0; 221 return; 222 } 223 224 if (IRQ_SRC(irq) == 1) 225 via_irq_disable(irq); 226 } 227