1 /* 2 * Operating System Services (OSS) chip handling 3 * Written by Joshua M. Thompson (funaho@jurai.org) 4 * 5 * 6 * This chip is used in the IIfx in place of VIA #2. It acts like a fancy 7 * VIA chip with prorammable interrupt levels. 8 * 9 * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some 10 * recent insights into OSS operational details. 11 * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped 12 * to mostly match the A/UX interrupt scheme supported on the 13 * VIA side. Also added support for enabling the ISM irq again 14 * since we now have a functional IOP manager. 15 */ 16 17 #include <linux/types.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/irq.h> 23 24 #include <asm/macintosh.h> 25 #include <asm/macints.h> 26 #include <asm/mac_via.h> 27 #include <asm/mac_oss.h> 28 29 int oss_present; 30 volatile struct mac_oss *oss; 31 32 /* 33 * Initialize the OSS 34 * 35 * The OSS "detection" code is actually in via_init() which is always called 36 * before us. Thus we can count on oss_present being valid on entry. 37 */ 38 39 void __init oss_init(void) 40 { 41 int i; 42 43 if (!oss_present) return; 44 45 oss = (struct mac_oss *) OSS_BASE; 46 47 /* Disable all interrupts. Unlike a VIA it looks like we */ 48 /* do this by setting the source's interrupt level to zero. */ 49 50 for (i = 0; i < OSS_NUM_SOURCES; i++) 51 oss->irq_level[i] = 0; 52 } 53 54 /* 55 * Initialize OSS for Nubus access 56 */ 57 58 void __init oss_nubus_init(void) 59 { 60 } 61 62 /* 63 * Handle miscellaneous OSS interrupts. 64 */ 65 66 static void oss_irq(struct irq_desc *desc) 67 { 68 int events = oss->irq_pending & 69 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM); 70 71 if (events & OSS_IP_IOPSCC) { 72 oss->irq_pending &= ~OSS_IP_IOPSCC; 73 generic_handle_irq(IRQ_MAC_SCC); 74 } 75 76 if (events & OSS_IP_SCSI) { 77 oss->irq_pending &= ~OSS_IP_SCSI; 78 generic_handle_irq(IRQ_MAC_SCSI); 79 } 80 81 if (events & OSS_IP_IOPISM) { 82 oss->irq_pending &= ~OSS_IP_IOPISM; 83 generic_handle_irq(IRQ_MAC_ADB); 84 } 85 } 86 87 /* 88 * Nubus IRQ handler, OSS style 89 * 90 * Unlike the VIA/RBV this is on its own autovector interrupt level. 91 */ 92 93 static void oss_nubus_irq(struct irq_desc *desc) 94 { 95 int events, irq_bit, i; 96 97 events = oss->irq_pending & OSS_IP_NUBUS; 98 if (!events) 99 return; 100 101 /* There are only six slots on the OSS, not seven */ 102 103 i = 6; 104 irq_bit = 0x40; 105 do { 106 --i; 107 irq_bit >>= 1; 108 if (events & irq_bit) { 109 oss->irq_pending &= ~irq_bit; 110 generic_handle_irq(NUBUS_SOURCE_BASE + i); 111 } 112 } while(events & (irq_bit - 1)); 113 } 114 115 /* 116 * Register the OSS and NuBus interrupt dispatchers. 117 * 118 * This IRQ mapping is laid out with two things in mind: first, we try to keep 119 * things on their own levels to avoid having to do double-dispatches. Second, 120 * the levels match as closely as possible the alternate IRQ mapping mode (aka 121 * "A/UX mode") available on some VIA machines. 122 */ 123 124 #define OSS_IRQLEV_IOPISM IRQ_AUTO_1 125 #define OSS_IRQLEV_SCSI IRQ_AUTO_2 126 #define OSS_IRQLEV_NUBUS IRQ_AUTO_3 127 #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 128 #define OSS_IRQLEV_VIA1 IRQ_AUTO_6 129 130 void __init oss_register_interrupts(void) 131 { 132 irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq); 133 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq); 134 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); 135 irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq); 136 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); 137 138 /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */ 139 oss->irq_level[OSS_VIA1] = IRQ_AUTO_6; 140 } 141 142 /* 143 * Enable an OSS interrupt 144 * 145 * It looks messy but it's rather straightforward. The switch() statement 146 * just maps the machspec interrupt numbers to the right OSS interrupt 147 * source (if the OSS handles that interrupt) and then sets the interrupt 148 * level for that source to nonzero, thus enabling the interrupt. 149 */ 150 151 void oss_irq_enable(int irq) { 152 switch(irq) { 153 case IRQ_MAC_SCC: 154 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; 155 return; 156 case IRQ_MAC_ADB: 157 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; 158 return; 159 case IRQ_MAC_SCSI: 160 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; 161 return; 162 case IRQ_NUBUS_9: 163 case IRQ_NUBUS_A: 164 case IRQ_NUBUS_B: 165 case IRQ_NUBUS_C: 166 case IRQ_NUBUS_D: 167 case IRQ_NUBUS_E: 168 irq -= NUBUS_SOURCE_BASE; 169 oss->irq_level[irq] = OSS_IRQLEV_NUBUS; 170 return; 171 } 172 173 if (IRQ_SRC(irq) == 1) 174 via_irq_enable(irq); 175 } 176 177 /* 178 * Disable an OSS interrupt 179 * 180 * Same as above except we set the source's interrupt level to zero, 181 * to disable the interrupt. 182 */ 183 184 void oss_irq_disable(int irq) { 185 switch(irq) { 186 case IRQ_MAC_SCC: 187 oss->irq_level[OSS_IOPSCC] = 0; 188 return; 189 case IRQ_MAC_ADB: 190 oss->irq_level[OSS_IOPISM] = 0; 191 return; 192 case IRQ_MAC_SCSI: 193 oss->irq_level[OSS_SCSI] = 0; 194 return; 195 case IRQ_NUBUS_9: 196 case IRQ_NUBUS_A: 197 case IRQ_NUBUS_B: 198 case IRQ_NUBUS_C: 199 case IRQ_NUBUS_D: 200 case IRQ_NUBUS_E: 201 irq -= NUBUS_SOURCE_BASE; 202 oss->irq_level[irq] = 0; 203 return; 204 } 205 206 if (IRQ_SRC(irq) == 1) 207 via_irq_disable(irq); 208 } 209