1 /* 2 * Operating System Services (OSS) chip handling 3 * Written by Joshua M. Thompson (funaho@jurai.org) 4 * 5 * 6 * This chip is used in the IIfx in place of VIA #2. It acts like a fancy 7 * VIA chip with prorammable interrupt levels. 8 * 9 * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some 10 * recent insights into OSS operational details. 11 * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped 12 * to mostly match the A/UX interrupt scheme supported on the 13 * VIA side. Also added support for enabling the ISM irq again 14 * since we now have a functional IOP manager. 15 */ 16 17 #include <linux/types.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/irq.h> 23 24 #include <asm/macintosh.h> 25 #include <asm/macints.h> 26 #include <asm/mac_via.h> 27 #include <asm/mac_oss.h> 28 29 int oss_present; 30 volatile struct mac_oss *oss; 31 32 /* 33 * Initialize the OSS 34 */ 35 36 void __init oss_init(void) 37 { 38 int i; 39 40 if (macintosh_config->ident != MAC_MODEL_IIFX) 41 return; 42 43 oss = (struct mac_oss *) OSS_BASE; 44 pr_debug("OSS detected at %p", oss); 45 oss_present = 1; 46 47 /* Disable all interrupts. Unlike a VIA it looks like we */ 48 /* do this by setting the source's interrupt level to zero. */ 49 50 for (i = 0; i < OSS_NUM_SOURCES; i++) 51 oss->irq_level[i] = 0; 52 } 53 54 /* 55 * Handle miscellaneous OSS interrupts. 56 */ 57 58 static void oss_irq(struct irq_desc *desc) 59 { 60 int events = oss->irq_pending & 61 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM); 62 63 if (events & OSS_IP_IOPSCC) { 64 oss->irq_pending &= ~OSS_IP_IOPSCC; 65 generic_handle_irq(IRQ_MAC_SCC); 66 } 67 68 if (events & OSS_IP_SCSI) { 69 oss->irq_pending &= ~OSS_IP_SCSI; 70 generic_handle_irq(IRQ_MAC_SCSI); 71 } 72 73 if (events & OSS_IP_IOPISM) { 74 oss->irq_pending &= ~OSS_IP_IOPISM; 75 generic_handle_irq(IRQ_MAC_ADB); 76 } 77 } 78 79 /* 80 * Nubus IRQ handler, OSS style 81 * 82 * Unlike the VIA/RBV this is on its own autovector interrupt level. 83 */ 84 85 static void oss_nubus_irq(struct irq_desc *desc) 86 { 87 int events, irq_bit, i; 88 89 events = oss->irq_pending & OSS_IP_NUBUS; 90 if (!events) 91 return; 92 93 /* There are only six slots on the OSS, not seven */ 94 95 i = 6; 96 irq_bit = 0x40; 97 do { 98 --i; 99 irq_bit >>= 1; 100 if (events & irq_bit) { 101 oss->irq_pending &= ~irq_bit; 102 generic_handle_irq(NUBUS_SOURCE_BASE + i); 103 } 104 } while(events & (irq_bit - 1)); 105 } 106 107 /* 108 * Register the OSS and NuBus interrupt dispatchers. 109 * 110 * This IRQ mapping is laid out with two things in mind: first, we try to keep 111 * things on their own levels to avoid having to do double-dispatches. Second, 112 * the levels match as closely as possible the alternate IRQ mapping mode (aka 113 * "A/UX mode") available on some VIA machines. 114 */ 115 116 #define OSS_IRQLEV_IOPISM IRQ_AUTO_1 117 #define OSS_IRQLEV_SCSI IRQ_AUTO_2 118 #define OSS_IRQLEV_NUBUS IRQ_AUTO_3 119 #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 120 #define OSS_IRQLEV_VIA1 IRQ_AUTO_6 121 122 void __init oss_register_interrupts(void) 123 { 124 irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq); 125 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq); 126 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); 127 irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq); 128 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); 129 130 /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */ 131 oss->irq_level[OSS_VIA1] = IRQ_AUTO_6; 132 } 133 134 /* 135 * Enable an OSS interrupt 136 * 137 * It looks messy but it's rather straightforward. The switch() statement 138 * just maps the machspec interrupt numbers to the right OSS interrupt 139 * source (if the OSS handles that interrupt) and then sets the interrupt 140 * level for that source to nonzero, thus enabling the interrupt. 141 */ 142 143 void oss_irq_enable(int irq) { 144 switch(irq) { 145 case IRQ_MAC_SCC: 146 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; 147 return; 148 case IRQ_MAC_ADB: 149 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; 150 return; 151 case IRQ_MAC_SCSI: 152 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; 153 return; 154 case IRQ_NUBUS_9: 155 case IRQ_NUBUS_A: 156 case IRQ_NUBUS_B: 157 case IRQ_NUBUS_C: 158 case IRQ_NUBUS_D: 159 case IRQ_NUBUS_E: 160 irq -= NUBUS_SOURCE_BASE; 161 oss->irq_level[irq] = OSS_IRQLEV_NUBUS; 162 return; 163 } 164 165 if (IRQ_SRC(irq) == 1) 166 via_irq_enable(irq); 167 } 168 169 /* 170 * Disable an OSS interrupt 171 * 172 * Same as above except we set the source's interrupt level to zero, 173 * to disable the interrupt. 174 */ 175 176 void oss_irq_disable(int irq) { 177 switch(irq) { 178 case IRQ_MAC_SCC: 179 oss->irq_level[OSS_IOPSCC] = 0; 180 return; 181 case IRQ_MAC_ADB: 182 oss->irq_level[OSS_IOPISM] = 0; 183 return; 184 case IRQ_MAC_SCSI: 185 oss->irq_level[OSS_SCSI] = 0; 186 return; 187 case IRQ_NUBUS_9: 188 case IRQ_NUBUS_A: 189 case IRQ_NUBUS_B: 190 case IRQ_NUBUS_C: 191 case IRQ_NUBUS_D: 192 case IRQ_NUBUS_E: 193 irq -= NUBUS_SOURCE_BASE; 194 oss->irq_level[irq] = 0; 195 return; 196 } 197 198 if (IRQ_SRC(irq) == 1) 199 via_irq_disable(irq); 200 } 201