1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Operating System Services (OSS) chip handling 4 * Written by Joshua M. Thompson (funaho@jurai.org) 5 * 6 * 7 * This chip is used in the IIfx in place of VIA #2. It acts like a fancy 8 * VIA chip with prorammable interrupt levels. 9 * 10 * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some 11 * recent insights into OSS operational details. 12 * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped 13 * to mostly match the A/UX interrupt scheme supported on the 14 * VIA side. Also added support for enabling the ISM irq again 15 * since we now have a functional IOP manager. 16 */ 17 18 #include <linux/types.h> 19 #include <linux/kernel.h> 20 #include <linux/mm.h> 21 #include <linux/delay.h> 22 #include <linux/init.h> 23 #include <linux/irq.h> 24 25 #include <asm/macintosh.h> 26 #include <asm/macints.h> 27 #include <asm/mac_via.h> 28 #include <asm/mac_oss.h> 29 30 int oss_present; 31 volatile struct mac_oss *oss; 32 33 /* 34 * Initialize the OSS 35 */ 36 37 void __init oss_init(void) 38 { 39 int i; 40 41 if (macintosh_config->ident != MAC_MODEL_IIFX) 42 return; 43 44 oss = (struct mac_oss *) OSS_BASE; 45 pr_debug("OSS detected at %p", oss); 46 oss_present = 1; 47 48 /* Disable all interrupts. Unlike a VIA it looks like we */ 49 /* do this by setting the source's interrupt level to zero. */ 50 51 for (i = 0; i < OSS_NUM_SOURCES; i++) 52 oss->irq_level[i] = 0; 53 } 54 55 /* 56 * Handle miscellaneous OSS interrupts. 57 */ 58 59 static void oss_irq(struct irq_desc *desc) 60 { 61 int events = oss->irq_pending & 62 (OSS_IP_IOPSCC | OSS_IP_SCSI | OSS_IP_IOPISM); 63 64 if (events & OSS_IP_IOPSCC) { 65 oss->irq_pending &= ~OSS_IP_IOPSCC; 66 generic_handle_irq(IRQ_MAC_SCC); 67 } 68 69 if (events & OSS_IP_SCSI) { 70 oss->irq_pending &= ~OSS_IP_SCSI; 71 generic_handle_irq(IRQ_MAC_SCSI); 72 } 73 74 if (events & OSS_IP_IOPISM) { 75 oss->irq_pending &= ~OSS_IP_IOPISM; 76 generic_handle_irq(IRQ_MAC_ADB); 77 } 78 } 79 80 /* 81 * Nubus IRQ handler, OSS style 82 * 83 * Unlike the VIA/RBV this is on its own autovector interrupt level. 84 */ 85 86 static void oss_nubus_irq(struct irq_desc *desc) 87 { 88 int events, irq_bit, i; 89 90 events = oss->irq_pending & OSS_IP_NUBUS; 91 if (!events) 92 return; 93 94 /* There are only six slots on the OSS, not seven */ 95 96 i = 6; 97 irq_bit = 0x40; 98 do { 99 --i; 100 irq_bit >>= 1; 101 if (events & irq_bit) { 102 oss->irq_pending &= ~irq_bit; 103 generic_handle_irq(NUBUS_SOURCE_BASE + i); 104 } 105 } while(events & (irq_bit - 1)); 106 } 107 108 /* 109 * Register the OSS and NuBus interrupt dispatchers. 110 * 111 * This IRQ mapping is laid out with two things in mind: first, we try to keep 112 * things on their own levels to avoid having to do double-dispatches. Second, 113 * the levels match as closely as possible the alternate IRQ mapping mode (aka 114 * "A/UX mode") available on some VIA machines. 115 */ 116 117 #define OSS_IRQLEV_IOPISM IRQ_AUTO_1 118 #define OSS_IRQLEV_SCSI IRQ_AUTO_2 119 #define OSS_IRQLEV_NUBUS IRQ_AUTO_3 120 #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4 121 #define OSS_IRQLEV_VIA1 IRQ_AUTO_6 122 123 void __init oss_register_interrupts(void) 124 { 125 irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_irq); 126 irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_irq); 127 irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq); 128 irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_irq); 129 irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq); 130 131 /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */ 132 oss->irq_level[OSS_VIA1] = IRQ_AUTO_6; 133 } 134 135 /* 136 * Enable an OSS interrupt 137 * 138 * It looks messy but it's rather straightforward. The switch() statement 139 * just maps the machspec interrupt numbers to the right OSS interrupt 140 * source (if the OSS handles that interrupt) and then sets the interrupt 141 * level for that source to nonzero, thus enabling the interrupt. 142 */ 143 144 void oss_irq_enable(int irq) { 145 switch(irq) { 146 case IRQ_MAC_SCC: 147 oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC; 148 return; 149 case IRQ_MAC_ADB: 150 oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM; 151 return; 152 case IRQ_MAC_SCSI: 153 oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI; 154 return; 155 case IRQ_NUBUS_9: 156 case IRQ_NUBUS_A: 157 case IRQ_NUBUS_B: 158 case IRQ_NUBUS_C: 159 case IRQ_NUBUS_D: 160 case IRQ_NUBUS_E: 161 irq -= NUBUS_SOURCE_BASE; 162 oss->irq_level[irq] = OSS_IRQLEV_NUBUS; 163 return; 164 } 165 166 if (IRQ_SRC(irq) == 1) 167 via_irq_enable(irq); 168 } 169 170 /* 171 * Disable an OSS interrupt 172 * 173 * Same as above except we set the source's interrupt level to zero, 174 * to disable the interrupt. 175 */ 176 177 void oss_irq_disable(int irq) { 178 switch(irq) { 179 case IRQ_MAC_SCC: 180 oss->irq_level[OSS_IOPSCC] = 0; 181 return; 182 case IRQ_MAC_ADB: 183 oss->irq_level[OSS_IOPISM] = 0; 184 return; 185 case IRQ_MAC_SCSI: 186 oss->irq_level[OSS_SCSI] = 0; 187 return; 188 case IRQ_NUBUS_9: 189 case IRQ_NUBUS_A: 190 case IRQ_NUBUS_B: 191 case IRQ_NUBUS_C: 192 case IRQ_NUBUS_D: 193 case IRQ_NUBUS_E: 194 irq -= NUBUS_SOURCE_BASE; 195 oss->irq_level[irq] = 0; 196 return; 197 } 198 199 if (IRQ_SRC(irq) == 1) 200 via_irq_disable(irq); 201 } 202