xref: /openbmc/linux/arch/m68k/mac/macints.c (revision 56e63689)
1 /*
2  *	Macintosh interrupts
3  *
4  * General design:
5  * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
6  * exclusively use the autovector interrupts (the 'generic level0-level7'
7  * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
8  * are used:
9  *	1	- VIA1
10  *		  - slot 0: one second interrupt (CA2)
11  *		  - slot 1: VBlank (CA1)
12  *		  - slot 2: ADB data ready (SR full)
13  *		  - slot 3: ADB data  (CB2)
14  *		  - slot 4: ADB clock (CB1)
15  *		  - slot 5: timer 2
16  *		  - slot 6: timer 1
17  *		  - slot 7: status of IRQ; signals 'any enabled int.'
18  *
19  *	2	- VIA2 or RBV
20  *		  - slot 0: SCSI DRQ (CA2)
21  *		  - slot 1: NUBUS IRQ (CA1) need to read port A to find which
22  *		  - slot 2: /EXP IRQ (only on IIci)
23  *		  - slot 3: SCSI IRQ (CB2)
24  *		  - slot 4: ASC IRQ (CB1)
25  *		  - slot 5: timer 2 (not on IIci)
26  *		  - slot 6: timer 1 (not on IIci)
27  *		  - slot 7: status of IRQ; signals 'any enabled int.'
28  *
29  *	2	- OSS (IIfx only?)
30  *		  - slot 0: SCSI interrupt
31  *		  - slot 1: Sound interrupt
32  *
33  * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
34  *
35  *	3	- unused (?)
36  *
37  *	4	- SCC
38  *
39  *	5	- unused (?)
40  *		  [serial errors or special conditions seem to raise level 6
41  *		  interrupts on some models (LC4xx?)]
42  *
43  *	6	- off switch (?)
44  *
45  * For OSS Macintoshes (IIfx only at this point):
46  *
47  *	3	- Nubus interrupt
48  *		  - slot 0: Slot $9
49  *		  - slot 1: Slot $A
50  *		  - slot 2: Slot $B
51  *		  - slot 3: Slot $C
52  *		  - slot 4: Slot $D
53  *		  - slot 5: Slot $E
54  *
55  *	4	- SCC IOP
56  *
57  *	5	- ISM IOP (ADB?)
58  *
59  *	6	- unused
60  *
61  * For PSC Macintoshes (660AV, 840AV):
62  *
63  *	3	- PSC level 3
64  *		  - slot 0: MACE
65  *
66  *	4	- PSC level 4
67  *		  - slot 1: SCC channel A interrupt
68  *		  - slot 2: SCC channel B interrupt
69  *		  - slot 3: MACE DMA
70  *
71  *	5	- PSC level 5
72  *
73  *	6	- PSC level 6
74  *
75  * Finally we have good 'ole level 7, the non-maskable interrupt:
76  *
77  *	7	- NMI (programmer's switch on the back of some Macs)
78  *		  Also RAM parity error on models which support it (IIc, IIfx?)
79  *
80  * The current interrupt logic looks something like this:
81  *
82  * - We install dispatchers for the autovector interrupts (1-7). These
83  *   dispatchers are responsible for querying the hardware (the
84  *   VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
85  *   this information a machspec interrupt number is generated by placing the
86  *   index of the interrupt hardware into the low three bits and the original
87  *   autovector interrupt number in the upper 5 bits. The handlers for the
88  *   resulting machspec interrupt are then called.
89  *
90  * - Nubus is a special case because its interrupts are hidden behind two
91  *   layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
92  *   which translates to IRQ number 17. In this spot we install _another_
93  *   dispatcher. This dispatcher finds the interrupting slot number (9-F) and
94  *   then forms a new machspec interrupt number as above with the slot number
95  *   minus 9 in the low three bits and the pseudo-level 7 in the upper five
96  *   bits.  The handlers for this new machspec interrupt number are then
97  *   called. This puts Nubus interrupts into the range 56-62.
98  *
99  * - The Baboon interrupts (used on some PowerBooks) are an even more special
100  *   case. They're hidden behind the Nubus slot $C interrupt thus adding a
101  *   third layer of indirection. Why oh why did the Apple engineers do that?
102  *
103  * - We support "fast" and "slow" handlers, just like the Amiga port. The
104  *   fast handlers are called first and with all interrupts disabled. They
105  *   are expected to execute quickly (hence the name). The slow handlers are
106  *   called last with interrupts enabled and the interrupt level restored.
107  *   They must therefore be reentrant.
108  *
109  *   TODO:
110  *
111  */
112 
113 #include <linux/module.h>
114 #include <linux/types.h>
115 #include <linux/kernel.h>
116 #include <linux/sched.h>
117 #include <linux/kernel_stat.h>
118 #include <linux/interrupt.h> /* for intr_count */
119 #include <linux/delay.h>
120 #include <linux/seq_file.h>
121 
122 #include <asm/system.h>
123 #include <asm/irq.h>
124 #include <asm/traps.h>
125 #include <asm/bootinfo.h>
126 #include <asm/macintosh.h>
127 #include <asm/mac_via.h>
128 #include <asm/mac_psc.h>
129 #include <asm/hwtest.h>
130 #include <asm/errno.h>
131 #include <asm/macints.h>
132 #include <asm/irq_regs.h>
133 #include <asm/mac_oss.h>
134 
135 #define SHUTUP_SONIC
136 
137 /*
138  * VIA/RBV hooks
139  */
140 
141 extern void via_register_interrupts(void);
142 extern void via_irq_enable(int);
143 extern void via_irq_disable(int);
144 extern void via_irq_clear(int);
145 extern int  via_irq_pending(int);
146 
147 /*
148  * OSS hooks
149  */
150 
151 extern void oss_register_interrupts(void);
152 extern void oss_irq_enable(int);
153 extern void oss_irq_disable(int);
154 extern void oss_irq_clear(int);
155 extern int  oss_irq_pending(int);
156 
157 /*
158  * PSC hooks
159  */
160 
161 extern void psc_register_interrupts(void);
162 extern void psc_irq_enable(int);
163 extern void psc_irq_disable(int);
164 extern void psc_irq_clear(int);
165 extern int  psc_irq_pending(int);
166 
167 /*
168  * IOP hooks
169  */
170 
171 extern void iop_register_interrupts(void);
172 
173 /*
174  * Baboon hooks
175  */
176 
177 extern int baboon_present;
178 
179 extern void baboon_register_interrupts(void);
180 extern void baboon_irq_enable(int);
181 extern void baboon_irq_disable(int);
182 extern void baboon_irq_clear(int);
183 
184 /*
185  * console_loglevel determines NMI handler function
186  */
187 
188 irqreturn_t mac_nmi_handler(int, void *);
189 irqreturn_t mac_debug_handler(int, void *);
190 
191 /* #define DEBUG_MACINTS */
192 
193 static struct irq_chip mac_irq_chip = {
194 	.name		= "mac",
195 	.irq_enable	= mac_irq_enable,
196 	.irq_disable	= mac_irq_disable,
197 };
198 
199 void __init mac_init_IRQ(void)
200 {
201 #ifdef DEBUG_MACINTS
202 	printk("mac_init_IRQ(): Setting things up...\n");
203 #endif
204 	m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
205 				  NUM_MAC_SOURCES - IRQ_USER);
206 	/* Make sure the SONIC interrupt is cleared or things get ugly */
207 #ifdef SHUTUP_SONIC
208 	printk("Killing onboard sonic... ");
209 	/* This address should hopefully be mapped already */
210 	if (hwreg_present((void*)(0x50f0a000))) {
211 		*(long *)(0x50f0a014) = 0x7fffL;
212 		*(long *)(0x50f0a010) = 0L;
213 	}
214 	printk("Done.\n");
215 #endif /* SHUTUP_SONIC */
216 
217 	/*
218 	 * Now register the handlers for the master IRQ handlers
219 	 * at levels 1-7. Most of the work is done elsewhere.
220 	 */
221 
222 	if (oss_present)
223 		oss_register_interrupts();
224 	else
225 		via_register_interrupts();
226 	if (psc_present)
227 		psc_register_interrupts();
228 	if (baboon_present)
229 		baboon_register_interrupts();
230 	iop_register_interrupts();
231 	if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
232 			mac_nmi_handler))
233 		pr_err("Couldn't register NMI\n");
234 #ifdef DEBUG_MACINTS
235 	printk("mac_init_IRQ(): Done!\n");
236 #endif
237 }
238 
239 /*
240  *  mac_irq_enable - enable an interrupt source
241  * mac_irq_disable - disable an interrupt source
242  * mac_irq_pending - returns the pending status of an IRQ (nonzero = pending)
243  *
244  * These routines are just dispatchers to the VIA/OSS/PSC routines.
245  */
246 
247 void mac_irq_enable(struct irq_data *data)
248 {
249 	int irq = data->irq;
250 	int irq_src = IRQ_SRC(irq);
251 
252 	switch(irq_src) {
253 	case 1:
254 		via_irq_enable(irq);
255 		break;
256 	case 2:
257 	case 7:
258 		if (oss_present)
259 			oss_irq_enable(irq);
260 		else
261 			via_irq_enable(irq);
262 		break;
263 	case 3:
264 	case 5:
265 	case 6:
266 		if (psc_present)
267 			psc_irq_enable(irq);
268 		else if (oss_present)
269 			oss_irq_enable(irq);
270 		break;
271 	case 4:
272 		if (psc_present)
273 			psc_irq_enable(irq);
274 		break;
275 	case 8:
276 		if (baboon_present)
277 			baboon_irq_enable(irq);
278 		break;
279 	}
280 }
281 
282 void mac_irq_disable(struct irq_data *data)
283 {
284 	int irq = data->irq;
285 	int irq_src = IRQ_SRC(irq);
286 
287 	switch(irq_src) {
288 	case 1:
289 		via_irq_disable(irq);
290 		break;
291 	case 2:
292 	case 7:
293 		if (oss_present)
294 			oss_irq_disable(irq);
295 		else
296 			via_irq_disable(irq);
297 		break;
298 	case 3:
299 	case 5:
300 	case 6:
301 		if (psc_present)
302 			psc_irq_disable(irq);
303 		else if (oss_present)
304 			oss_irq_disable(irq);
305 		break;
306 	case 4:
307 		if (psc_present)
308 			psc_irq_disable(irq);
309 		break;
310 	case 8:
311 		if (baboon_present)
312 			baboon_irq_disable(irq);
313 		break;
314 	}
315 }
316 
317 int mac_irq_pending(unsigned int irq)
318 {
319 	switch(IRQ_SRC(irq)) {
320 	case 1:
321 		return via_irq_pending(irq);
322 	case 2:
323 	case 7:
324 		if (oss_present)
325 			return oss_irq_pending(irq);
326 		else
327 			return via_irq_pending(irq);
328 	case 3:
329 	case 5:
330 	case 6:
331 		if (psc_present)
332 			return psc_irq_pending(irq);
333 		else if (oss_present)
334 			return oss_irq_pending(irq);
335 		break;
336 	case 4:
337 		if (psc_present)
338 			return psc_irq_pending(irq);
339 		break;
340 	}
341 	return 0;
342 }
343 EXPORT_SYMBOL(mac_irq_pending);
344 
345 static int num_debug[8];
346 
347 irqreturn_t mac_debug_handler(int irq, void *dev_id)
348 {
349 	if (num_debug[irq] < 10) {
350 		printk("DEBUG: Unexpected IRQ %d\n", irq);
351 		num_debug[irq]++;
352 	}
353 	return IRQ_HANDLED;
354 }
355 
356 static int in_nmi;
357 static volatile int nmi_hold;
358 
359 irqreturn_t mac_nmi_handler(int irq, void *dev_id)
360 {
361 	int i;
362 	/*
363 	 * generate debug output on NMI switch if 'debug' kernel option given
364 	 * (only works with Penguin!)
365 	 */
366 
367 	in_nmi++;
368 	for (i=0; i<100; i++)
369 		udelay(1000);
370 
371 	if (in_nmi == 1) {
372 		nmi_hold = 1;
373 		printk("... pausing, press NMI to resume ...");
374 	} else {
375 		printk(" ok!\n");
376 		nmi_hold = 0;
377 	}
378 
379 	barrier();
380 
381 	while (nmi_hold == 1)
382 		udelay(1000);
383 
384 	if (console_loglevel >= 8) {
385 #if 0
386 		struct pt_regs *fp = get_irq_regs();
387 		show_state();
388 		printk("PC: %08lx\nSR: %04x  SP: %p\n", fp->pc, fp->sr, fp);
389 		printk("d0: %08lx    d1: %08lx    d2: %08lx    d3: %08lx\n",
390 		       fp->d0, fp->d1, fp->d2, fp->d3);
391 		printk("d4: %08lx    d5: %08lx    a0: %08lx    a1: %08lx\n",
392 		       fp->d4, fp->d5, fp->a0, fp->a1);
393 
394 		if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
395 			printk("Corrupted stack page\n");
396 		printk("Process %s (pid: %d, stackpage=%08lx)\n",
397 			current->comm, current->pid, current->kernel_stack_page);
398 		if (intr_count == 1)
399 			dump_stack((struct frame *)fp);
400 #else
401 		/* printk("NMI "); */
402 #endif
403 	}
404 	in_nmi--;
405 	return IRQ_HANDLED;
406 }
407