1 /* 2 * Macintosh interrupts 3 * 4 * General design: 5 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to 6 * exclusively use the autovector interrupts (the 'generic level0-level7' 7 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels 8 * are used: 9 * 1 - VIA1 10 * - slot 0: one second interrupt (CA2) 11 * - slot 1: VBlank (CA1) 12 * - slot 2: ADB data ready (SR full) 13 * - slot 3: ADB data (CB2) 14 * - slot 4: ADB clock (CB1) 15 * - slot 5: timer 2 16 * - slot 6: timer 1 17 * - slot 7: status of IRQ; signals 'any enabled int.' 18 * 19 * 2 - VIA2 or RBV 20 * - slot 0: SCSI DRQ (CA2) 21 * - slot 1: NUBUS IRQ (CA1) need to read port A to find which 22 * - slot 2: /EXP IRQ (only on IIci) 23 * - slot 3: SCSI IRQ (CB2) 24 * - slot 4: ASC IRQ (CB1) 25 * - slot 5: timer 2 (not on IIci) 26 * - slot 6: timer 1 (not on IIci) 27 * - slot 7: status of IRQ; signals 'any enabled int.' 28 * 29 * 2 - OSS (IIfx only?) 30 * - slot 0: SCSI interrupt 31 * - slot 1: Sound interrupt 32 * 33 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes: 34 * 35 * 3 - unused (?) 36 * 37 * 4 - SCC 38 * 39 * 5 - unused (?) 40 * [serial errors or special conditions seem to raise level 6 41 * interrupts on some models (LC4xx?)] 42 * 43 * 6 - off switch (?) 44 * 45 * For OSS Macintoshes (IIfx only at this point): 46 * 47 * 3 - Nubus interrupt 48 * - slot 0: Slot $9 49 * - slot 1: Slot $A 50 * - slot 2: Slot $B 51 * - slot 3: Slot $C 52 * - slot 4: Slot $D 53 * - slot 5: Slot $E 54 * 55 * 4 - SCC IOP 56 * 57 * 5 - ISM IOP (ADB?) 58 * 59 * 6 - unused 60 * 61 * For PSC Macintoshes (660AV, 840AV): 62 * 63 * 3 - PSC level 3 64 * - slot 0: MACE 65 * 66 * 4 - PSC level 4 67 * - slot 1: SCC channel A interrupt 68 * - slot 2: SCC channel B interrupt 69 * - slot 3: MACE DMA 70 * 71 * 5 - PSC level 5 72 * 73 * 6 - PSC level 6 74 * 75 * Finally we have good 'ole level 7, the non-maskable interrupt: 76 * 77 * 7 - NMI (programmer's switch on the back of some Macs) 78 * Also RAM parity error on models which support it (IIc, IIfx?) 79 * 80 * The current interrupt logic looks something like this: 81 * 82 * - We install dispatchers for the autovector interrupts (1-7). These 83 * dispatchers are responsible for querying the hardware (the 84 * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using 85 * this information a machspec interrupt number is generated by placing the 86 * index of the interrupt hardware into the low three bits and the original 87 * autovector interrupt number in the upper 5 bits. The handlers for the 88 * resulting machspec interrupt are then called. 89 * 90 * - Nubus is a special case because its interrupts are hidden behind two 91 * layers of hardware. Nubus interrupts come in as index 1 on VIA #2, 92 * which translates to IRQ number 17. In this spot we install _another_ 93 * dispatcher. This dispatcher finds the interrupting slot number (9-F) and 94 * then forms a new machspec interrupt number as above with the slot number 95 * minus 9 in the low three bits and the pseudo-level 7 in the upper five 96 * bits. The handlers for this new machspec interrupt number are then 97 * called. This puts Nubus interrupts into the range 56-62. 98 * 99 * - The Baboon interrupts (used on some PowerBooks) are an even more special 100 * case. They're hidden behind the Nubus slot $C interrupt thus adding a 101 * third layer of indirection. Why oh why did the Apple engineers do that? 102 * 103 * - We support "fast" and "slow" handlers, just like the Amiga port. The 104 * fast handlers are called first and with all interrupts disabled. They 105 * are expected to execute quickly (hence the name). The slow handlers are 106 * called last with interrupts enabled and the interrupt level restored. 107 * They must therefore be reentrant. 108 * 109 * TODO: 110 * 111 */ 112 113 #include <linux/module.h> 114 #include <linux/types.h> 115 #include <linux/kernel.h> 116 #include <linux/sched.h> 117 #include <linux/kernel_stat.h> 118 #include <linux/interrupt.h> /* for intr_count */ 119 #include <linux/delay.h> 120 #include <linux/seq_file.h> 121 122 #include <asm/system.h> 123 #include <asm/irq.h> 124 #include <asm/traps.h> 125 #include <asm/bootinfo.h> 126 #include <asm/macintosh.h> 127 #include <asm/mac_via.h> 128 #include <asm/mac_psc.h> 129 #include <asm/hwtest.h> 130 #include <asm/errno.h> 131 #include <asm/macints.h> 132 #include <asm/irq_regs.h> 133 #include <asm/mac_oss.h> 134 135 #define SHUTUP_SONIC 136 137 /* 138 * VIA/RBV hooks 139 */ 140 141 extern void via_register_interrupts(void); 142 extern void via_irq_enable(int); 143 extern void via_irq_disable(int); 144 extern void via_irq_clear(int); 145 146 /* 147 * OSS hooks 148 */ 149 150 extern void oss_register_interrupts(void); 151 extern void oss_irq_enable(int); 152 extern void oss_irq_disable(int); 153 extern void oss_irq_clear(int); 154 155 /* 156 * PSC hooks 157 */ 158 159 extern void psc_register_interrupts(void); 160 extern void psc_irq_enable(int); 161 extern void psc_irq_disable(int); 162 extern void psc_irq_clear(int); 163 164 /* 165 * IOP hooks 166 */ 167 168 extern void iop_register_interrupts(void); 169 170 /* 171 * Baboon hooks 172 */ 173 174 extern int baboon_present; 175 176 extern void baboon_register_interrupts(void); 177 extern void baboon_irq_enable(int); 178 extern void baboon_irq_disable(int); 179 extern void baboon_irq_clear(int); 180 181 /* 182 * console_loglevel determines NMI handler function 183 */ 184 185 irqreturn_t mac_nmi_handler(int, void *); 186 irqreturn_t mac_debug_handler(int, void *); 187 188 /* #define DEBUG_MACINTS */ 189 190 static struct irq_chip mac_irq_chip = { 191 .name = "mac", 192 .irq_enable = mac_irq_enable, 193 .irq_disable = mac_irq_disable, 194 }; 195 196 void __init mac_init_IRQ(void) 197 { 198 #ifdef DEBUG_MACINTS 199 printk("mac_init_IRQ(): Setting things up...\n"); 200 #endif 201 m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER, 202 NUM_MAC_SOURCES - IRQ_USER); 203 /* Make sure the SONIC interrupt is cleared or things get ugly */ 204 #ifdef SHUTUP_SONIC 205 printk("Killing onboard sonic... "); 206 /* This address should hopefully be mapped already */ 207 if (hwreg_present((void*)(0x50f0a000))) { 208 *(long *)(0x50f0a014) = 0x7fffL; 209 *(long *)(0x50f0a010) = 0L; 210 } 211 printk("Done.\n"); 212 #endif /* SHUTUP_SONIC */ 213 214 /* 215 * Now register the handlers for the master IRQ handlers 216 * at levels 1-7. Most of the work is done elsewhere. 217 */ 218 219 if (oss_present) 220 oss_register_interrupts(); 221 else 222 via_register_interrupts(); 223 if (psc_present) 224 psc_register_interrupts(); 225 if (baboon_present) 226 baboon_register_interrupts(); 227 iop_register_interrupts(); 228 if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI", 229 mac_nmi_handler)) 230 pr_err("Couldn't register NMI\n"); 231 #ifdef DEBUG_MACINTS 232 printk("mac_init_IRQ(): Done!\n"); 233 #endif 234 } 235 236 /* 237 * mac_irq_enable - enable an interrupt source 238 * mac_irq_disable - disable an interrupt source 239 * 240 * These routines are just dispatchers to the VIA/OSS/PSC routines. 241 */ 242 243 void mac_irq_enable(struct irq_data *data) 244 { 245 int irq = data->irq; 246 int irq_src = IRQ_SRC(irq); 247 248 switch(irq_src) { 249 case 1: 250 via_irq_enable(irq); 251 break; 252 case 2: 253 case 7: 254 if (oss_present) 255 oss_irq_enable(irq); 256 else 257 via_irq_enable(irq); 258 break; 259 case 3: 260 case 5: 261 case 6: 262 if (psc_present) 263 psc_irq_enable(irq); 264 else if (oss_present) 265 oss_irq_enable(irq); 266 break; 267 case 4: 268 if (psc_present) 269 psc_irq_enable(irq); 270 break; 271 case 8: 272 if (baboon_present) 273 baboon_irq_enable(irq); 274 break; 275 } 276 } 277 278 void mac_irq_disable(struct irq_data *data) 279 { 280 int irq = data->irq; 281 int irq_src = IRQ_SRC(irq); 282 283 switch(irq_src) { 284 case 1: 285 via_irq_disable(irq); 286 break; 287 case 2: 288 case 7: 289 if (oss_present) 290 oss_irq_disable(irq); 291 else 292 via_irq_disable(irq); 293 break; 294 case 3: 295 case 5: 296 case 6: 297 if (psc_present) 298 psc_irq_disable(irq); 299 else if (oss_present) 300 oss_irq_disable(irq); 301 break; 302 case 4: 303 if (psc_present) 304 psc_irq_disable(irq); 305 break; 306 case 8: 307 if (baboon_present) 308 baboon_irq_disable(irq); 309 break; 310 } 311 } 312 313 static int num_debug[8]; 314 315 irqreturn_t mac_debug_handler(int irq, void *dev_id) 316 { 317 if (num_debug[irq] < 10) { 318 printk("DEBUG: Unexpected IRQ %d\n", irq); 319 num_debug[irq]++; 320 } 321 return IRQ_HANDLED; 322 } 323 324 static int in_nmi; 325 static volatile int nmi_hold; 326 327 irqreturn_t mac_nmi_handler(int irq, void *dev_id) 328 { 329 int i; 330 /* 331 * generate debug output on NMI switch if 'debug' kernel option given 332 * (only works with Penguin!) 333 */ 334 335 in_nmi++; 336 for (i=0; i<100; i++) 337 udelay(1000); 338 339 if (in_nmi == 1) { 340 nmi_hold = 1; 341 printk("... pausing, press NMI to resume ..."); 342 } else { 343 printk(" ok!\n"); 344 nmi_hold = 0; 345 } 346 347 barrier(); 348 349 while (nmi_hold == 1) 350 udelay(1000); 351 352 if (console_loglevel >= 8) { 353 #if 0 354 struct pt_regs *fp = get_irq_regs(); 355 show_state(); 356 printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp); 357 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", 358 fp->d0, fp->d1, fp->d2, fp->d3); 359 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", 360 fp->d4, fp->d5, fp->a0, fp->a1); 361 362 if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page) 363 printk("Corrupted stack page\n"); 364 printk("Process %s (pid: %d, stackpage=%08lx)\n", 365 current->comm, current->pid, current->kernel_stack_page); 366 if (intr_count == 1) 367 dump_stack((struct frame *)fp); 368 #else 369 /* printk("NMI "); */ 370 #endif 371 } 372 in_nmi--; 373 return IRQ_HANDLED; 374 } 375