1 /* 2 * Macintosh interrupts 3 * 4 * General design: 5 * In contrary to the Amiga and Atari platforms, the Mac hardware seems to 6 * exclusively use the autovector interrupts (the 'generic level0-level7' 7 * interrupts with exception vectors 0x19-0x1f). The following interrupt levels 8 * are used: 9 * 1 - VIA1 10 * - slot 0: one second interrupt (CA2) 11 * - slot 1: VBlank (CA1) 12 * - slot 2: ADB data ready (SR full) 13 * - slot 3: ADB data (CB2) 14 * - slot 4: ADB clock (CB1) 15 * - slot 5: timer 2 16 * - slot 6: timer 1 17 * - slot 7: status of IRQ; signals 'any enabled int.' 18 * 19 * 2 - VIA2 or RBV 20 * - slot 0: SCSI DRQ (CA2) 21 * - slot 1: NUBUS IRQ (CA1) need to read port A to find which 22 * - slot 2: /EXP IRQ (only on IIci) 23 * - slot 3: SCSI IRQ (CB2) 24 * - slot 4: ASC IRQ (CB1) 25 * - slot 5: timer 2 (not on IIci) 26 * - slot 6: timer 1 (not on IIci) 27 * - slot 7: status of IRQ; signals 'any enabled int.' 28 * 29 * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes: 30 * 31 * 3 - unused (?) 32 * 33 * 4 - SCC 34 * 35 * 5 - unused (?) 36 * [serial errors or special conditions seem to raise level 6 37 * interrupts on some models (LC4xx?)] 38 * 39 * 6 - off switch (?) 40 * 41 * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support 42 * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and 43 * sound out to their own autovector IRQs and gives VIA1 a higher priority: 44 * 45 * 1 - unused (?) 46 * 47 * 3 - on-board SONIC 48 * 49 * 5 - Apple Sound Chip (ASC) 50 * 51 * 6 - VIA1 52 * 53 * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to 54 * the Quadra (A/UX) mapping: 55 * 56 * 1 - ISM IOP (ADB) 57 * 58 * 2 - SCSI 59 * 60 * 3 - NuBus 61 * 62 * 4 - SCC IOP 63 * 64 * 6 - VIA1 65 * 66 * For PSC Macintoshes (660AV, 840AV): 67 * 68 * 3 - PSC level 3 69 * - slot 0: MACE 70 * 71 * 4 - PSC level 4 72 * - slot 1: SCC channel A interrupt 73 * - slot 2: SCC channel B interrupt 74 * - slot 3: MACE DMA 75 * 76 * 5 - PSC level 5 77 * 78 * 6 - PSC level 6 79 * 80 * Finally we have good 'ole level 7, the non-maskable interrupt: 81 * 82 * 7 - NMI (programmer's switch on the back of some Macs) 83 * Also RAM parity error on models which support it (IIc, IIfx?) 84 * 85 * The current interrupt logic looks something like this: 86 * 87 * - We install dispatchers for the autovector interrupts (1-7). These 88 * dispatchers are responsible for querying the hardware (the 89 * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using 90 * this information a machspec interrupt number is generated by placing the 91 * index of the interrupt hardware into the low three bits and the original 92 * autovector interrupt number in the upper 5 bits. The handlers for the 93 * resulting machspec interrupt are then called. 94 * 95 * - Nubus is a special case because its interrupts are hidden behind two 96 * layers of hardware. Nubus interrupts come in as index 1 on VIA #2, 97 * which translates to IRQ number 17. In this spot we install _another_ 98 * dispatcher. This dispatcher finds the interrupting slot number (9-F) and 99 * then forms a new machspec interrupt number as above with the slot number 100 * minus 9 in the low three bits and the pseudo-level 7 in the upper five 101 * bits. The handlers for this new machspec interrupt number are then 102 * called. This puts Nubus interrupts into the range 56-62. 103 * 104 * - The Baboon interrupts (used on some PowerBooks) are an even more special 105 * case. They're hidden behind the Nubus slot $C interrupt thus adding a 106 * third layer of indirection. Why oh why did the Apple engineers do that? 107 * 108 */ 109 110 #include <linux/types.h> 111 #include <linux/kernel.h> 112 #include <linux/sched.h> 113 #include <linux/sched/debug.h> 114 #include <linux/interrupt.h> 115 #include <linux/irq.h> 116 #include <linux/delay.h> 117 118 #include <asm/irq.h> 119 #include <asm/macintosh.h> 120 #include <asm/macints.h> 121 #include <asm/mac_via.h> 122 #include <asm/mac_psc.h> 123 #include <asm/mac_oss.h> 124 #include <asm/mac_iop.h> 125 #include <asm/mac_baboon.h> 126 #include <asm/hwtest.h> 127 #include <asm/irq_regs.h> 128 129 extern void show_registers(struct pt_regs *); 130 131 irqreturn_t mac_nmi_handler(int, void *); 132 133 static unsigned int mac_irq_startup(struct irq_data *); 134 static void mac_irq_shutdown(struct irq_data *); 135 136 static struct irq_chip mac_irq_chip = { 137 .name = "mac", 138 .irq_enable = mac_irq_enable, 139 .irq_disable = mac_irq_disable, 140 .irq_startup = mac_irq_startup, 141 .irq_shutdown = mac_irq_shutdown, 142 }; 143 144 void __init mac_init_IRQ(void) 145 { 146 m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER, 147 NUM_MAC_SOURCES - IRQ_USER); 148 149 /* 150 * Now register the handlers for the master IRQ handlers 151 * at levels 1-7. Most of the work is done elsewhere. 152 */ 153 154 if (oss_present) 155 oss_register_interrupts(); 156 else 157 via_register_interrupts(); 158 if (psc) 159 psc_register_interrupts(); 160 if (baboon_present) 161 baboon_register_interrupts(); 162 iop_register_interrupts(); 163 if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI", 164 mac_nmi_handler)) 165 pr_err("Couldn't register NMI\n"); 166 } 167 168 /* 169 * mac_irq_enable - enable an interrupt source 170 * mac_irq_disable - disable an interrupt source 171 * 172 * These routines are just dispatchers to the VIA/OSS/PSC routines. 173 */ 174 175 void mac_irq_enable(struct irq_data *data) 176 { 177 int irq = data->irq; 178 int irq_src = IRQ_SRC(irq); 179 180 switch(irq_src) { 181 case 1: 182 case 2: 183 case 7: 184 if (oss_present) 185 oss_irq_enable(irq); 186 else 187 via_irq_enable(irq); 188 break; 189 case 3: 190 case 4: 191 case 5: 192 case 6: 193 if (psc) 194 psc_irq_enable(irq); 195 else if (oss_present) 196 oss_irq_enable(irq); 197 break; 198 case 8: 199 if (baboon_present) 200 baboon_irq_enable(irq); 201 break; 202 } 203 } 204 205 void mac_irq_disable(struct irq_data *data) 206 { 207 int irq = data->irq; 208 int irq_src = IRQ_SRC(irq); 209 210 switch(irq_src) { 211 case 1: 212 case 2: 213 case 7: 214 if (oss_present) 215 oss_irq_disable(irq); 216 else 217 via_irq_disable(irq); 218 break; 219 case 3: 220 case 4: 221 case 5: 222 case 6: 223 if (psc) 224 psc_irq_disable(irq); 225 else if (oss_present) 226 oss_irq_disable(irq); 227 break; 228 case 8: 229 if (baboon_present) 230 baboon_irq_disable(irq); 231 break; 232 } 233 } 234 235 static unsigned int mac_irq_startup(struct irq_data *data) 236 { 237 int irq = data->irq; 238 239 if (IRQ_SRC(irq) == 7 && !oss_present) 240 via_nubus_irq_startup(irq); 241 else 242 mac_irq_enable(data); 243 244 return 0; 245 } 246 247 static void mac_irq_shutdown(struct irq_data *data) 248 { 249 int irq = data->irq; 250 251 if (IRQ_SRC(irq) == 7 && !oss_present) 252 via_nubus_irq_shutdown(irq); 253 else 254 mac_irq_disable(data); 255 } 256 257 static volatile int in_nmi; 258 259 irqreturn_t mac_nmi_handler(int irq, void *dev_id) 260 { 261 if (in_nmi) 262 return IRQ_HANDLED; 263 in_nmi = 1; 264 265 pr_info("Non-Maskable Interrupt\n"); 266 show_registers(get_irq_regs()); 267 268 in_nmi = 0; 269 return IRQ_HANDLED; 270 } 271