xref: /openbmc/linux/arch/m68k/mac/iop.c (revision 82df5b73)
1 /*
2  * I/O Processor (IOP) management
3  * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org)
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice and this list of conditions.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice and this list of conditions in the documentation and/or other
12  *    materials provided with the distribution.
13  */
14 
15 /*
16  * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
17  * serial and ADB. They are actually a 6502 processor and some glue logic.
18  *
19  * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
20  *		  into compatible mode so nobody has to fiddle with the
21  *		  Serial Switch control panel anymore.
22  * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
23  *		  and non-OSS machines (at least I hope it's correct on a
24  *		  non-OSS machine -- someone with a Q900 or Q950 needs to
25  *		  check this.)
26  * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
27  *		  gone, IOP base addresses are now in an array and the
28  *		  globally-visible functions take an IOP number instead of an
29  *		  an actual base address.
30  * 990610 (jmt) - Finished the message passing framework and it seems to work.
31  *		  Sending _definitely_ works; my adb-bus.c mods can send
32  *		  messages and receive the MSG_COMPLETED status back from the
33  *		  IOP. The trick now is figuring out the message formats.
34  * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a
35  *		  receive channel were never properly acknowledged. Bracketed
36  *		  the remaining debug printk's with #ifdef's and disabled
37  *		  debugging. I can now type on the console.
38  * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled.
39  *		  It turns out that replies are placed back in the send buffer
40  *		  for that channel; messages on the receive channels are always
41  *		  unsolicited messages from the IOP (and our replies to them
42  *		  should go back in the receive channel.) Also added tracking
43  *		  of device names to the listener functions ala the interrupt
44  *		  handlers.
45  * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
46  *		  used by the new unified ADB driver.
47  *
48  * TODO:
49  *
50  * o Something should be periodically checking iop_alive() to make sure the
51  *   IOP hasn't died.
52  * o Some of the IOP manager routines need better error checking and
53  *   return codes. Nothing major, just prettying up.
54  */
55 
56 /*
57  * -----------------------
58  * IOP Message Passing 101
59  * -----------------------
60  *
61  * The host talks to the IOPs using a rather simple message-passing scheme via
62  * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
63  * channel is connected to a specific software driver on the IOP. For example
64  * on the SCC IOP there is one channel for each serial port. Each channel has
65  * an incoming and and outgoing message queue with a depth of one.
66  *
67  * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW,
68  * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the
69  * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag
70  * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it
71  * receives the message and then to MSG_COMPLETE when the message processing
72  * has completed. It is the host's responsibility at that point to read the
73  * reply back out of the send channel buffer and reset the channel state back
74  * to MSG_IDLE.
75  *
76  * To receive message from the IOP the same procedure is used except the roles
77  * are reversed. That is, the IOP puts message in the channel with a state of
78  * MSG_NEW, and the host receives the message and move its state to MSG_RCVD
79  * and then to MSG_COMPLETE when processing is completed and the reply (if any)
80  * has been placed back in the receive channel. The IOP will then reset the
81  * channel state to MSG_IDLE.
82  *
83  * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
84  * interrupt level; they are distinguished by a pair of bits in the IOP status
85  * register. The IOP will raise INT0 when one or more messages in the send
86  * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
87  * or more messages on the receive channels have gone to the MSG_NEW state.
88  *
89  * Since each channel handles only one message we have to implement a small
90  * interrupt-driven queue on our end. Messages to be sent are placed on the
91  * queue for sending and contain a pointer to an optional callback function.
92  * The handler for a message is called when the message state goes to
93  * MSG_COMPLETE.
94  *
95  * For receiving message we maintain a list of handler functions to call when
96  * a message is received on that IOP/channel combination. The handlers are
97  * called much like an interrupt handler and are passed a copy of the message
98  * from the IOP. The message state will be in MSG_RCVD while the handler runs;
99  * it is the handler's responsibility to call iop_complete_message() when
100  * finished; this function moves the message state to MSG_COMPLETE and signals
101  * the IOP. This two-step process is provided to allow the handler to defer
102  * message processing to a bottom-half handler if the processing will take
103  * a significant amount of time (handlers are called at interrupt time so they
104  * should execute quickly.)
105  */
106 
107 #include <linux/types.h>
108 #include <linux/kernel.h>
109 #include <linux/mm.h>
110 #include <linux/delay.h>
111 #include <linux/init.h>
112 #include <linux/interrupt.h>
113 
114 #include <asm/macintosh.h>
115 #include <asm/macints.h>
116 #include <asm/mac_iop.h>
117 
118 #ifdef DEBUG
119 #define iop_pr_debug(fmt, ...) \
120 	printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__)
121 #define iop_pr_cont(fmt, ...) \
122 	printk(KERN_CONT fmt, ##__VA_ARGS__)
123 #else
124 #define iop_pr_debug(fmt, ...) \
125 	no_printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__)
126 #define iop_pr_cont(fmt, ...) \
127 	no_printk(KERN_CONT fmt, ##__VA_ARGS__)
128 #endif
129 
130 /* Non-zero if the IOPs are present */
131 
132 int iop_scc_present, iop_ism_present;
133 
134 /* structure for tracking channel listeners */
135 
136 struct listener {
137 	const char *devname;
138 	void (*handler)(struct iop_msg *);
139 };
140 
141 /*
142  * IOP structures for the two IOPs
143  *
144  * The SCC IOP controls both serial ports (A and B) as its two functions.
145  * The ISM IOP controls the SWIM (floppy drive) and ADB.
146  */
147 
148 static volatile struct mac_iop *iop_base[NUM_IOPS];
149 
150 /*
151  * IOP message queues
152  */
153 
154 static struct iop_msg iop_msg_pool[NUM_IOP_MSGS];
155 static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN];
156 static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
157 
158 irqreturn_t iop_ism_irq(int, void *);
159 
160 /*
161  * Private access functions
162  */
163 
164 static __inline__ void iop_loadaddr(volatile struct mac_iop *iop, __u16 addr)
165 {
166 	iop->ram_addr_lo = addr;
167 	iop->ram_addr_hi = addr >> 8;
168 }
169 
170 static __inline__ __u8 iop_readb(volatile struct mac_iop *iop, __u16 addr)
171 {
172 	iop->ram_addr_lo = addr;
173 	iop->ram_addr_hi = addr >> 8;
174 	return iop->ram_data;
175 }
176 
177 static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8 data)
178 {
179 	iop->ram_addr_lo = addr;
180 	iop->ram_addr_hi = addr >> 8;
181 	iop->ram_data = data;
182 }
183 
184 static __inline__ void iop_stop(volatile struct mac_iop *iop)
185 {
186 	iop->status_ctrl &= ~IOP_RUN;
187 }
188 
189 static __inline__ void iop_start(volatile struct mac_iop *iop)
190 {
191 	iop->status_ctrl = IOP_RUN | IOP_AUTOINC;
192 }
193 
194 static __inline__ void iop_bypass(volatile struct mac_iop *iop)
195 {
196 	iop->status_ctrl |= IOP_BYPASS;
197 }
198 
199 static __inline__ void iop_interrupt(volatile struct mac_iop *iop)
200 {
201 	iop->status_ctrl |= IOP_IRQ;
202 }
203 
204 static int iop_alive(volatile struct mac_iop *iop)
205 {
206 	int retval;
207 
208 	retval = (iop_readb(iop, IOP_ADDR_ALIVE) == 0xFF);
209 	iop_writeb(iop, IOP_ADDR_ALIVE, 0);
210 	return retval;
211 }
212 
213 static struct iop_msg *iop_get_unused_msg(void)
214 {
215 	int i;
216 	unsigned long flags;
217 
218 	local_irq_save(flags);
219 
220 	for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
221 		if (iop_msg_pool[i].status == IOP_MSGSTATUS_UNUSED) {
222 			iop_msg_pool[i].status = IOP_MSGSTATUS_WAITING;
223 			local_irq_restore(flags);
224 			return &iop_msg_pool[i];
225 		}
226 	}
227 
228 	local_irq_restore(flags);
229 	return NULL;
230 }
231 
232 /*
233  * This is called by the startup code before anything else. Its purpose
234  * is to find and initialize the IOPs early in the boot sequence, so that
235  * the serial IOP can be placed into bypass mode _before_ we try to
236  * initialize the serial console.
237  */
238 
239 void __init iop_preinit(void)
240 {
241 	if (macintosh_config->scc_type == MAC_SCC_IOP) {
242 		if (macintosh_config->ident == MAC_MODEL_IIFX) {
243 			iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_IIFX;
244 		} else {
245 			iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA;
246 		}
247 		iop_base[IOP_NUM_SCC]->status_ctrl = 0x87;
248 		iop_scc_present = 1;
249 	} else {
250 		iop_base[IOP_NUM_SCC] = NULL;
251 		iop_scc_present = 0;
252 	}
253 	if (macintosh_config->adb_type == MAC_ADB_IOP) {
254 		if (macintosh_config->ident == MAC_MODEL_IIFX) {
255 			iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_IIFX;
256 		} else {
257 			iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA;
258 		}
259 		iop_base[IOP_NUM_ISM]->status_ctrl = 0;
260 		iop_ism_present = 1;
261 	} else {
262 		iop_base[IOP_NUM_ISM] = NULL;
263 		iop_ism_present = 0;
264 	}
265 }
266 
267 /*
268  * Initialize the IOPs, if present.
269  */
270 
271 void __init iop_init(void)
272 {
273 	int i;
274 
275 	if (iop_scc_present) {
276 		pr_debug("SCC IOP detected at %p\n", iop_base[IOP_NUM_SCC]);
277 	}
278 	if (iop_ism_present) {
279 		pr_debug("ISM IOP detected at %p\n", iop_base[IOP_NUM_ISM]);
280 		iop_start(iop_base[IOP_NUM_ISM]);
281 		iop_alive(iop_base[IOP_NUM_ISM]); /* clears the alive flag */
282 	}
283 
284 	/* Make the whole pool available and empty the queues */
285 
286 	for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
287 		iop_msg_pool[i].status = IOP_MSGSTATUS_UNUSED;
288 	}
289 
290 	for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
291 		iop_send_queue[IOP_NUM_SCC][i] = NULL;
292 		iop_send_queue[IOP_NUM_ISM][i] = NULL;
293 		iop_listeners[IOP_NUM_SCC][i].devname = NULL;
294 		iop_listeners[IOP_NUM_SCC][i].handler = NULL;
295 		iop_listeners[IOP_NUM_ISM][i].devname = NULL;
296 		iop_listeners[IOP_NUM_ISM][i].handler = NULL;
297 	}
298 }
299 
300 /*
301  * Register the interrupt handler for the IOPs.
302  */
303 
304 void __init iop_register_interrupts(void)
305 {
306 	if (iop_ism_present) {
307 		if (macintosh_config->ident == MAC_MODEL_IIFX) {
308 			if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0,
309 					"ISM IOP", (void *)IOP_NUM_ISM))
310 				pr_err("Couldn't register ISM IOP interrupt\n");
311 		} else {
312 			if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
313 					(void *)IOP_NUM_ISM))
314 				pr_err("Couldn't register ISM IOP interrupt\n");
315 		}
316 		if (!iop_alive(iop_base[IOP_NUM_ISM])) {
317 			pr_warn("IOP: oh my god, they killed the ISM IOP!\n");
318 		} else {
319 			pr_warn("IOP: the ISM IOP seems to be alive.\n");
320 		}
321 	}
322 }
323 
324 /*
325  * Register or unregister a listener for a specific IOP and channel
326  *
327  * If the handler pointer is NULL the current listener (if any) is
328  * unregistered. Otherwise the new listener is registered provided
329  * there is no existing listener registered.
330  */
331 
332 int iop_listen(uint iop_num, uint chan,
333 		void (*handler)(struct iop_msg *),
334 		const char *devname)
335 {
336 	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
337 	if (chan >= NUM_IOP_CHAN) return -EINVAL;
338 	if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL;
339 	iop_listeners[iop_num][chan].devname = devname;
340 	iop_listeners[iop_num][chan].handler = handler;
341 	return 0;
342 }
343 
344 /*
345  * Complete reception of a message, which just means copying the reply
346  * into the buffer, setting the channel state to MSG_COMPLETE and
347  * notifying the IOP.
348  */
349 
350 void iop_complete_message(struct iop_msg *msg)
351 {
352 	int iop_num = msg->iop_num;
353 	int chan = msg->channel;
354 	int i,offset;
355 
356 	iop_pr_debug("msg %p iop_num %d channel %d\n", msg, msg->iop_num,
357 	             msg->channel);
358 
359 	offset = IOP_ADDR_RECV_MSG + (msg->channel * IOP_MSG_LEN);
360 
361 	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
362 		iop_writeb(iop_base[iop_num], offset, msg->reply[i]);
363 	}
364 
365 	iop_writeb(iop_base[iop_num],
366 		   IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE);
367 	iop_interrupt(iop_base[msg->iop_num]);
368 
369 	msg->status = IOP_MSGSTATUS_UNUSED;
370 }
371 
372 /*
373  * Actually put a message into a send channel buffer
374  */
375 
376 static void iop_do_send(struct iop_msg *msg)
377 {
378 	volatile struct mac_iop *iop = iop_base[msg->iop_num];
379 	int i,offset;
380 
381 	offset = IOP_ADDR_SEND_MSG + (msg->channel * IOP_MSG_LEN);
382 
383 	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
384 		iop_writeb(iop, offset, msg->message[i]);
385 	}
386 
387 	iop_writeb(iop, IOP_ADDR_SEND_STATE + msg->channel, IOP_MSG_NEW);
388 
389 	iop_interrupt(iop);
390 }
391 
392 /*
393  * Handle sending a message on a channel that
394  * has gone into the IOP_MSG_COMPLETE state.
395  */
396 
397 static void iop_handle_send(uint iop_num, uint chan)
398 {
399 	volatile struct mac_iop *iop = iop_base[iop_num];
400 	struct iop_msg *msg;
401 	int i,offset;
402 
403 	iop_pr_debug("iop_num %d chan %d\n", iop_num, chan);
404 
405 	iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE);
406 
407 	if (!(msg = iop_send_queue[iop_num][chan])) return;
408 
409 	msg->status = IOP_MSGSTATUS_COMPLETE;
410 	offset = IOP_ADDR_SEND_MSG + (chan * IOP_MSG_LEN);
411 	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
412 		msg->reply[i] = iop_readb(iop, offset);
413 	}
414 	if (msg->handler) (*msg->handler)(msg);
415 	msg->status = IOP_MSGSTATUS_UNUSED;
416 	msg = msg->next;
417 	iop_send_queue[iop_num][chan] = msg;
418 	if (msg) iop_do_send(msg);
419 }
420 
421 /*
422  * Handle reception of a message on a channel that has
423  * gone into the IOP_MSG_NEW state.
424  */
425 
426 static void iop_handle_recv(uint iop_num, uint chan)
427 {
428 	volatile struct mac_iop *iop = iop_base[iop_num];
429 	int i,offset;
430 	struct iop_msg *msg;
431 
432 	iop_pr_debug("iop_num %d chan %d\n", iop_num, chan);
433 
434 	msg = iop_get_unused_msg();
435 	msg->iop_num = iop_num;
436 	msg->channel = chan;
437 	msg->status = IOP_MSGSTATUS_UNSOL;
438 	msg->handler = iop_listeners[iop_num][chan].handler;
439 
440 	offset = IOP_ADDR_RECV_MSG + (chan * IOP_MSG_LEN);
441 
442 	for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
443 		msg->message[i] = iop_readb(iop, offset);
444 	}
445 
446 	iop_writeb(iop, IOP_ADDR_RECV_STATE + chan, IOP_MSG_RCVD);
447 
448 	/* If there is a listener, call it now. Otherwise complete */
449 	/* the message ourselves to avoid possible stalls.         */
450 
451 	if (msg->handler) {
452 		(*msg->handler)(msg);
453 	} else {
454 		iop_pr_debug("unclaimed message on iop_num %d chan %d\n",
455 		             iop_num, chan);
456 		iop_pr_debug("%*ph\n", IOP_MSG_LEN, msg->message);
457 		iop_complete_message(msg);
458 	}
459 }
460 
461 /*
462  * Send a message
463  *
464  * The message is placed at the end of the send queue. Afterwards if the
465  * channel is idle we force an immediate send of the next message in the
466  * queue.
467  */
468 
469 int iop_send_message(uint iop_num, uint chan, void *privdata,
470 		      uint msg_len, __u8 *msg_data,
471 		      void (*handler)(struct iop_msg *))
472 {
473 	struct iop_msg *msg, *q;
474 
475 	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
476 	if (chan >= NUM_IOP_CHAN) return -EINVAL;
477 	if (msg_len > IOP_MSG_LEN) return -EINVAL;
478 
479 	msg = iop_get_unused_msg();
480 	if (!msg) return -ENOMEM;
481 
482 	msg->next = NULL;
483 	msg->status = IOP_MSGSTATUS_WAITING;
484 	msg->iop_num = iop_num;
485 	msg->channel = chan;
486 	msg->caller_priv = privdata;
487 	memcpy(msg->message, msg_data, msg_len);
488 	msg->handler = handler;
489 
490 	if (!(q = iop_send_queue[iop_num][chan])) {
491 		iop_send_queue[iop_num][chan] = msg;
492 	} else {
493 		while (q->next) q = q->next;
494 		q->next = msg;
495 	}
496 
497 	if (iop_readb(iop_base[iop_num],
498 	    IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) {
499 		iop_do_send(msg);
500 	}
501 
502 	return 0;
503 }
504 
505 /*
506  * Upload code to the shared RAM of an IOP.
507  */
508 
509 void iop_upload_code(uint iop_num, __u8 *code_start,
510 		     uint code_len, __u16 shared_ram_start)
511 {
512 	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
513 
514 	iop_loadaddr(iop_base[iop_num], shared_ram_start);
515 
516 	while (code_len--) {
517 		iop_base[iop_num]->ram_data = *code_start++;
518 	}
519 }
520 
521 /*
522  * Download code from the shared RAM of an IOP.
523  */
524 
525 void iop_download_code(uint iop_num, __u8 *code_start,
526 		       uint code_len, __u16 shared_ram_start)
527 {
528 	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
529 
530 	iop_loadaddr(iop_base[iop_num], shared_ram_start);
531 
532 	while (code_len--) {
533 		*code_start++ = iop_base[iop_num]->ram_data;
534 	}
535 }
536 
537 /*
538  * Compare the code in the shared RAM of an IOP with a copy in system memory
539  * and return 0 on match or the first nonmatching system memory address on
540  * failure.
541  */
542 
543 __u8 *iop_compare_code(uint iop_num, __u8 *code_start,
544 		       uint code_len, __u16 shared_ram_start)
545 {
546 	if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return code_start;
547 
548 	iop_loadaddr(iop_base[iop_num], shared_ram_start);
549 
550 	while (code_len--) {
551 		if (*code_start != iop_base[iop_num]->ram_data) {
552 			return code_start;
553 		}
554 		code_start++;
555 	}
556 	return (__u8 *) 0;
557 }
558 
559 /*
560  * Handle an ISM IOP interrupt
561  */
562 
563 irqreturn_t iop_ism_irq(int irq, void *dev_id)
564 {
565 	uint iop_num = (uint) dev_id;
566 	volatile struct mac_iop *iop = iop_base[iop_num];
567 	int i,state;
568 	u8 events = iop->status_ctrl & (IOP_INT0 | IOP_INT1);
569 
570 	iop_pr_debug("status %02X\n", iop->status_ctrl);
571 
572 	do {
573 		/* INT0 indicates state change on an outgoing message channel */
574 		if (events & IOP_INT0) {
575 			iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
576 			iop_pr_debug("new status %02X, send states",
577 				     iop->status_ctrl);
578 			for (i = 0; i < NUM_IOP_CHAN; i++) {
579 				state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
580 				iop_pr_cont(" %02X", state);
581 				if (state == IOP_MSG_COMPLETE)
582 					iop_handle_send(iop_num, i);
583 			}
584 			iop_pr_cont("\n");
585 		}
586 
587 		/* INT1 for incoming messages */
588 		if (events & IOP_INT1) {
589 			iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
590 			iop_pr_debug("new status %02X, recv states",
591 				     iop->status_ctrl);
592 			for (i = 0; i < NUM_IOP_CHAN; i++) {
593 				state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
594 				iop_pr_cont(" %02X", state);
595 				if (state == IOP_MSG_NEW)
596 					iop_handle_recv(iop_num, i);
597 			}
598 			iop_pr_cont("\n");
599 		}
600 
601 		events = iop->status_ctrl & (IOP_INT0 | IOP_INT1);
602 	} while (events);
603 
604 	return IRQ_HANDLED;
605 }
606 
607 void iop_ism_irq_poll(uint iop_num)
608 {
609 	unsigned long flags;
610 
611 	local_irq_save(flags);
612 	iop_ism_irq(0, (void *)iop_num);
613 	local_irq_restore(flags);
614 }
615