1 /* 2 * linux/arch/m68k/kernel/traps.c 3 * 4 * Copyright (C) 1993, 1994 by Hamish Macdonald 5 * 6 * 68040 fixes by Michael Rausch 7 * 68040 fixes by Martin Apel 8 * 68040 fixes and writeback by Richard Zidlicky 9 * 68060 fixes by Roman Hodek 10 * 68060 fixes by Jesper Skov 11 * 12 * This file is subject to the terms and conditions of the GNU General Public 13 * License. See the file COPYING in the main directory of this archive 14 * for more details. 15 */ 16 17 /* 18 * Sets up all exception vectors 19 */ 20 21 #include <linux/sched.h> 22 #include <linux/signal.h> 23 #include <linux/kernel.h> 24 #include <linux/mm.h> 25 #include <linux/module.h> 26 #include <linux/user.h> 27 #include <linux/string.h> 28 #include <linux/linkage.h> 29 #include <linux/init.h> 30 #include <linux/ptrace.h> 31 #include <linux/kallsyms.h> 32 33 #include <asm/setup.h> 34 #include <asm/fpu.h> 35 #include <asm/system.h> 36 #include <asm/uaccess.h> 37 #include <asm/traps.h> 38 #include <asm/pgalloc.h> 39 #include <asm/machdep.h> 40 #include <asm/siginfo.h> 41 42 /* assembler routines */ 43 asmlinkage void system_call(void); 44 asmlinkage void buserr(void); 45 asmlinkage void trap(void); 46 asmlinkage void nmihandler(void); 47 #ifdef CONFIG_M68KFPU_EMU 48 asmlinkage void fpu_emu(void); 49 #endif 50 51 e_vector vectors[256]; 52 53 /* nmi handler for the Amiga */ 54 asm(".text\n" 55 __ALIGN_STR "\n" 56 "nmihandler: rte"); 57 58 /* 59 * this must be called very early as the kernel might 60 * use some instruction that are emulated on the 060 61 * and so we're prepared for early probe attempts (e.g. nf_init). 62 */ 63 void __init base_trap_init(void) 64 { 65 if (MACH_IS_SUN3X) { 66 extern e_vector *sun3x_prom_vbr; 67 68 __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr)); 69 } 70 71 /* setup the exception vector table */ 72 __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors)); 73 74 if (CPU_IS_060) { 75 /* set up ISP entry points */ 76 asmlinkage void unimp_vec(void) asm ("_060_isp_unimp"); 77 78 vectors[VEC_UNIMPII] = unimp_vec; 79 } 80 81 vectors[VEC_BUSERR] = buserr; 82 vectors[VEC_ILLEGAL] = trap; 83 vectors[VEC_SYS] = system_call; 84 } 85 86 void __init trap_init (void) 87 { 88 int i; 89 90 for (i = VEC_SPUR; i <= VEC_INT7; i++) 91 vectors[i] = bad_inthandler; 92 93 for (i = 0; i < VEC_USER; i++) 94 if (!vectors[i]) 95 vectors[i] = trap; 96 97 for (i = VEC_USER; i < 256; i++) 98 vectors[i] = bad_inthandler; 99 100 #ifdef CONFIG_M68KFPU_EMU 101 if (FPU_IS_EMU) 102 vectors[VEC_LINE11] = fpu_emu; 103 #endif 104 105 if (CPU_IS_040 && !FPU_IS_EMU) { 106 /* set up FPSP entry points */ 107 asmlinkage void dz_vec(void) asm ("dz"); 108 asmlinkage void inex_vec(void) asm ("inex"); 109 asmlinkage void ovfl_vec(void) asm ("ovfl"); 110 asmlinkage void unfl_vec(void) asm ("unfl"); 111 asmlinkage void snan_vec(void) asm ("snan"); 112 asmlinkage void operr_vec(void) asm ("operr"); 113 asmlinkage void bsun_vec(void) asm ("bsun"); 114 asmlinkage void fline_vec(void) asm ("fline"); 115 asmlinkage void unsupp_vec(void) asm ("unsupp"); 116 117 vectors[VEC_FPDIVZ] = dz_vec; 118 vectors[VEC_FPIR] = inex_vec; 119 vectors[VEC_FPOVER] = ovfl_vec; 120 vectors[VEC_FPUNDER] = unfl_vec; 121 vectors[VEC_FPNAN] = snan_vec; 122 vectors[VEC_FPOE] = operr_vec; 123 vectors[VEC_FPBRUC] = bsun_vec; 124 vectors[VEC_LINE11] = fline_vec; 125 vectors[VEC_FPUNSUP] = unsupp_vec; 126 } 127 128 if (CPU_IS_060 && !FPU_IS_EMU) { 129 /* set up IFPSP entry points */ 130 asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan"); 131 asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr"); 132 asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl"); 133 asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl"); 134 asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz"); 135 asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex"); 136 asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline"); 137 asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp"); 138 asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd"); 139 140 vectors[VEC_FPNAN] = snan_vec6; 141 vectors[VEC_FPOE] = operr_vec6; 142 vectors[VEC_FPOVER] = ovfl_vec6; 143 vectors[VEC_FPUNDER] = unfl_vec6; 144 vectors[VEC_FPDIVZ] = dz_vec6; 145 vectors[VEC_FPIR] = inex_vec6; 146 vectors[VEC_LINE11] = fline_vec6; 147 vectors[VEC_FPUNSUP] = unsupp_vec6; 148 vectors[VEC_UNIMPEA] = effadd_vec6; 149 } 150 151 /* if running on an amiga, make the NMI interrupt do nothing */ 152 if (MACH_IS_AMIGA) { 153 vectors[VEC_INT7] = nmihandler; 154 } 155 } 156 157 158 static const char *vec_names[] = { 159 [VEC_RESETSP] = "RESET SP", 160 [VEC_RESETPC] = "RESET PC", 161 [VEC_BUSERR] = "BUS ERROR", 162 [VEC_ADDRERR] = "ADDRESS ERROR", 163 [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION", 164 [VEC_ZERODIV] = "ZERO DIVIDE", 165 [VEC_CHK] = "CHK", 166 [VEC_TRAP] = "TRAPcc", 167 [VEC_PRIV] = "PRIVILEGE VIOLATION", 168 [VEC_TRACE] = "TRACE", 169 [VEC_LINE10] = "LINE 1010", 170 [VEC_LINE11] = "LINE 1111", 171 [VEC_RESV12] = "UNASSIGNED RESERVED 12", 172 [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION", 173 [VEC_FORMAT] = "FORMAT ERROR", 174 [VEC_UNINT] = "UNINITIALIZED INTERRUPT", 175 [VEC_RESV16] = "UNASSIGNED RESERVED 16", 176 [VEC_RESV17] = "UNASSIGNED RESERVED 17", 177 [VEC_RESV18] = "UNASSIGNED RESERVED 18", 178 [VEC_RESV19] = "UNASSIGNED RESERVED 19", 179 [VEC_RESV20] = "UNASSIGNED RESERVED 20", 180 [VEC_RESV21] = "UNASSIGNED RESERVED 21", 181 [VEC_RESV22] = "UNASSIGNED RESERVED 22", 182 [VEC_RESV23] = "UNASSIGNED RESERVED 23", 183 [VEC_SPUR] = "SPURIOUS INTERRUPT", 184 [VEC_INT1] = "LEVEL 1 INT", 185 [VEC_INT2] = "LEVEL 2 INT", 186 [VEC_INT3] = "LEVEL 3 INT", 187 [VEC_INT4] = "LEVEL 4 INT", 188 [VEC_INT5] = "LEVEL 5 INT", 189 [VEC_INT6] = "LEVEL 6 INT", 190 [VEC_INT7] = "LEVEL 7 INT", 191 [VEC_SYS] = "SYSCALL", 192 [VEC_TRAP1] = "TRAP #1", 193 [VEC_TRAP2] = "TRAP #2", 194 [VEC_TRAP3] = "TRAP #3", 195 [VEC_TRAP4] = "TRAP #4", 196 [VEC_TRAP5] = "TRAP #5", 197 [VEC_TRAP6] = "TRAP #6", 198 [VEC_TRAP7] = "TRAP #7", 199 [VEC_TRAP8] = "TRAP #8", 200 [VEC_TRAP9] = "TRAP #9", 201 [VEC_TRAP10] = "TRAP #10", 202 [VEC_TRAP11] = "TRAP #11", 203 [VEC_TRAP12] = "TRAP #12", 204 [VEC_TRAP13] = "TRAP #13", 205 [VEC_TRAP14] = "TRAP #14", 206 [VEC_TRAP15] = "TRAP #15", 207 [VEC_FPBRUC] = "FPCP BSUN", 208 [VEC_FPIR] = "FPCP INEXACT", 209 [VEC_FPDIVZ] = "FPCP DIV BY 0", 210 [VEC_FPUNDER] = "FPCP UNDERFLOW", 211 [VEC_FPOE] = "FPCP OPERAND ERROR", 212 [VEC_FPOVER] = "FPCP OVERFLOW", 213 [VEC_FPNAN] = "FPCP SNAN", 214 [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION", 215 [VEC_MMUCFG] = "MMU CONFIGURATION ERROR", 216 [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR", 217 [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR", 218 [VEC_RESV59] = "UNASSIGNED RESERVED 59", 219 [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60", 220 [VEC_UNIMPII] = "UNASSIGNED RESERVED 61", 221 [VEC_RESV62] = "UNASSIGNED RESERVED 62", 222 [VEC_RESV63] = "UNASSIGNED RESERVED 63", 223 }; 224 225 static const char *space_names[] = { 226 [0] = "Space 0", 227 [USER_DATA] = "User Data", 228 [USER_PROGRAM] = "User Program", 229 #ifndef CONFIG_SUN3 230 [3] = "Space 3", 231 #else 232 [FC_CONTROL] = "Control", 233 #endif 234 [4] = "Space 4", 235 [SUPER_DATA] = "Super Data", 236 [SUPER_PROGRAM] = "Super Program", 237 [CPU_SPACE] = "CPU" 238 }; 239 240 void die_if_kernel(char *,struct pt_regs *,int); 241 asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, 242 unsigned long error_code); 243 int send_fault_sig(struct pt_regs *regs); 244 245 asmlinkage void trap_c(struct frame *fp); 246 247 #if defined (CONFIG_M68060) 248 static inline void access_error060 (struct frame *fp) 249 { 250 unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */ 251 252 #ifdef DEBUG 253 printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr); 254 #endif 255 256 if (fslw & MMU060_BPE) { 257 /* branch prediction error -> clear branch cache */ 258 __asm__ __volatile__ ("movec %/cacr,%/d0\n\t" 259 "orl #0x00400000,%/d0\n\t" 260 "movec %/d0,%/cacr" 261 : : : "d0" ); 262 /* return if there's no other error */ 263 if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE)) 264 return; 265 } 266 267 if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) { 268 unsigned long errorcode; 269 unsigned long addr = fp->un.fmt4.effaddr; 270 271 if (fslw & MMU060_MA) 272 addr = (addr + PAGE_SIZE - 1) & PAGE_MASK; 273 274 errorcode = 1; 275 if (fslw & MMU060_DESC_ERR) { 276 __flush_tlb040_one(addr); 277 errorcode = 0; 278 } 279 if (fslw & MMU060_W) 280 errorcode |= 2; 281 #ifdef DEBUG 282 printk("errorcode = %d\n", errorcode ); 283 #endif 284 do_page_fault(&fp->ptregs, addr, errorcode); 285 } else if (fslw & (MMU060_SEE)){ 286 /* Software Emulation Error. 287 * fault during mem_read/mem_write in ifpsp060/os.S 288 */ 289 send_fault_sig(&fp->ptregs); 290 } else if (!(fslw & (MMU060_RE|MMU060_WE)) || 291 send_fault_sig(&fp->ptregs) > 0) { 292 printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr); 293 printk( "68060 access error, fslw=%lx\n", fslw ); 294 trap_c( fp ); 295 } 296 } 297 #endif /* CONFIG_M68060 */ 298 299 #if defined (CONFIG_M68040) 300 static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs) 301 { 302 unsigned long mmusr; 303 mm_segment_t old_fs = get_fs(); 304 305 set_fs(MAKE_MM_SEG(wbs)); 306 307 if (iswrite) 308 asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr)); 309 else 310 asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr)); 311 312 asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr)); 313 314 set_fs(old_fs); 315 316 return mmusr; 317 } 318 319 static inline int do_040writeback1(unsigned short wbs, unsigned long wba, 320 unsigned long wbd) 321 { 322 int res = 0; 323 mm_segment_t old_fs = get_fs(); 324 325 /* set_fs can not be moved, otherwise put_user() may oops */ 326 set_fs(MAKE_MM_SEG(wbs)); 327 328 switch (wbs & WBSIZ_040) { 329 case BA_SIZE_BYTE: 330 res = put_user(wbd & 0xff, (char __user *)wba); 331 break; 332 case BA_SIZE_WORD: 333 res = put_user(wbd & 0xffff, (short __user *)wba); 334 break; 335 case BA_SIZE_LONG: 336 res = put_user(wbd, (int __user *)wba); 337 break; 338 } 339 340 /* set_fs can not be moved, otherwise put_user() may oops */ 341 set_fs(old_fs); 342 343 344 #ifdef DEBUG 345 printk("do_040writeback1, res=%d\n",res); 346 #endif 347 348 return res; 349 } 350 351 /* after an exception in a writeback the stack frame corresponding 352 * to that exception is discarded, set a few bits in the old frame 353 * to simulate what it should look like 354 */ 355 static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs) 356 { 357 fp->un.fmt7.faddr = wba; 358 fp->un.fmt7.ssw = wbs & 0xff; 359 if (wba != current->thread.faddr) 360 fp->un.fmt7.ssw |= MA_040; 361 } 362 363 static inline void do_040writebacks(struct frame *fp) 364 { 365 int res = 0; 366 #if 0 367 if (fp->un.fmt7.wb1s & WBV_040) 368 printk("access_error040: cannot handle 1st writeback. oops.\n"); 369 #endif 370 371 if ((fp->un.fmt7.wb2s & WBV_040) && 372 !(fp->un.fmt7.wb2s & WBTT_040)) { 373 res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, 374 fp->un.fmt7.wb2d); 375 if (res) 376 fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s); 377 else 378 fp->un.fmt7.wb2s = 0; 379 } 380 381 /* do the 2nd wb only if the first one was successful (except for a kernel wb) */ 382 if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) { 383 res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, 384 fp->un.fmt7.wb3d); 385 if (res) 386 { 387 fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s); 388 389 fp->un.fmt7.wb2s = fp->un.fmt7.wb3s; 390 fp->un.fmt7.wb3s &= (~WBV_040); 391 fp->un.fmt7.wb2a = fp->un.fmt7.wb3a; 392 fp->un.fmt7.wb2d = fp->un.fmt7.wb3d; 393 } 394 else 395 fp->un.fmt7.wb3s = 0; 396 } 397 398 if (res) 399 send_fault_sig(&fp->ptregs); 400 } 401 402 /* 403 * called from sigreturn(), must ensure userspace code didn't 404 * manipulate exception frame to circumvent protection, then complete 405 * pending writebacks 406 * we just clear TM2 to turn it into a userspace access 407 */ 408 asmlinkage void berr_040cleanup(struct frame *fp) 409 { 410 fp->un.fmt7.wb2s &= ~4; 411 fp->un.fmt7.wb3s &= ~4; 412 413 do_040writebacks(fp); 414 } 415 416 static inline void access_error040(struct frame *fp) 417 { 418 unsigned short ssw = fp->un.fmt7.ssw; 419 unsigned long mmusr; 420 421 #ifdef DEBUG 422 printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr); 423 printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s, 424 fp->un.fmt7.wb2s, fp->un.fmt7.wb3s); 425 printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n", 426 fp->un.fmt7.wb2a, fp->un.fmt7.wb3a, 427 fp->un.fmt7.wb2d, fp->un.fmt7.wb3d); 428 #endif 429 430 if (ssw & ATC_040) { 431 unsigned long addr = fp->un.fmt7.faddr; 432 unsigned long errorcode; 433 434 /* 435 * The MMU status has to be determined AFTER the address 436 * has been corrected if there was a misaligned access (MA). 437 */ 438 if (ssw & MA_040) 439 addr = (addr + 7) & -8; 440 441 /* MMU error, get the MMUSR info for this access */ 442 mmusr = probe040(!(ssw & RW_040), addr, ssw); 443 #ifdef DEBUG 444 printk("mmusr = %lx\n", mmusr); 445 #endif 446 errorcode = 1; 447 if (!(mmusr & MMU_R_040)) { 448 /* clear the invalid atc entry */ 449 __flush_tlb040_one(addr); 450 errorcode = 0; 451 } 452 453 /* despite what documentation seems to say, RMW 454 * accesses have always both the LK and RW bits set */ 455 if (!(ssw & RW_040) || (ssw & LK_040)) 456 errorcode |= 2; 457 458 if (do_page_fault(&fp->ptregs, addr, errorcode)) { 459 #ifdef DEBUG 460 printk("do_page_fault() !=0\n"); 461 #endif 462 if (user_mode(&fp->ptregs)){ 463 /* delay writebacks after signal delivery */ 464 #ifdef DEBUG 465 printk(".. was usermode - return\n"); 466 #endif 467 return; 468 } 469 /* disable writeback into user space from kernel 470 * (if do_page_fault didn't fix the mapping, 471 * the writeback won't do good) 472 */ 473 disable_wb: 474 #ifdef DEBUG 475 printk(".. disabling wb2\n"); 476 #endif 477 if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr) 478 fp->un.fmt7.wb2s &= ~WBV_040; 479 if (fp->un.fmt7.wb3a == fp->un.fmt7.faddr) 480 fp->un.fmt7.wb3s &= ~WBV_040; 481 } 482 } else { 483 /* In case of a bus error we either kill the process or expect 484 * the kernel to catch the fault, which then is also responsible 485 * for cleaning up the mess. 486 */ 487 current->thread.signo = SIGBUS; 488 current->thread.faddr = fp->un.fmt7.faddr; 489 if (send_fault_sig(&fp->ptregs) >= 0) 490 printk("68040 bus error (ssw=%x, faddr=%lx)\n", ssw, 491 fp->un.fmt7.faddr); 492 goto disable_wb; 493 } 494 495 do_040writebacks(fp); 496 } 497 #endif /* CONFIG_M68040 */ 498 499 #if defined(CONFIG_SUN3) 500 #include <asm/sun3mmu.h> 501 502 extern int mmu_emu_handle_fault (unsigned long, int, int); 503 504 /* sun3 version of bus_error030 */ 505 506 static inline void bus_error030 (struct frame *fp) 507 { 508 unsigned char buserr_type = sun3_get_buserr (); 509 unsigned long addr, errorcode; 510 unsigned short ssw = fp->un.fmtb.ssw; 511 extern unsigned long _sun3_map_test_start, _sun3_map_test_end; 512 513 #ifdef DEBUG 514 if (ssw & (FC | FB)) 515 printk ("Instruction fault at %#010lx\n", 516 ssw & FC ? 517 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 518 : 519 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 520 if (ssw & DF) 521 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 522 ssw & RW ? "read" : "write", 523 fp->un.fmtb.daddr, 524 space_names[ssw & DFC], fp->ptregs.pc); 525 #endif 526 527 /* 528 * Check if this page should be demand-mapped. This needs to go before 529 * the testing for a bad kernel-space access (demand-mapping applies 530 * to kernel accesses too). 531 */ 532 533 if ((ssw & DF) 534 && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) { 535 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0)) 536 return; 537 } 538 539 /* Check for kernel-space pagefault (BAD). */ 540 if (fp->ptregs.sr & PS_S) { 541 /* kernel fault must be a data fault to user space */ 542 if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) { 543 // try checking the kernel mappings before surrender 544 if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1)) 545 return; 546 /* instruction fault or kernel data fault! */ 547 if (ssw & (FC | FB)) 548 printk ("Instruction fault at %#010lx\n", 549 fp->ptregs.pc); 550 if (ssw & DF) { 551 /* was this fault incurred testing bus mappings? */ 552 if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) && 553 (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) { 554 send_fault_sig(&fp->ptregs); 555 return; 556 } 557 558 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 559 ssw & RW ? "read" : "write", 560 fp->un.fmtb.daddr, 561 space_names[ssw & DFC], fp->ptregs.pc); 562 } 563 printk ("BAD KERNEL BUSERR\n"); 564 565 die_if_kernel("Oops", &fp->ptregs,0); 566 force_sig(SIGKILL, current); 567 return; 568 } 569 } else { 570 /* user fault */ 571 if (!(ssw & (FC | FB)) && !(ssw & DF)) 572 /* not an instruction fault or data fault! BAD */ 573 panic ("USER BUSERR w/o instruction or data fault"); 574 } 575 576 577 /* First handle the data fault, if any. */ 578 if (ssw & DF) { 579 addr = fp->un.fmtb.daddr; 580 581 // errorcode bit 0: 0 -> no page 1 -> protection fault 582 // errorcode bit 1: 0 -> read fault 1 -> write fault 583 584 // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault 585 // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault 586 587 if (buserr_type & SUN3_BUSERR_PROTERR) 588 errorcode = 0x01; 589 else if (buserr_type & SUN3_BUSERR_INVALID) 590 errorcode = 0x00; 591 else { 592 #ifdef DEBUG 593 printk ("*** unexpected busfault type=%#04x\n", buserr_type); 594 printk ("invalid %s access at %#lx from pc %#lx\n", 595 !(ssw & RW) ? "write" : "read", addr, 596 fp->ptregs.pc); 597 #endif 598 die_if_kernel ("Oops", &fp->ptregs, buserr_type); 599 force_sig (SIGBUS, current); 600 return; 601 } 602 603 //todo: wtf is RM bit? --m 604 if (!(ssw & RW) || ssw & RM) 605 errorcode |= 0x02; 606 607 /* Handle page fault. */ 608 do_page_fault (&fp->ptregs, addr, errorcode); 609 610 /* Retry the data fault now. */ 611 return; 612 } 613 614 /* Now handle the instruction fault. */ 615 616 /* Get the fault address. */ 617 if (fp->ptregs.format == 0xA) 618 addr = fp->ptregs.pc + 4; 619 else 620 addr = fp->un.fmtb.baddr; 621 if (ssw & FC) 622 addr -= 2; 623 624 if (buserr_type & SUN3_BUSERR_INVALID) { 625 if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0)) 626 do_page_fault (&fp->ptregs, addr, 0); 627 } else { 628 #ifdef DEBUG 629 printk ("protection fault on insn access (segv).\n"); 630 #endif 631 force_sig (SIGSEGV, current); 632 } 633 } 634 #else 635 #if defined(CPU_M68020_OR_M68030) 636 static inline void bus_error030 (struct frame *fp) 637 { 638 volatile unsigned short temp; 639 unsigned short mmusr; 640 unsigned long addr, errorcode; 641 unsigned short ssw = fp->un.fmtb.ssw; 642 #ifdef DEBUG 643 unsigned long desc; 644 645 printk ("pid = %x ", current->pid); 646 printk ("SSW=%#06x ", ssw); 647 648 if (ssw & (FC | FB)) 649 printk ("Instruction fault at %#010lx\n", 650 ssw & FC ? 651 fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2 652 : 653 fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 654 if (ssw & DF) 655 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 656 ssw & RW ? "read" : "write", 657 fp->un.fmtb.daddr, 658 space_names[ssw & DFC], fp->ptregs.pc); 659 #endif 660 661 /* ++andreas: If a data fault and an instruction fault happen 662 at the same time map in both pages. */ 663 664 /* First handle the data fault, if any. */ 665 if (ssw & DF) { 666 addr = fp->un.fmtb.daddr; 667 668 #ifdef DEBUG 669 asm volatile ("ptestr %3,%2@,#7,%0\n\t" 670 "pmove %%psr,%1@" 671 : "=a&" (desc) 672 : "a" (&temp), "a" (addr), "d" (ssw)); 673 #else 674 asm volatile ("ptestr %2,%1@,#7\n\t" 675 "pmove %%psr,%0@" 676 : : "a" (&temp), "a" (addr), "d" (ssw)); 677 #endif 678 mmusr = temp; 679 680 #ifdef DEBUG 681 printk("mmusr is %#x for addr %#lx in task %p\n", 682 mmusr, addr, current); 683 printk("descriptor address is %#lx, contents %#lx\n", 684 __va(desc), *(unsigned long *)__va(desc)); 685 #endif 686 687 errorcode = (mmusr & MMU_I) ? 0 : 1; 688 if (!(ssw & RW) || (ssw & RM)) 689 errorcode |= 2; 690 691 if (mmusr & (MMU_I | MMU_WP)) { 692 if (ssw & 4) { 693 printk("Data %s fault at %#010lx in %s (pc=%#lx)\n", 694 ssw & RW ? "read" : "write", 695 fp->un.fmtb.daddr, 696 space_names[ssw & DFC], fp->ptregs.pc); 697 goto buserr; 698 } 699 /* Don't try to do anything further if an exception was 700 handled. */ 701 if (do_page_fault (&fp->ptregs, addr, errorcode) < 0) 702 return; 703 } else if (!(mmusr & MMU_I)) { 704 /* probably a 020 cas fault */ 705 if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0) 706 printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr); 707 } else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 708 printk("invalid %s access at %#lx from pc %#lx\n", 709 !(ssw & RW) ? "write" : "read", addr, 710 fp->ptregs.pc); 711 die_if_kernel("Oops",&fp->ptregs,mmusr); 712 force_sig(SIGSEGV, current); 713 return; 714 } else { 715 #if 0 716 static volatile long tlong; 717 #endif 718 719 printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n", 720 !(ssw & RW) ? "write" : "read", addr, 721 fp->ptregs.pc, ssw); 722 asm volatile ("ptestr #1,%1@,#0\n\t" 723 "pmove %%psr,%0@" 724 : /* no outputs */ 725 : "a" (&temp), "a" (addr)); 726 mmusr = temp; 727 728 printk ("level 0 mmusr is %#x\n", mmusr); 729 #if 0 730 asm volatile ("pmove %%tt0,%0@" 731 : /* no outputs */ 732 : "a" (&tlong)); 733 printk("tt0 is %#lx, ", tlong); 734 asm volatile ("pmove %%tt1,%0@" 735 : /* no outputs */ 736 : "a" (&tlong)); 737 printk("tt1 is %#lx\n", tlong); 738 #endif 739 #ifdef DEBUG 740 printk("Unknown SIGSEGV - 1\n"); 741 #endif 742 die_if_kernel("Oops",&fp->ptregs,mmusr); 743 force_sig(SIGSEGV, current); 744 return; 745 } 746 747 /* setup an ATC entry for the access about to be retried */ 748 if (!(ssw & RW) || (ssw & RM)) 749 asm volatile ("ploadw %1,%0@" : /* no outputs */ 750 : "a" (addr), "d" (ssw)); 751 else 752 asm volatile ("ploadr %1,%0@" : /* no outputs */ 753 : "a" (addr), "d" (ssw)); 754 } 755 756 /* Now handle the instruction fault. */ 757 758 if (!(ssw & (FC|FB))) 759 return; 760 761 if (fp->ptregs.sr & PS_S) { 762 printk("Instruction fault at %#010lx\n", 763 fp->ptregs.pc); 764 buserr: 765 printk ("BAD KERNEL BUSERR\n"); 766 die_if_kernel("Oops",&fp->ptregs,0); 767 force_sig(SIGKILL, current); 768 return; 769 } 770 771 /* get the fault address */ 772 if (fp->ptregs.format == 10) 773 addr = fp->ptregs.pc + 4; 774 else 775 addr = fp->un.fmtb.baddr; 776 if (ssw & FC) 777 addr -= 2; 778 779 if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0) 780 /* Insn fault on same page as data fault. But we 781 should still create the ATC entry. */ 782 goto create_atc_entry; 783 784 #ifdef DEBUG 785 asm volatile ("ptestr #1,%2@,#7,%0\n\t" 786 "pmove %%psr,%1@" 787 : "=a&" (desc) 788 : "a" (&temp), "a" (addr)); 789 #else 790 asm volatile ("ptestr #1,%1@,#7\n\t" 791 "pmove %%psr,%0@" 792 : : "a" (&temp), "a" (addr)); 793 #endif 794 mmusr = temp; 795 796 #ifdef DEBUG 797 printk ("mmusr is %#x for addr %#lx in task %p\n", 798 mmusr, addr, current); 799 printk ("descriptor address is %#lx, contents %#lx\n", 800 __va(desc), *(unsigned long *)__va(desc)); 801 #endif 802 803 if (mmusr & MMU_I) 804 do_page_fault (&fp->ptregs, addr, 0); 805 else if (mmusr & (MMU_B|MMU_L|MMU_S)) { 806 printk ("invalid insn access at %#lx from pc %#lx\n", 807 addr, fp->ptregs.pc); 808 #ifdef DEBUG 809 printk("Unknown SIGSEGV - 2\n"); 810 #endif 811 die_if_kernel("Oops",&fp->ptregs,mmusr); 812 force_sig(SIGSEGV, current); 813 return; 814 } 815 816 create_atc_entry: 817 /* setup an ATC entry for the access about to be retried */ 818 asm volatile ("ploadr #2,%0@" : /* no outputs */ 819 : "a" (addr)); 820 } 821 #endif /* CPU_M68020_OR_M68030 */ 822 #endif /* !CONFIG_SUN3 */ 823 824 asmlinkage void buserr_c(struct frame *fp) 825 { 826 /* Only set esp0 if coming from user mode */ 827 if (user_mode(&fp->ptregs)) 828 current->thread.esp0 = (unsigned long) fp; 829 830 #ifdef DEBUG 831 printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format); 832 #endif 833 834 switch (fp->ptregs.format) { 835 #if defined (CONFIG_M68060) 836 case 4: /* 68060 access error */ 837 access_error060 (fp); 838 break; 839 #endif 840 #if defined (CONFIG_M68040) 841 case 0x7: /* 68040 access error */ 842 access_error040 (fp); 843 break; 844 #endif 845 #if defined (CPU_M68020_OR_M68030) 846 case 0xa: 847 case 0xb: 848 bus_error030 (fp); 849 break; 850 #endif 851 default: 852 die_if_kernel("bad frame format",&fp->ptregs,0); 853 #ifdef DEBUG 854 printk("Unknown SIGSEGV - 4\n"); 855 #endif 856 force_sig(SIGSEGV, current); 857 } 858 } 859 860 861 static int kstack_depth_to_print = 48; 862 863 void show_trace(unsigned long *stack) 864 { 865 unsigned long *endstack; 866 unsigned long addr; 867 int i; 868 869 printk("Call Trace:"); 870 addr = (unsigned long)stack + THREAD_SIZE - 1; 871 endstack = (unsigned long *)(addr & -THREAD_SIZE); 872 i = 0; 873 while (stack + 1 <= endstack) { 874 addr = *stack++; 875 /* 876 * If the address is either in the text segment of the 877 * kernel, or in the region which contains vmalloc'ed 878 * memory, it *may* be the address of a calling 879 * routine; if so, print it so that someone tracing 880 * down the cause of the crash will be able to figure 881 * out the call path that was taken. 882 */ 883 if (__kernel_text_address(addr)) { 884 #ifndef CONFIG_KALLSYMS 885 if (i % 5 == 0) 886 printk("\n "); 887 #endif 888 printk(" [<%08lx>] %pS\n", addr, (void *)addr); 889 i++; 890 } 891 } 892 printk("\n"); 893 } 894 895 void show_registers(struct pt_regs *regs) 896 { 897 struct frame *fp = (struct frame *)regs; 898 mm_segment_t old_fs = get_fs(); 899 u16 c, *cp; 900 unsigned long addr; 901 int i; 902 903 print_modules(); 904 printk("PC: [<%08lx>] %pS\n", regs->pc, (void *)regs->pc); 905 printk("SR: %04x SP: %p a2: %08lx\n", regs->sr, regs, regs->a2); 906 printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n", 907 regs->d0, regs->d1, regs->d2, regs->d3); 908 printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n", 909 regs->d4, regs->d5, regs->a0, regs->a1); 910 911 printk("Process %s (pid: %d, task=%p)\n", 912 current->comm, task_pid_nr(current), current); 913 addr = (unsigned long)&fp->un; 914 printk("Frame format=%X ", regs->format); 915 switch (regs->format) { 916 case 0x2: 917 printk("instr addr=%08lx\n", fp->un.fmt2.iaddr); 918 addr += sizeof(fp->un.fmt2); 919 break; 920 case 0x3: 921 printk("eff addr=%08lx\n", fp->un.fmt3.effaddr); 922 addr += sizeof(fp->un.fmt3); 923 break; 924 case 0x4: 925 printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n" 926 : "eff addr=%08lx pc=%08lx\n"), 927 fp->un.fmt4.effaddr, fp->un.fmt4.pc); 928 addr += sizeof(fp->un.fmt4); 929 break; 930 case 0x7: 931 printk("eff addr=%08lx ssw=%04x faddr=%08lx\n", 932 fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr); 933 printk("wb 1 stat/addr/data: %04x %08lx %08lx\n", 934 fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0); 935 printk("wb 2 stat/addr/data: %04x %08lx %08lx\n", 936 fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d); 937 printk("wb 3 stat/addr/data: %04x %08lx %08lx\n", 938 fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d); 939 printk("push data: %08lx %08lx %08lx %08lx\n", 940 fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2, 941 fp->un.fmt7.pd3); 942 addr += sizeof(fp->un.fmt7); 943 break; 944 case 0x9: 945 printk("instr addr=%08lx\n", fp->un.fmt9.iaddr); 946 addr += sizeof(fp->un.fmt9); 947 break; 948 case 0xa: 949 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 950 fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb, 951 fp->un.fmta.daddr, fp->un.fmta.dobuf); 952 addr += sizeof(fp->un.fmta); 953 break; 954 case 0xb: 955 printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n", 956 fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb, 957 fp->un.fmtb.daddr, fp->un.fmtb.dobuf); 958 printk("baddr=%08lx dibuf=%08lx ver=%x\n", 959 fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver); 960 addr += sizeof(fp->un.fmtb); 961 break; 962 default: 963 printk("\n"); 964 } 965 show_stack(NULL, (unsigned long *)addr); 966 967 printk("Code:"); 968 set_fs(KERNEL_DS); 969 cp = (u16 *)regs->pc; 970 for (i = -8; i < 16; i++) { 971 if (get_user(c, cp + i) && i >= 0) { 972 printk(" Bad PC value."); 973 break; 974 } 975 printk(i ? " %04x" : " <%04x>", c); 976 } 977 set_fs(old_fs); 978 printk ("\n"); 979 } 980 981 void show_stack(struct task_struct *task, unsigned long *stack) 982 { 983 unsigned long *p; 984 unsigned long *endstack; 985 int i; 986 987 if (!stack) { 988 if (task) 989 stack = (unsigned long *)task->thread.esp0; 990 else 991 stack = (unsigned long *)&stack; 992 } 993 endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE); 994 995 printk("Stack from %08lx:", (unsigned long)stack); 996 p = stack; 997 for (i = 0; i < kstack_depth_to_print; i++) { 998 if (p + 1 > endstack) 999 break; 1000 if (i % 8 == 0) 1001 printk("\n "); 1002 printk(" %08lx", *p++); 1003 } 1004 printk("\n"); 1005 show_trace(stack); 1006 } 1007 1008 /* 1009 * The architecture-independent backtrace generator 1010 */ 1011 void dump_stack(void) 1012 { 1013 unsigned long stack; 1014 1015 show_trace(&stack); 1016 } 1017 1018 EXPORT_SYMBOL(dump_stack); 1019 1020 void bad_super_trap (struct frame *fp) 1021 { 1022 console_verbose(); 1023 if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names)) 1024 printk ("*** %s *** FORMAT=%X\n", 1025 vec_names[(fp->ptregs.vector) >> 2], 1026 fp->ptregs.format); 1027 else 1028 printk ("*** Exception %d *** FORMAT=%X\n", 1029 (fp->ptregs.vector) >> 2, 1030 fp->ptregs.format); 1031 if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) { 1032 unsigned short ssw = fp->un.fmtb.ssw; 1033 1034 printk ("SSW=%#06x ", ssw); 1035 1036 if (ssw & RC) 1037 printk ("Pipe stage C instruction fault at %#010lx\n", 1038 (fp->ptregs.format) == 0xA ? 1039 fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2); 1040 if (ssw & RB) 1041 printk ("Pipe stage B instruction fault at %#010lx\n", 1042 (fp->ptregs.format) == 0xA ? 1043 fp->ptregs.pc + 4 : fp->un.fmtb.baddr); 1044 if (ssw & DF) 1045 printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n", 1046 ssw & RW ? "read" : "write", 1047 fp->un.fmtb.daddr, space_names[ssw & DFC], 1048 fp->ptregs.pc); 1049 } 1050 printk ("Current process id is %d\n", task_pid_nr(current)); 1051 die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0); 1052 } 1053 1054 asmlinkage void trap_c(struct frame *fp) 1055 { 1056 int sig; 1057 siginfo_t info; 1058 1059 if (fp->ptregs.sr & PS_S) { 1060 if (fp->ptregs.vector == VEC_TRACE << 2) { 1061 /* traced a trapping instruction on a 68020/30, 1062 * real exception will be executed afterwards. 1063 */ 1064 } else if (!handle_kernel_fault(&fp->ptregs)) 1065 bad_super_trap(fp); 1066 return; 1067 } 1068 1069 /* send the appropriate signal to the user program */ 1070 switch ((fp->ptregs.vector) >> 2) { 1071 case VEC_ADDRERR: 1072 info.si_code = BUS_ADRALN; 1073 sig = SIGBUS; 1074 break; 1075 case VEC_ILLEGAL: 1076 case VEC_LINE10: 1077 case VEC_LINE11: 1078 info.si_code = ILL_ILLOPC; 1079 sig = SIGILL; 1080 break; 1081 case VEC_PRIV: 1082 info.si_code = ILL_PRVOPC; 1083 sig = SIGILL; 1084 break; 1085 case VEC_COPROC: 1086 info.si_code = ILL_COPROC; 1087 sig = SIGILL; 1088 break; 1089 case VEC_TRAP1: 1090 case VEC_TRAP2: 1091 case VEC_TRAP3: 1092 case VEC_TRAP4: 1093 case VEC_TRAP5: 1094 case VEC_TRAP6: 1095 case VEC_TRAP7: 1096 case VEC_TRAP8: 1097 case VEC_TRAP9: 1098 case VEC_TRAP10: 1099 case VEC_TRAP11: 1100 case VEC_TRAP12: 1101 case VEC_TRAP13: 1102 case VEC_TRAP14: 1103 info.si_code = ILL_ILLTRP; 1104 sig = SIGILL; 1105 break; 1106 case VEC_FPBRUC: 1107 case VEC_FPOE: 1108 case VEC_FPNAN: 1109 info.si_code = FPE_FLTINV; 1110 sig = SIGFPE; 1111 break; 1112 case VEC_FPIR: 1113 info.si_code = FPE_FLTRES; 1114 sig = SIGFPE; 1115 break; 1116 case VEC_FPDIVZ: 1117 info.si_code = FPE_FLTDIV; 1118 sig = SIGFPE; 1119 break; 1120 case VEC_FPUNDER: 1121 info.si_code = FPE_FLTUND; 1122 sig = SIGFPE; 1123 break; 1124 case VEC_FPOVER: 1125 info.si_code = FPE_FLTOVF; 1126 sig = SIGFPE; 1127 break; 1128 case VEC_ZERODIV: 1129 info.si_code = FPE_INTDIV; 1130 sig = SIGFPE; 1131 break; 1132 case VEC_CHK: 1133 case VEC_TRAP: 1134 info.si_code = FPE_INTOVF; 1135 sig = SIGFPE; 1136 break; 1137 case VEC_TRACE: /* ptrace single step */ 1138 info.si_code = TRAP_TRACE; 1139 sig = SIGTRAP; 1140 break; 1141 case VEC_TRAP15: /* breakpoint */ 1142 info.si_code = TRAP_BRKPT; 1143 sig = SIGTRAP; 1144 break; 1145 default: 1146 info.si_code = ILL_ILLOPC; 1147 sig = SIGILL; 1148 break; 1149 } 1150 info.si_signo = sig; 1151 info.si_errno = 0; 1152 switch (fp->ptregs.format) { 1153 default: 1154 info.si_addr = (void *) fp->ptregs.pc; 1155 break; 1156 case 2: 1157 info.si_addr = (void *) fp->un.fmt2.iaddr; 1158 break; 1159 case 7: 1160 info.si_addr = (void *) fp->un.fmt7.effaddr; 1161 break; 1162 case 9: 1163 info.si_addr = (void *) fp->un.fmt9.iaddr; 1164 break; 1165 case 10: 1166 info.si_addr = (void *) fp->un.fmta.daddr; 1167 break; 1168 case 11: 1169 info.si_addr = (void *) fp->un.fmtb.daddr; 1170 break; 1171 } 1172 force_sig_info (sig, &info, current); 1173 } 1174 1175 void die_if_kernel (char *str, struct pt_regs *fp, int nr) 1176 { 1177 if (!(fp->sr & PS_S)) 1178 return; 1179 1180 console_verbose(); 1181 printk("%s: %08x\n",str,nr); 1182 show_registers(fp); 1183 add_taint(TAINT_DIE); 1184 do_exit(SIGSEGV); 1185 } 1186 1187 /* 1188 * This function is called if an error occur while accessing 1189 * user-space from the fpsp040 code. 1190 */ 1191 asmlinkage void fpsp040_die(void) 1192 { 1193 do_exit(SIGSEGV); 1194 } 1195 1196 #ifdef CONFIG_M68KFPU_EMU 1197 asmlinkage void fpemu_signal(int signal, int code, void *addr) 1198 { 1199 siginfo_t info; 1200 1201 info.si_signo = signal; 1202 info.si_errno = 0; 1203 info.si_code = code; 1204 info.si_addr = addr; 1205 force_sig_info(signal, &info, current); 1206 } 1207 #endif 1208