1/* -*- mode: asm -*- 2** 3** head.S -- This file contains the initial boot code for the 4** Linux/68k kernel. 5** 6** Copyright 1993 by Hamish Macdonald 7** 8** 68040 fixes by Michael Rausch 9** 68060 fixes by Roman Hodek 10** MMU cleanup by Randy Thelen 11** Final MMU cleanup by Roman Zippel 12** 13** Atari support by Andreas Schwab, using ideas of Robert de Vries 14** and Bjoern Brauel 15** VME Support by Richard Hirst 16** 17** 94/11/14 Andreas Schwab: put kernel at PAGESIZE 18** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari 19** ++ Bjoern & Roman: ATARI-68040 support for the Medusa 20** 95/11/18 Richard Hirst: Added MVME166 support 21** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with 22** Magnum- and FX-alternate ram 23** 98/04/25 Phil Blundell: added HP300 support 24** 1998/08/30 David Kilzer: Added support for font_desc structures 25** for linux-2.1.115 26** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01) 27** 2004/05/13 Kars de Jong: Finalised HP300 support 28** 29** This file is subject to the terms and conditions of the GNU General Public 30** License. See the file README.legal in the main directory of this archive 31** for more details. 32** 33*/ 34 35/* 36 * Linux startup code. 37 * 38 * At this point, the boot loader has: 39 * Disabled interrupts 40 * Disabled caches 41 * Put us in supervisor state. 42 * 43 * The kernel setup code takes the following steps: 44 * . Raise interrupt level 45 * . Set up initial kernel memory mapping. 46 * . This sets up a mapping of the 4M of memory the kernel is located in. 47 * . It also does a mapping of any initial machine specific areas. 48 * . Enable the MMU 49 * . Enable cache memories 50 * . Jump to kernel startup 51 * 52 * Much of the file restructuring was to accomplish: 53 * 1) Remove register dependency through-out the file. 54 * 2) Increase use of subroutines to perform functions 55 * 3) Increase readability of the code 56 * 57 * Of course, readability is a subjective issue, so it will never be 58 * argued that that goal was accomplished. It was merely a goal. 59 * A key way to help make code more readable is to give good 60 * documentation. So, the first thing you will find is exaustive 61 * write-ups on the structure of the file, and the features of the 62 * functional subroutines. 63 * 64 * General Structure: 65 * ------------------ 66 * Without a doubt the single largest chunk of head.S is spent 67 * mapping the kernel and I/O physical space into the logical range 68 * for the kernel. 69 * There are new subroutines and data structures to make MMU 70 * support cleaner and easier to understand. 71 * First, you will find a routine call "mmu_map" which maps 72 * a logical to a physical region for some length given a cache 73 * type on behalf of the caller. This routine makes writing the 74 * actual per-machine specific code very simple. 75 * A central part of the code, but not a subroutine in itself, 76 * is the mmu_init code which is broken down into mapping the kernel 77 * (the same for all machines) and mapping machine-specific I/O 78 * regions. 79 * Also, there will be a description of engaging the MMU and 80 * caches. 81 * You will notice that there is a chunk of code which 82 * can emit the entire MMU mapping of the machine. This is present 83 * only in debug modes and can be very helpful. 84 * Further, there is a new console driver in head.S that is 85 * also only engaged in debug mode. Currently, it's only supported 86 * on the Macintosh class of machines. However, it is hoped that 87 * others will plug-in support for specific machines. 88 * 89 * ###################################################################### 90 * 91 * mmu_map 92 * ------- 93 * mmu_map was written for two key reasons. First, it was clear 94 * that it was very difficult to read the previous code for mapping 95 * regions of memory. Second, the Macintosh required such extensive 96 * memory allocations that it didn't make sense to propagate the 97 * existing code any further. 98 * mmu_map requires some parameters: 99 * 100 * mmu_map (logical, physical, length, cache_type) 101 * 102 * While this essentially describes the function in the abstract, you'll 103 * find more indepth description of other parameters at the implementation site. 104 * 105 * mmu_get_root_table_entry 106 * ------------------------ 107 * mmu_get_ptr_table_entry 108 * ----------------------- 109 * mmu_get_page_table_entry 110 * ------------------------ 111 * 112 * These routines are used by other mmu routines to get a pointer into 113 * a table, if necessary a new table is allocated. These routines are working 114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root 115 * table needs of course only to be allocated once in mmu_get_root_table_entry, 116 * so that here also some mmu specific initialization is done. The second page 117 * at the start of the kernel (the first page is unmapped later) is used for 118 * the kernel_pg_dir. It must be at a position known at link time (as it's used 119 * to initialize the init task struct) and since it needs special cache 120 * settings, it's the easiest to use this page, the rest of the page is used 121 * for further pointer tables. 122 * mmu_get_page_table_entry allocates always a whole page for page tables, this 123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense 124 * to manage page tables in smaller pieces as nearly all mappings have that 125 * size. 126 * 127 * ###################################################################### 128 * 129 * 130 * ###################################################################### 131 * 132 * mmu_engage 133 * ---------- 134 * Thanks to a small helping routine enabling the mmu got quite simple 135 * and there is only one way left. mmu_engage makes a complete a new mapping 136 * that only includes the absolute necessary to be able to jump to the final 137 * position and to restore the original mapping. 138 * As this code doesn't need a transparent translation register anymore this 139 * means all registers are free to be used by machines that needs them for 140 * other purposes. 141 * 142 * ###################################################################### 143 * 144 * mmu_print 145 * --------- 146 * This algorithm will print out the page tables of the system as 147 * appropriate for an 030 or an 040. This is useful for debugging purposes 148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses. 149 * 150 * ###################################################################### 151 * 152 * console_init 153 * ------------ 154 * The console is also able to be turned off. The console in head.S 155 * is specifically for debugging and can be very useful. It is surrounded by 156 * #ifdef CONSOLE/#endif clauses so it doesn't have to ship in known-good 157 * kernels. It's basic algorithm is to determine the size of the screen 158 * (in height/width and bit depth) and then use that information for 159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for 160 * debugging so I can see more good data. But it was trivial to add support 161 * for both fonts, so I included it. 162 * Also, the algorithm for plotting pixels is abstracted so that in 163 * theory other platforms could add support for different kinds of frame 164 * buffers. This could be very useful. 165 * 166 * console_put_penguin 167 * ------------------- 168 * An important part of any Linux bring up is the penguin and there's 169 * nothing like getting the Penguin on the screen! This algorithm will work 170 * on any machine for which there is a console_plot_pixel. 171 * 172 * console_scroll 173 * -------------- 174 * My hope is that the scroll algorithm does the right thing on the 175 * various platforms, but it wouldn't be hard to add the test conditions 176 * and new code if it doesn't. 177 * 178 * console_putc 179 * ------------- 180 * 181 * ###################################################################### 182 * 183 * Register usage has greatly simplified within head.S. Every subroutine 184 * saves and restores all registers that it modifies (except it returns a 185 * value in there of course). So the only register that needs to be initialized 186 * is the stack pointer. 187 * All other init code and data is now placed in the init section, so it will 188 * be automatically freed at the end of the kernel initialization. 189 * 190 * ###################################################################### 191 * 192 * options 193 * ------- 194 * There are many options available in a build of this file. I've 195 * taken the time to describe them here to save you the time of searching 196 * for them and trying to understand what they mean. 197 * 198 * CONFIG_xxx: These are the obvious machine configuration defines created 199 * during configuration. These are defined in autoconf.h. 200 * 201 * CONSOLE: There is support for head.S console in this file. This 202 * console can talk to a Mac frame buffer, but could easily be extrapolated 203 * to extend it to support other platforms. 204 * 205 * TEST_MMU: This is a test harness for running on any given machine but 206 * getting an MMU dump for another class of machine. The classes of machines 207 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.) 208 * and any of the models (030, 040, 060, etc.). 209 * 210 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed 211 * When head.S boots on Atari, Amiga, Macintosh, and VME 212 * machines. At that point the underlying logic will be 213 * believed to be solid enough to be trusted, and TEST_MMU 214 * can be dropped. Do note that that will clean up the 215 * head.S code significantly as large blocks of #if/#else 216 * clauses can be removed. 217 * 218 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into 219 * determing why devices don't appear to work. A test case was to remove 220 * the cacheability of the kernel bits. 221 * 222 * MMU_PRINT: There is a routine built into head.S that can display the 223 * MMU data structures. It outputs its result through the serial_putc 224 * interface. So where ever that winds up driving data, that's where the 225 * mmu struct will appear. On the Macintosh that's typically the console. 226 * 227 * SERIAL_DEBUG: There are a series of putc() macro statements 228 * scattered through out the code to give progress of status to the 229 * person sitting at the console. This constant determines whether those 230 * are used. 231 * 232 * DEBUG: This is the standard DEBUG flag that can be set for building 233 * the kernel. It has the effect adding additional tests into 234 * the code. 235 * 236 * FONT_6x11: 237 * FONT_8x8: 238 * FONT_8x16: 239 * In theory these could be determined at run time or handed 240 * over by the booter. But, let's be real, it's a fine hard 241 * coded value. (But, you will notice the code is run-time 242 * flexible!) A pointer to the font's struct font_desc 243 * is kept locally in Lconsole_font. It is used to determine 244 * font size information dynamically. 245 * 246 * Atari constants: 247 * USE_PRINTER: Use the printer port for serial debug. 248 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug. 249 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug. 250 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug. 251 * 252 * Macintosh constants: 253 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug and early console. 254 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug and early console. 255 */ 256 257#include <linux/linkage.h> 258#include <linux/init.h> 259#include <asm/bootinfo.h> 260#include <asm/bootinfo-amiga.h> 261#include <asm/bootinfo-atari.h> 262#include <asm/bootinfo-hp300.h> 263#include <asm/bootinfo-mac.h> 264#include <asm/bootinfo-q40.h> 265#include <asm/bootinfo-vme.h> 266#include <asm/setup.h> 267#include <asm/entry.h> 268#include <asm/pgtable.h> 269#include <asm/page.h> 270#include <asm/asm-offsets.h> 271 272#ifdef CONFIG_MAC 273 274#include <asm/machw.h> 275 276#ifdef CONFIG_FRAMEBUFFER_CONSOLE 277#define CONSOLE 278#define CONSOLE_PENGUIN 279#endif 280 281#ifdef CONFIG_EARLY_PRINTK 282#define SERIAL_DEBUG 283#else 284#undef SERIAL_DEBUG 285#endif 286 287#else /* !CONFIG_MAC */ 288 289#define SERIAL_DEBUG 290 291#endif /* !CONFIG_MAC */ 292 293#undef MMU_PRINT 294#undef MMU_NOCACHE_KERNEL 295#undef DEBUG 296 297/* 298 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8. 299 * The 8x8 font is harder to read but fits more on the screen. 300 */ 301#define FONT_8x8 /* default */ 302/* #define FONT_8x16 */ /* 2nd choice */ 303/* #define FONT_6x11 */ /* 3rd choice */ 304 305.globl kernel_pg_dir 306.globl availmem 307.globl m68k_pgtable_cachemode 308.globl m68k_supervisor_cachemode 309#ifdef CONFIG_MVME16x 310.globl mvme_bdid 311#endif 312#ifdef CONFIG_Q40 313.globl q40_mem_cptr 314#endif 315 316CPUTYPE_040 = 1 /* indicates an 040 */ 317CPUTYPE_060 = 2 /* indicates an 060 */ 318CPUTYPE_0460 = 3 /* if either above are set, this is set */ 319CPUTYPE_020 = 4 /* indicates an 020 */ 320 321/* Translation control register */ 322TC_ENABLE = 0x8000 323TC_PAGE8K = 0x4000 324TC_PAGE4K = 0x0000 325 326/* Transparent translation registers */ 327TTR_ENABLE = 0x8000 /* enable transparent translation */ 328TTR_ANYMODE = 0x4000 /* user and kernel mode access */ 329TTR_KERNELMODE = 0x2000 /* only kernel mode access */ 330TTR_USERMODE = 0x0000 /* only user mode access */ 331TTR_CI = 0x0400 /* inhibit cache */ 332TTR_RW = 0x0200 /* read/write mode */ 333TTR_RWM = 0x0100 /* read/write mask */ 334TTR_FCB2 = 0x0040 /* function code base bit 2 */ 335TTR_FCB1 = 0x0020 /* function code base bit 1 */ 336TTR_FCB0 = 0x0010 /* function code base bit 0 */ 337TTR_FCM2 = 0x0004 /* function code mask bit 2 */ 338TTR_FCM1 = 0x0002 /* function code mask bit 1 */ 339TTR_FCM0 = 0x0001 /* function code mask bit 0 */ 340 341/* Cache Control registers */ 342CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */ 343CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */ 344CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */ 345CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */ 346CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */ 347CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */ 348CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */ 349CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */ 350CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */ 351CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */ 352CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */ 353CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */ 354CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */ 355CC3_CLR_D = 0x00000800 /* clear data cache (68030) */ 356CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */ 357CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */ 358CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */ 359CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */ 360CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */ 361CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */ 362CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */ 363CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */ 364 365/* Miscellaneous definitions */ 366PAGESIZE = 4096 367PAGESHIFT = 12 368 369ROOT_TABLE_SIZE = 128 370PTR_TABLE_SIZE = 128 371PAGE_TABLE_SIZE = 64 372ROOT_INDEX_SHIFT = 25 373PTR_INDEX_SHIFT = 18 374PAGE_INDEX_SHIFT = 12 375 376#ifdef DEBUG 377/* When debugging use readable names for labels */ 378#ifdef __STDC__ 379#define L(name) .head.S.##name 380#else 381#define L(name) .head.S./**/name 382#endif 383#else 384#ifdef __STDC__ 385#define L(name) .L##name 386#else 387#define L(name) .L/**/name 388#endif 389#endif 390 391/* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */ 392#ifndef __INITDATA 393#define __INITDATA .data 394#define __FINIT .previous 395#endif 396 397/* Several macros to make the writing of subroutines easier: 398 * - func_start marks the beginning of the routine which setups the frame 399 * register and saves the registers, it also defines another macro 400 * to automatically restore the registers again. 401 * - func_return marks the end of the routine and simply calls the prepared 402 * macro to restore registers and jump back to the caller. 403 * - func_define generates another macro to automatically put arguments 404 * onto the stack call the subroutine and cleanup the stack again. 405 */ 406 407/* Within subroutines these macros can be used to access the arguments 408 * on the stack. With STACK some allocated memory on the stack can be 409 * accessed and ARG0 points to the return address (used by mmu_engage). 410 */ 411#define STACK %a6@(stackstart) 412#define ARG0 %a6@(4) 413#define ARG1 %a6@(8) 414#define ARG2 %a6@(12) 415#define ARG3 %a6@(16) 416#define ARG4 %a6@(20) 417 418.macro func_start name,saveregs,stack=0 419L(\name): 420 linkw %a6,#-\stack 421 moveml \saveregs,%sp@- 422.set stackstart,-\stack 423 424.macro func_return_\name 425 moveml %sp@+,\saveregs 426 unlk %a6 427 rts 428.endm 429.endm 430 431.macro func_return name 432 func_return_\name 433.endm 434 435.macro func_call name 436 jbsr L(\name) 437.endm 438 439.macro move_stack nr,arg1,arg2,arg3,arg4 440.if \nr 441 move_stack "(\nr-1)",\arg2,\arg3,\arg4 442 movel \arg1,%sp@- 443.endif 444.endm 445 446.macro func_define name,nr=0 447.macro \name arg1,arg2,arg3,arg4 448 move_stack \nr,\arg1,\arg2,\arg3,\arg4 449 func_call \name 450.if \nr 451 lea %sp@(\nr*4),%sp 452.endif 453.endm 454.endm 455 456func_define mmu_map,4 457func_define mmu_map_tt,4 458func_define mmu_fixup_page_mmu_cache,1 459func_define mmu_temp_map,2 460func_define mmu_engage 461func_define mmu_get_root_table_entry,1 462func_define mmu_get_ptr_table_entry,2 463func_define mmu_get_page_table_entry,2 464func_define mmu_print 465func_define get_new_page 466#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 467func_define set_leds 468#endif 469 470.macro mmu_map_eq arg1,arg2,arg3 471 mmu_map \arg1,\arg1,\arg2,\arg3 472.endm 473 474.macro get_bi_record record 475 pea \record 476 func_call get_bi_record 477 addql #4,%sp 478.endm 479 480func_define serial_putc,1 481func_define console_putc,1 482 483func_define console_init 484func_define console_put_stats 485func_define console_put_penguin 486func_define console_plot_pixel,3 487func_define console_scroll 488 489.macro putc ch 490#if defined(CONSOLE) || defined(SERIAL_DEBUG) 491 pea \ch 492#endif 493#ifdef CONSOLE 494 func_call console_putc 495#endif 496#ifdef SERIAL_DEBUG 497 func_call serial_putc 498#endif 499#if defined(CONSOLE) || defined(SERIAL_DEBUG) 500 addql #4,%sp 501#endif 502.endm 503 504.macro dputc ch 505#ifdef DEBUG 506 putc \ch 507#endif 508.endm 509 510func_define putn,1 511 512.macro dputn nr 513#ifdef DEBUG 514 putn \nr 515#endif 516.endm 517 518.macro puts string 519#if defined(CONSOLE) || defined(SERIAL_DEBUG) 520 __INITDATA 521.Lstr\@: 522 .string "\string" 523 __FINIT 524 pea %pc@(.Lstr\@) 525 func_call puts 526 addql #4,%sp 527#endif 528.endm 529 530.macro dputs string 531#ifdef DEBUG 532 puts "\string" 533#endif 534.endm 535 536#define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab 537#define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab 538#define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab 539#define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab 540#define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab 541#define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab 542#define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab 543#define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab 544#define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab 545#define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab 546#define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab 547#define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab 548#define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab 549 550#define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \ 551 jeq 42f; \ 552 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \ 553 jne lab ;\ 554 42:\ 555 556#define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab 557#define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab 558#define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab 559#define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab 560#define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab 561#define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab 562#define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab 563 564/* On the HP300 we use the on-board LEDs for debug output before 565 the console is running. Writing a 1 bit turns the corresponding LED 566 _off_ - on the 340 bit 7 is towards the back panel of the machine. */ 567.macro leds mask 568#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 569 hasnt_leds(.Lled\@) 570 pea \mask 571 func_call set_leds 572 addql #4,%sp 573.Lled\@: 574#endif 575.endm 576 577__HEAD 578ENTRY(_stext) 579/* 580 * Version numbers of the bootinfo interface 581 * The area from _stext to _start will later be used as kernel pointer table 582 */ 583 bras 1f /* Jump over bootinfo version numbers */ 584 585 .long BOOTINFOV_MAGIC 586 .long MACH_AMIGA, AMIGA_BOOTI_VERSION 587 .long MACH_ATARI, ATARI_BOOTI_VERSION 588 .long MACH_MVME147, MVME147_BOOTI_VERSION 589 .long MACH_MVME16x, MVME16x_BOOTI_VERSION 590 .long MACH_BVME6000, BVME6000_BOOTI_VERSION 591 .long MACH_MAC, MAC_BOOTI_VERSION 592 .long MACH_Q40, Q40_BOOTI_VERSION 593 .long MACH_HP300, HP300_BOOTI_VERSION 594 .long 0 5951: jra __start 596 597.equ kernel_pg_dir,_stext 598 599.equ .,_stext+PAGESIZE 600 601ENTRY(_start) 602 jra __start 603__INIT 604ENTRY(__start) 605/* 606 * Setup initial stack pointer 607 */ 608 lea %pc@(_stext),%sp 609 610/* 611 * Record the CPU and machine type. 612 */ 613 get_bi_record BI_MACHTYPE 614 lea %pc@(m68k_machtype),%a1 615 movel %a0@,%a1@ 616 617 get_bi_record BI_FPUTYPE 618 lea %pc@(m68k_fputype),%a1 619 movel %a0@,%a1@ 620 621 get_bi_record BI_MMUTYPE 622 lea %pc@(m68k_mmutype),%a1 623 movel %a0@,%a1@ 624 625 get_bi_record BI_CPUTYPE 626 lea %pc@(m68k_cputype),%a1 627 movel %a0@,%a1@ 628 629 leds 0x1 630 631#ifdef CONFIG_MAC 632/* 633 * For Macintosh, we need to determine the display parameters early (at least 634 * while debugging it). 635 */ 636 637 is_not_mac(L(test_notmac)) 638 639 get_bi_record BI_MAC_VADDR 640 lea %pc@(L(mac_videobase)),%a1 641 movel %a0@,%a1@ 642 643 get_bi_record BI_MAC_VDEPTH 644 lea %pc@(L(mac_videodepth)),%a1 645 movel %a0@,%a1@ 646 647 get_bi_record BI_MAC_VDIM 648 lea %pc@(L(mac_dimensions)),%a1 649 movel %a0@,%a1@ 650 651 get_bi_record BI_MAC_VROW 652 lea %pc@(L(mac_rowbytes)),%a1 653 movel %a0@,%a1@ 654 655#ifdef SERIAL_DEBUG 656 get_bi_record BI_MAC_SCCBASE 657 lea %pc@(L(mac_sccbase)),%a1 658 movel %a0@,%a1@ 659#endif 660 661#if 0 662 /* 663 * Clear the screen 664 */ 665 lea %pc@(L(mac_videobase)),%a0 666 movel %a0@,%a1 667 lea %pc@(L(mac_dimensions)),%a0 668 movel %a0@,%d1 669 swap %d1 /* #rows is high bytes */ 670 andl #0xFFFF,%d1 /* rows */ 671 subl #10,%d1 672 lea %pc@(L(mac_rowbytes)),%a0 673loopy2: 674 movel %a0@,%d0 675 subql #1,%d0 676loopx2: 677 moveb #0x55, %a1@+ 678 dbra %d0,loopx2 679 dbra %d1,loopy2 680#endif 681 682L(test_notmac): 683#endif /* CONFIG_MAC */ 684 685 686/* 687 * There are ultimately two pieces of information we want for all kinds of 688 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter 689 * and is converted here from a booter type definition to a separate bit 690 * number which allows for the standard is_0x0 macro tests. 691 */ 692 movel %pc@(m68k_cputype),%d0 693 /* 694 * Assume it's an 030 695 */ 696 clrl %d1 697 698 /* 699 * Test the BootInfo cputype for 060 700 */ 701 btst #CPUB_68060,%d0 702 jeq 1f 703 bset #CPUTYPE_060,%d1 704 bset #CPUTYPE_0460,%d1 705 jra 3f 7061: 707 /* 708 * Test the BootInfo cputype for 040 709 */ 710 btst #CPUB_68040,%d0 711 jeq 2f 712 bset #CPUTYPE_040,%d1 713 bset #CPUTYPE_0460,%d1 714 jra 3f 7152: 716 /* 717 * Test the BootInfo cputype for 020 718 */ 719 btst #CPUB_68020,%d0 720 jeq 3f 721 bset #CPUTYPE_020,%d1 722 jra 3f 7233: 724 /* 725 * Record the cpu type 726 */ 727 lea %pc@(L(cputype)),%a0 728 movel %d1,%a0@ 729 730 /* 731 * NOTE: 732 * 733 * Now the macros are valid: 734 * is_040_or_060 735 * is_not_040_or_060 736 * is_040 737 * is_060 738 * is_not_060 739 */ 740 741 /* 742 * Determine the cache mode for pages holding MMU tables 743 * and for supervisor mode, unused for '020 and '030 744 */ 745 clrl %d0 746 clrl %d1 747 748 is_not_040_or_060(L(save_cachetype)) 749 750 /* 751 * '040 or '060 752 * d1 := cacheable write-through 753 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables, 754 * but we have been using write-through since at least 2.0.29 so I 755 * guess it is OK. 756 */ 757#ifdef CONFIG_060_WRITETHROUGH 758 /* 759 * If this is a 68060 board using drivers with cache coherency 760 * problems, then supervisor memory accesses need to be write-through 761 * also; otherwise, we want copyback. 762 */ 763 764 is_not_060(1f) 765 movel #_PAGE_CACHE040W,%d0 766 jra L(save_cachetype) 767#endif /* CONFIG_060_WRITETHROUGH */ 7681: 769 movew #_PAGE_CACHE040,%d0 770 771 movel #_PAGE_CACHE040W,%d1 772 773L(save_cachetype): 774 /* Save cache mode for supervisor mode and page tables 775 */ 776 lea %pc@(m68k_supervisor_cachemode),%a0 777 movel %d0,%a0@ 778 lea %pc@(m68k_pgtable_cachemode),%a0 779 movel %d1,%a0@ 780 781/* 782 * raise interrupt level 783 */ 784 movew #0x2700,%sr 785 786/* 787 If running on an Atari, determine the I/O base of the 788 serial port and test if we are running on a Medusa or Hades. 789 This test is necessary here, because on the Hades the serial 790 port is only accessible in the high I/O memory area. 791 792 The test whether it is a Medusa is done by writing to the byte at 793 phys. 0x0. This should result in a bus error on all other machines. 794 795 ...should, but doesn't. The Afterburner040 for the Falcon has the 796 same behaviour (0x0..0x7 are no ROM shadow). So we have to do 797 another test to distinguish Medusa and AB040. This is a 798 read attempt for 0x00ff82fe phys. that should bus error on a Falcon 799 (+AB040), but is in the range where the Medusa always asserts DTACK. 800 801 The test for the Hades is done by reading address 0xb0000000. This 802 should give a bus error on the Medusa. 803 */ 804 805#ifdef CONFIG_ATARI 806 is_not_atari(L(notypetest)) 807 808 /* get special machine type (Medusa/Hades/AB40) */ 809 moveq #0,%d3 /* default if tag doesn't exist */ 810 get_bi_record BI_ATARI_MCH_TYPE 811 tstl %d0 812 jbmi 1f 813 movel %a0@,%d3 814 lea %pc@(atari_mch_type),%a0 815 movel %d3,%a0@ 8161: 817 /* On the Hades, the iobase must be set up before opening the 818 * serial port. There are no I/O regs at 0x00ffxxxx at all. */ 819 moveq #0,%d0 820 cmpl #ATARI_MACH_HADES,%d3 821 jbne 1f 822 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */ 8231: lea %pc@(L(iobase)),%a0 824 movel %d0,%a0@ 825 826L(notypetest): 827#endif 828 829#ifdef CONFIG_VME 830 is_mvme147(L(getvmetype)) 831 is_bvme6000(L(getvmetype)) 832 is_not_mvme16x(L(gvtdone)) 833 834 /* See if the loader has specified the BI_VME_TYPE tag. Recent 835 * versions of VMELILO and TFTPLILO do this. We have to do this 836 * early so we know how to handle console output. If the tag 837 * doesn't exist then we use the Bug for output on MVME16x. 838 */ 839L(getvmetype): 840 get_bi_record BI_VME_TYPE 841 tstl %d0 842 jbmi 1f 843 movel %a0@,%d3 844 lea %pc@(vme_brdtype),%a0 845 movel %d3,%a0@ 8461: 847#ifdef CONFIG_MVME16x 848 is_not_mvme16x(L(gvtdone)) 849 850 /* Need to get the BRD_ID info to differentiate between 162, 167, 851 * etc. This is available as a BI_VME_BRDINFO tag with later 852 * versions of VMELILO and TFTPLILO, otherwise we call the Bug. 853 */ 854 get_bi_record BI_VME_BRDINFO 855 tstl %d0 856 jpl 1f 857 858 /* Get pointer to board ID data from Bug */ 859 movel %d2,%sp@- 860 trap #15 861 .word 0x70 /* trap 0x70 - .BRD_ID */ 862 movel %sp@+,%a0 8631: 864 lea %pc@(mvme_bdid),%a1 865 /* Structure is 32 bytes long */ 866 movel %a0@+,%a1@+ 867 movel %a0@+,%a1@+ 868 movel %a0@+,%a1@+ 869 movel %a0@+,%a1@+ 870 movel %a0@+,%a1@+ 871 movel %a0@+,%a1@+ 872 movel %a0@+,%a1@+ 873 movel %a0@+,%a1@+ 874#endif 875 876L(gvtdone): 877 878#endif 879 880#ifdef CONFIG_HP300 881 is_not_hp300(L(nothp)) 882 883 /* Get the address of the UART for serial debugging */ 884 get_bi_record BI_HP300_UART_ADDR 885 tstl %d0 886 jbmi 1f 887 movel %a0@,%d3 888 lea %pc@(L(uartbase)),%a0 889 movel %d3,%a0@ 890 get_bi_record BI_HP300_UART_SCODE 891 tstl %d0 892 jbmi 1f 893 movel %a0@,%d3 894 lea %pc@(L(uart_scode)),%a0 895 movel %d3,%a0@ 8961: 897L(nothp): 898#endif 899 900/* 901 * Initialize serial port 902 */ 903 jbsr L(serial_init) 904 905/* 906 * Initialize console 907 */ 908#ifdef CONFIG_MAC 909 is_not_mac(L(nocon)) 910#ifdef CONSOLE 911 console_init 912#ifdef CONSOLE_PENGUIN 913 console_put_penguin 914#endif /* CONSOLE_PENGUIN */ 915 console_put_stats 916#endif /* CONSOLE */ 917L(nocon): 918#endif /* CONFIG_MAC */ 919 920 921 putc '\n' 922 putc 'A' 923 leds 0x2 924 dputn %pc@(L(cputype)) 925 dputn %pc@(m68k_supervisor_cachemode) 926 dputn %pc@(m68k_pgtable_cachemode) 927 dputc '\n' 928 929/* 930 * Save physical start address of kernel 931 */ 932 lea %pc@(L(phys_kernel_start)),%a0 933 lea %pc@(_stext),%a1 934 subl #_stext,%a1 935 addl #PAGE_OFFSET,%a1 936 movel %a1,%a0@ 937 938 putc 'B' 939 940 leds 0x4 941 942/* 943 * mmu_init 944 * 945 * This block of code does what's necessary to map in the various kinds 946 * of machines for execution of Linux. 947 * First map the first 4 MB of kernel code & data 948 */ 949 950 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),#4*1024*1024,\ 951 %pc@(m68k_supervisor_cachemode) 952 953 putc 'C' 954 955#ifdef CONFIG_AMIGA 956 957L(mmu_init_amiga): 958 959 is_not_amiga(L(mmu_init_not_amiga)) 960/* 961 * mmu_init_amiga 962 */ 963 964 putc 'D' 965 966 is_not_040_or_060(1f) 967 968 /* 969 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000 970 */ 971 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S 972 /* 973 * Map the Zorro III I/O space with transparent translation 974 * for frame buffer memory etc. 975 */ 976 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S 977 978 jbra L(mmu_init_done) 979 9801: 981 /* 982 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000 983 */ 984 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 985 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030 986 987 jbra L(mmu_init_done) 988 989L(mmu_init_not_amiga): 990#endif 991 992#ifdef CONFIG_ATARI 993 994L(mmu_init_atari): 995 996 is_not_atari(L(mmu_init_not_atari)) 997 998 putc 'E' 999 1000/* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping 1001 the last 16 MB of virtual address space to the first 16 MB (i.e. 1002 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is 1003 needed. I/O ranges are marked non-cachable. 1004 1005 For the Medusa it is better to map the I/O region transparently 1006 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are 1007 accessible only in the high area. 1008 1009 On the Hades all I/O registers are only accessible in the high 1010 area. 1011*/ 1012 1013 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */ 1014 moveq #0,%d0 1015 movel %pc@(atari_mch_type),%d3 1016 cmpl #ATARI_MACH_MEDUSA,%d3 1017 jbeq 2f 1018 cmpl #ATARI_MACH_HADES,%d3 1019 jbne 1f 10202: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */ 10211: movel %d0,%d3 1022 1023 is_040_or_060(L(spata68040)) 1024 1025 /* Map everything non-cacheable, though not all parts really 1026 * need to disable caches (crucial only for 0xff8000..0xffffff 1027 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder 1028 * isn't really used, except for sometimes peeking into the 1029 * ROMs (mirror at phys. 0x0), so caching isn't necessary for 1030 * this. */ 1031 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030 1032 1033 jbra L(mmu_init_done) 1034 1035L(spata68040): 1036 1037 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S 1038 1039 jbra L(mmu_init_done) 1040 1041L(mmu_init_not_atari): 1042#endif 1043 1044#ifdef CONFIG_Q40 1045 is_not_q40(L(notq40)) 1046 /* 1047 * add transparent mapping for 0xff00 0000 - 0xffff ffff 1048 * non-cached serialized etc.. 1049 * this includes master chip, DAC, RTC and ISA ports 1050 * 0xfe000000-0xfeffffff is for screen and ROM 1051 */ 1052 1053 putc 'Q' 1054 1055 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W 1056 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S 1057 1058 jbra L(mmu_init_done) 1059 1060L(notq40): 1061#endif 1062 1063#ifdef CONFIG_HP300 1064 is_not_hp300(L(nothp300)) 1065 1066 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx) 1067 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx). 1068 * The ROM mapping is needed because the LEDs are mapped there too. 1069 */ 1070 1071 is_040(1f) 1072 1073 /* 1074 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000 1075 */ 1076 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030 1077 1078 jbra L(mmu_init_done) 1079 10801: 1081 /* 1082 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000 1083 */ 1084 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S 1085 1086 jbra L(mmu_init_done) 1087 1088L(nothp300): 1089#endif /* CONFIG_HP300 */ 1090 1091#ifdef CONFIG_MVME147 1092 1093 is_not_mvme147(L(not147)) 1094 1095 /* 1096 * On MVME147 we have already created kernel page tables for 1097 * 4MB of RAM at address 0, so now need to do a transparent 1098 * mapping of the top of memory space. Make it 0.5GByte for now, 1099 * so we can access on-board i/o areas. 1100 */ 1101 1102 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030 1103 1104 jbra L(mmu_init_done) 1105 1106L(not147): 1107#endif /* CONFIG_MVME147 */ 1108 1109#ifdef CONFIG_MVME16x 1110 1111 is_not_mvme16x(L(not16x)) 1112 1113 /* 1114 * On MVME16x we have already created kernel page tables for 1115 * 4MB of RAM at address 0, so now need to do a transparent 1116 * mapping of the top of memory space. Make it 0.5GByte for now. 1117 * Supervisor only access, so transparent mapping doesn't 1118 * clash with User code virtual address space. 1119 * this covers IO devices, PROM and SRAM. The PROM and SRAM 1120 * mapping is needed to allow 167Bug to run. 1121 * IO is in the range 0xfff00000 to 0xfffeffff. 1122 * PROM is 0xff800000->0xffbfffff and SRAM is 1123 * 0xffe00000->0xffe1ffff. 1124 */ 1125 1126 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S 1127 1128 jbra L(mmu_init_done) 1129 1130L(not16x): 1131#endif /* CONFIG_MVME162 | CONFIG_MVME167 */ 1132 1133#ifdef CONFIG_BVME6000 1134 1135 is_not_bvme6000(L(not6000)) 1136 1137 /* 1138 * On BVME6000 we have already created kernel page tables for 1139 * 4MB of RAM at address 0, so now need to do a transparent 1140 * mapping of the top of memory space. Make it 0.5GByte for now, 1141 * so we can access on-board i/o areas. 1142 * Supervisor only access, so transparent mapping doesn't 1143 * clash with User code virtual address space. 1144 */ 1145 1146 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S 1147 1148 jbra L(mmu_init_done) 1149 1150L(not6000): 1151#endif /* CONFIG_BVME6000 */ 1152 1153/* 1154 * mmu_init_mac 1155 * 1156 * The Macintosh mappings are less clear. 1157 * 1158 * Even as of this writing, it is unclear how the 1159 * Macintosh mappings will be done. However, as 1160 * the first author of this code I'm proposing the 1161 * following model: 1162 * 1163 * Map the kernel (that's already done), 1164 * Map the I/O (on most machines that's the 1165 * 0x5000.0000 ... 0x5300.0000 range, 1166 * Map the video frame buffer using as few pages 1167 * as absolutely (this requirement mostly stems from 1168 * the fact that when the frame buffer is at 1169 * 0x0000.0000 then we know there is valid RAM just 1170 * above the screen that we don't want to waste!). 1171 * 1172 * By the way, if the frame buffer is at 0x0000.0000 1173 * then the Macintosh is known as an RBV based Mac. 1174 * 1175 * By the way 2, the code currently maps in a bunch of 1176 * regions. But I'd like to cut that out. (And move most 1177 * of the mappings up into the kernel proper ... or only 1178 * map what's necessary.) 1179 */ 1180 1181#ifdef CONFIG_MAC 1182 1183L(mmu_init_mac): 1184 1185 is_not_mac(L(mmu_init_not_mac)) 1186 1187 putc 'F' 1188 1189 is_not_040_or_060(1f) 1190 1191 moveq #_PAGE_NOCACHE_S,%d3 1192 jbra 2f 11931: 1194 moveq #_PAGE_NOCACHE030,%d3 11952: 1196 /* 1197 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical> 1198 * we simply map the 4MB that contains the videomem 1199 */ 1200 1201 movel #VIDEOMEMMASK,%d0 1202 andl %pc@(L(mac_videobase)),%d0 1203 1204 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3 1205 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */ 1206 mmu_map_eq #0x40000000,#0x02000000,%d3 1207 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */ 1208 mmu_map_eq #0x50000000,#0x03000000,%d3 1209 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */ 1210 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3 1211 1212 jbra L(mmu_init_done) 1213 1214L(mmu_init_not_mac): 1215#endif 1216 1217#ifdef CONFIG_SUN3X 1218 is_not_sun3x(L(notsun3x)) 1219 1220 /* oh, the pain.. We're gonna want the prom code after 1221 * starting the MMU, so we copy the mappings, translating 1222 * from 8k -> 4k pages as we go. 1223 */ 1224 1225 /* copy maps from 0xfee00000 to 0xff000000 */ 1226 movel #0xfee00000, %d0 1227 moveq #ROOT_INDEX_SHIFT, %d1 1228 lsrl %d1,%d0 1229 mmu_get_root_table_entry %d0 1230 1231 movel #0xfee00000, %d0 1232 moveq #PTR_INDEX_SHIFT, %d1 1233 lsrl %d1,%d0 1234 andl #PTR_TABLE_SIZE-1, %d0 1235 mmu_get_ptr_table_entry %a0,%d0 1236 1237 movel #0xfee00000, %d0 1238 moveq #PAGE_INDEX_SHIFT, %d1 1239 lsrl %d1,%d0 1240 andl #PAGE_TABLE_SIZE-1, %d0 1241 mmu_get_page_table_entry %a0,%d0 1242 1243 /* this is where the prom page table lives */ 1244 movel 0xfefe00d4, %a1 1245 movel %a1@, %a1 1246 1247 movel #((0x200000 >> 13)-1), %d1 1248 12491: 1250 movel %a1@+, %d3 1251 movel %d3,%a0@+ 1252 addl #0x1000,%d3 1253 movel %d3,%a0@+ 1254 1255 dbra %d1,1b 1256 1257 /* setup tt1 for I/O */ 1258 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S 1259 jbra L(mmu_init_done) 1260 1261L(notsun3x): 1262#endif 1263 1264#ifdef CONFIG_APOLLO 1265 is_not_apollo(L(notapollo)) 1266 1267 putc 'P' 1268 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030 1269 1270L(notapollo): 1271 jbra L(mmu_init_done) 1272#endif 1273 1274L(mmu_init_done): 1275 1276 putc 'G' 1277 leds 0x8 1278 1279/* 1280 * mmu_fixup 1281 * 1282 * On the 040 class machines, all pages that are used for the 1283 * mmu have to be fixed up. According to Motorola, pages holding mmu 1284 * tables should be non-cacheable on a '040 and write-through on a 1285 * '060. But analysis of the reasons for this, and practical 1286 * experience, showed that write-through also works on a '040. 1287 * 1288 * Allocated memory so far goes from kernel_end to memory_start that 1289 * is used for all kind of tables, for that the cache attributes 1290 * are now fixed. 1291 */ 1292L(mmu_fixup): 1293 1294 is_not_040_or_060(L(mmu_fixup_done)) 1295 1296#ifdef MMU_NOCACHE_KERNEL 1297 jbra L(mmu_fixup_done) 1298#endif 1299 1300 /* first fix the page at the start of the kernel, that 1301 * contains also kernel_pg_dir. 1302 */ 1303 movel %pc@(L(phys_kernel_start)),%d0 1304 subl #PAGE_OFFSET,%d0 1305 lea %pc@(_stext),%a0 1306 subl %d0,%a0 1307 mmu_fixup_page_mmu_cache %a0 1308 1309 movel %pc@(L(kernel_end)),%a0 1310 subl %d0,%a0 1311 movel %pc@(L(memory_start)),%a1 1312 subl %d0,%a1 1313 bra 2f 13141: 1315 mmu_fixup_page_mmu_cache %a0 1316 addw #PAGESIZE,%a0 13172: 1318 cmpl %a0,%a1 1319 jgt 1b 1320 1321L(mmu_fixup_done): 1322 1323#ifdef MMU_PRINT 1324 mmu_print 1325#endif 1326 1327/* 1328 * mmu_engage 1329 * 1330 * This chunk of code performs the gruesome task of engaging the MMU. 1331 * The reason its gruesome is because when the MMU becomes engaged it 1332 * maps logical addresses to physical addresses. The Program Counter 1333 * register is then passed through the MMU before the next instruction 1334 * is fetched (the instruction following the engage MMU instruction). 1335 * This may mean one of two things: 1336 * 1. The Program Counter falls within the logical address space of 1337 * the kernel of which there are two sub-possibilities: 1338 * A. The PC maps to the correct instruction (logical PC == physical 1339 * code location), or 1340 * B. The PC does not map through and the processor will read some 1341 * data (or instruction) which is not the logically next instr. 1342 * As you can imagine, A is good and B is bad. 1343 * Alternatively, 1344 * 2. The Program Counter does not map through the MMU. The processor 1345 * will take a Bus Error. 1346 * Clearly, 2 is bad. 1347 * It doesn't take a wiz kid to figure you want 1.A. 1348 * This code creates that possibility. 1349 * There are two possible 1.A. states (we now ignore the other above states): 1350 * A. The kernel is located at physical memory addressed the same as 1351 * the logical memory for the kernel, i.e., 0x01000. 1352 * B. The kernel is located some where else. e.g., 0x0400.0000 1353 * 1354 * Under some conditions the Macintosh can look like A or B. 1355 * [A friend and I once noted that Apple hardware engineers should be 1356 * wacked twice each day: once when they show up at work (as in, Whack!, 1357 * "This is for the screwy hardware we know you're going to design today."), 1358 * and also at the end of the day (as in, Whack! "I don't know what 1359 * you designed today, but I'm sure it wasn't good."). -- rst] 1360 * 1361 * This code works on the following premise: 1362 * If the kernel start (%d5) is within the first 16 Meg of RAM, 1363 * then create a mapping for the kernel at logical 0x8000.0000 to 1364 * the physical location of the pc. And, create a transparent 1365 * translation register for the first 16 Meg. Then, after the MMU 1366 * is engaged, the PC can be moved up into the 0x8000.0000 range 1367 * and then the transparent translation can be turned off and then 1368 * the PC can jump to the correct logical location and it will be 1369 * home (finally). This is essentially the code that the Amiga used 1370 * to use. Now, it's generalized for all processors. Which means 1371 * that a fresh (but temporary) mapping has to be created. The mapping 1372 * is made in page 0 (an as of yet unused location -- except for the 1373 * stack!). This temporary mapping will only require 1 pointer table 1374 * and a single page table (it can map 256K). 1375 * 1376 * OK, alternatively, imagine that the Program Counter is not within 1377 * the first 16 Meg. Then, just use Transparent Translation registers 1378 * to do the right thing. 1379 * 1380 * Last, if _start is already at 0x01000, then there's nothing special 1381 * to do (in other words, in a degenerate case of the first case above, 1382 * do nothing). 1383 * 1384 * Let's do it. 1385 * 1386 * 1387 */ 1388 1389 putc 'H' 1390 1391 mmu_engage 1392 1393/* 1394 * After this point no new memory is allocated and 1395 * the start of available memory is stored in availmem. 1396 * (The bootmem allocator requires now the physicall address.) 1397 */ 1398 1399 movel L(memory_start),availmem 1400 1401#ifdef CONFIG_AMIGA 1402 is_not_amiga(1f) 1403 /* fixup the Amiga custom register location before printing */ 1404 clrl L(custom) 14051: 1406#endif 1407 1408#ifdef CONFIG_ATARI 1409 is_not_atari(1f) 1410 /* fixup the Atari iobase register location before printing */ 1411 movel #0xff000000,L(iobase) 14121: 1413#endif 1414 1415#ifdef CONFIG_MAC 1416 is_not_mac(1f) 1417 movel #~VIDEOMEMMASK,%d0 1418 andl L(mac_videobase),%d0 1419 addl #VIDEOMEMBASE,%d0 1420 movel %d0,L(mac_videobase) 1421#if defined(CONSOLE) 1422 movel %pc@(L(phys_kernel_start)),%d0 1423 subl #PAGE_OFFSET,%d0 1424 subl %d0,L(console_font) 1425 subl %d0,L(console_font_data) 1426#endif 1427#ifdef SERIAL_DEBUG 1428 orl #0x50000000,L(mac_sccbase) 1429#endif 14301: 1431#endif 1432 1433#ifdef CONFIG_HP300 1434 is_not_hp300(2f) 1435 /* 1436 * Fix up the iobase register to point to the new location of the LEDs. 1437 */ 1438 movel #0xf0000000,L(iobase) 1439 1440 /* 1441 * Energise the FPU and caches. 1442 */ 1443 is_040(1f) 1444 movel #0x60,0xf05f400c 1445 jbra 2f 1446 1447 /* 1448 * 040: slightly different, apparently. 1449 */ 14501: movew #0,0xf05f400e 1451 movew #0x64,0xf05f400e 14522: 1453#endif 1454 1455#ifdef CONFIG_SUN3X 1456 is_not_sun3x(1f) 1457 1458 /* enable copro */ 1459 oriw #0x4000,0x61000000 14601: 1461#endif 1462 1463#ifdef CONFIG_APOLLO 1464 is_not_apollo(1f) 1465 1466 /* 1467 * Fix up the iobase before printing 1468 */ 1469 movel #0x80000000,L(iobase) 14701: 1471#endif 1472 1473 putc 'I' 1474 leds 0x10 1475 1476/* 1477 * Enable caches 1478 */ 1479 1480 is_not_040_or_060(L(cache_not_680460)) 1481 1482L(cache680460): 1483 .chip 68040 1484 nop 1485 cpusha %bc 1486 nop 1487 1488 is_060(L(cache68060)) 1489 1490 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0 1491 /* MMU stuff works in copyback mode now, so enable the cache */ 1492 movec %d0,%cacr 1493 jra L(cache_done) 1494 1495L(cache68060): 1496 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0 1497 /* MMU stuff works in copyback mode now, so enable the cache */ 1498 movec %d0,%cacr 1499 /* enable superscalar dispatch in PCR */ 1500 moveq #1,%d0 1501 .chip 68060 1502 movec %d0,%pcr 1503 1504 jbra L(cache_done) 1505L(cache_not_680460): 1506L(cache68030): 1507 .chip 68030 1508 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0 1509 movec %d0,%cacr 1510 1511 jra L(cache_done) 1512 .chip 68k 1513L(cache_done): 1514 1515 putc 'J' 1516 1517/* 1518 * Setup initial stack pointer 1519 */ 1520 lea init_task,%curptr 1521 lea init_thread_union+THREAD_SIZE,%sp 1522 1523 putc 'K' 1524 1525 subl %a6,%a6 /* clear a6 for gdb */ 1526 1527/* 1528 * The new 64bit printf support requires an early exception initialization. 1529 */ 1530 jbsr base_trap_init 1531 1532/* jump to the kernel start */ 1533 1534 putc '\n' 1535 leds 0x55 1536 1537 jbsr start_kernel 1538 1539/* 1540 * Find a tag record in the bootinfo structure 1541 * The bootinfo structure is located right after the kernel 1542 * Returns: d0: size (-1 if not found) 1543 * a0: data pointer (end-of-records if not found) 1544 */ 1545func_start get_bi_record,%d1 1546 1547 movel ARG1,%d0 1548 lea %pc@(_end),%a0 15491: tstw %a0@(BIR_TAG) 1550 jeq 3f 1551 cmpw %a0@(BIR_TAG),%d0 1552 jeq 2f 1553 addw %a0@(BIR_SIZE),%a0 1554 jra 1b 15552: moveq #0,%d0 1556 movew %a0@(BIR_SIZE),%d0 1557 lea %a0@(BIR_DATA),%a0 1558 jra 4f 15593: moveq #-1,%d0 1560 lea %a0@(BIR_SIZE),%a0 15614: 1562func_return get_bi_record 1563 1564 1565/* 1566 * MMU Initialization Begins Here 1567 * 1568 * The structure of the MMU tables on the 68k machines 1569 * is thus: 1570 * Root Table 1571 * Logical addresses are translated through 1572 * a hierarchical translation mechanism where the high-order 1573 * seven bits of the logical address (LA) are used as an 1574 * index into the "root table." Each entry in the root 1575 * table has a bit which specifies if it's a valid pointer to a 1576 * pointer table. Each entry defines a 32KMeg range of memory. 1577 * If an entry is invalid then that logical range of 32M is 1578 * invalid and references to that range of memory (when the MMU 1579 * is enabled) will fault. If the entry is valid, then it does 1580 * one of two things. On 040/060 class machines, it points to 1581 * a pointer table which then describes more finely the memory 1582 * within that 32M range. On 020/030 class machines, a technique 1583 * called "early terminating descriptors" are used. This technique 1584 * allows an entire 32Meg to be described by a single entry in the 1585 * root table. Thus, this entry in the root table, contains the 1586 * physical address of the memory or I/O at the logical address 1587 * which the entry represents and it also contains the necessary 1588 * cache bits for this region. 1589 * 1590 * Pointer Tables 1591 * Per the Root Table, there will be one or more 1592 * pointer tables. Each pointer table defines a 32M range. 1593 * Not all of the 32M range need be defined. Again, the next 1594 * seven bits of the logical address are used an index into 1595 * the pointer table to point to page tables (if the pointer 1596 * is valid). There will undoubtedly be more than one 1597 * pointer table for the kernel because each pointer table 1598 * defines a range of only 32M. Valid pointer table entries 1599 * point to page tables, or are early terminating entries 1600 * themselves. 1601 * 1602 * Page Tables 1603 * Per the Pointer Tables, each page table entry points 1604 * to the physical page in memory that supports the logical 1605 * address that translates to the particular index. 1606 * 1607 * In short, the Logical Address gets translated as follows: 1608 * bits 31..26 - index into the Root Table 1609 * bits 25..18 - index into the Pointer Table 1610 * bits 17..12 - index into the Page Table 1611 * bits 11..0 - offset into a particular 4K page 1612 * 1613 * The algorithms which follows do one thing: they abstract 1614 * the MMU hardware. For example, there are three kinds of 1615 * cache settings that are relevant. Either, memory is 1616 * being mapped in which case it is either Kernel Code (or 1617 * the RamDisk) or it is MMU data. On the 030, the MMU data 1618 * option also describes the kernel. Or, I/O is being mapped 1619 * in which case it has its own kind of cache bits. There 1620 * are constants which abstract these notions from the code that 1621 * actually makes the call to map some range of memory. 1622 * 1623 * 1624 * 1625 */ 1626 1627#ifdef MMU_PRINT 1628/* 1629 * mmu_print 1630 * 1631 * This algorithm will print out the current MMU mappings. 1632 * 1633 * Input: 1634 * %a5 points to the root table. Everything else is calculated 1635 * from this. 1636 */ 1637 1638#define mmu_next_valid 0 1639#define mmu_start_logical 4 1640#define mmu_next_logical 8 1641#define mmu_start_physical 12 1642#define mmu_next_physical 16 1643 1644#define MMU_PRINT_INVALID -1 1645#define MMU_PRINT_VALID 1 1646#define MMU_PRINT_UNINITED 0 1647 1648#define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2: 1649 1650func_start mmu_print,%a0-%a6/%d0-%d7 1651 1652 movel %pc@(L(kernel_pgdir_ptr)),%a5 1653 lea %pc@(L(mmu_print_data)),%a0 1654 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid) 1655 1656 is_not_040_or_060(mmu_030_print) 1657 1658mmu_040_print: 1659 puts "\nMMU040\n" 1660 puts "rp:" 1661 putn %a5 1662 putc '\n' 1663#if 0 1664 /* 1665 * The following #if/#endif block is a tight algorithm for dumping the 040 1666 * MMU Map in gory detail. It really isn't that practical unless the 1667 * MMU Map algorithm appears to go awry and you need to debug it at the 1668 * entry per entry level. 1669 */ 1670 movel #ROOT_TABLE_SIZE,%d5 1671#if 0 1672 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings, 1673 subql #1,%d5 | they (might) work 1674#endif 16751: tstl %d5 1676 jbeq mmu_print_done 1677 subq #1,%d5 1678 movel %a5@+,%d7 1679 btst #1,%d7 1680 jbeq 1b 1681 16822: putn %d7 1683 andil #0xFFFFFE00,%d7 1684 movel %d7,%a4 1685 movel #PTR_TABLE_SIZE,%d4 1686 putc ' ' 16873: tstl %d4 1688 jbeq 11f 1689 subq #1,%d4 1690 movel %a4@+,%d7 1691 btst #1,%d7 1692 jbeq 3b 1693 16944: putn %d7 1695 andil #0xFFFFFF00,%d7 1696 movel %d7,%a3 1697 movel #PAGE_TABLE_SIZE,%d3 16985: movel #8,%d2 16996: tstl %d3 1700 jbeq 31f 1701 subq #1,%d3 1702 movel %a3@+,%d6 1703 btst #0,%d6 1704 jbeq 6b 17057: tstl %d2 1706 jbeq 8f 1707 subq #1,%d2 1708 putc ' ' 1709 jbra 91f 17108: putc '\n' 1711 movel #8+1+8+1+1,%d2 17129: putc ' ' 1713 dbra %d2,9b 1714 movel #7,%d2 171591: putn %d6 1716 jbra 6b 1717 171831: putc '\n' 1719 movel #8+1,%d2 172032: putc ' ' 1721 dbra %d2,32b 1722 jbra 3b 1723 172411: putc '\n' 1725 jbra 1b 1726#endif /* MMU 040 Dumping code that's gory and detailed */ 1727 1728 lea %pc@(kernel_pg_dir),%a5 1729 movel %a5,%a0 /* a0 has the address of the root table ptr */ 1730 movel #0x00000000,%a4 /* logical address */ 1731 moveql #0,%d0 173240: 1733 /* Increment the logical address and preserve in d5 */ 1734 movel %a4,%d5 1735 addil #PAGESIZE<<13,%d5 1736 movel %a0@+,%d6 1737 btst #1,%d6 1738 jbne 41f 1739 jbsr mmu_print_tuple_invalidate 1740 jbra 48f 174141: 1742 movel #0,%d1 1743 andil #0xfffffe00,%d6 1744 movel %d6,%a1 174542: 1746 movel %a4,%d5 1747 addil #PAGESIZE<<6,%d5 1748 movel %a1@+,%d6 1749 btst #1,%d6 1750 jbne 43f 1751 jbsr mmu_print_tuple_invalidate 1752 jbra 47f 175343: 1754 movel #0,%d2 1755 andil #0xffffff00,%d6 1756 movel %d6,%a2 175744: 1758 movel %a4,%d5 1759 addil #PAGESIZE,%d5 1760 movel %a2@+,%d6 1761 btst #0,%d6 1762 jbne 45f 1763 jbsr mmu_print_tuple_invalidate 1764 jbra 46f 176545: 1766 moveml %d0-%d1,%sp@- 1767 movel %a4,%d0 1768 movel %d6,%d1 1769 andil #0xfffff4e0,%d1 1770 lea %pc@(mmu_040_print_flags),%a6 1771 jbsr mmu_print_tuple 1772 moveml %sp@+,%d0-%d1 177346: 1774 movel %d5,%a4 1775 addq #1,%d2 1776 cmpib #64,%d2 1777 jbne 44b 177847: 1779 movel %d5,%a4 1780 addq #1,%d1 1781 cmpib #128,%d1 1782 jbne 42b 178348: 1784 movel %d5,%a4 /* move to the next logical address */ 1785 addq #1,%d0 1786 cmpib #128,%d0 1787 jbne 40b 1788 1789 .chip 68040 1790 movec %dtt1,%d0 1791 movel %d0,%d1 1792 andiw #0x8000,%d1 /* is it valid ? */ 1793 jbeq 1f /* No, bail out */ 1794 1795 movel %d0,%d1 1796 andil #0xff000000,%d1 /* Get the address */ 1797 putn %d1 1798 puts "==" 1799 putn %d1 1800 1801 movel %d0,%d6 1802 jbsr mmu_040_print_flags_tt 18031: 1804 movec %dtt0,%d0 1805 movel %d0,%d1 1806 andiw #0x8000,%d1 /* is it valid ? */ 1807 jbeq 1f /* No, bail out */ 1808 1809 movel %d0,%d1 1810 andil #0xff000000,%d1 /* Get the address */ 1811 putn %d1 1812 puts "==" 1813 putn %d1 1814 1815 movel %d0,%d6 1816 jbsr mmu_040_print_flags_tt 18171: 1818 .chip 68k 1819 1820 jbra mmu_print_done 1821 1822mmu_040_print_flags: 1823 btstl #10,%d6 1824 putZc(' ','G') /* global bit */ 1825 btstl #7,%d6 1826 putZc(' ','S') /* supervisor bit */ 1827mmu_040_print_flags_tt: 1828 btstl #6,%d6 1829 jbne 3f 1830 putc 'C' 1831 btstl #5,%d6 1832 putZc('w','c') /* write through or copy-back */ 1833 jbra 4f 18343: 1835 putc 'N' 1836 btstl #5,%d6 1837 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */ 18384: 1839 rts 1840 1841mmu_030_print_flags: 1842 btstl #6,%d6 1843 putZc('C','I') /* write through or copy-back */ 1844 rts 1845 1846mmu_030_print: 1847 puts "\nMMU030\n" 1848 puts "\nrp:" 1849 putn %a5 1850 putc '\n' 1851 movel %a5,%d0 1852 andil #0xfffffff0,%d0 1853 movel %d0,%a0 1854 movel #0x00000000,%a4 /* logical address */ 1855 movel #0,%d0 185630: 1857 movel %a4,%d5 1858 addil #PAGESIZE<<13,%d5 1859 movel %a0@+,%d6 1860 btst #1,%d6 /* is it a table ptr? */ 1861 jbne 31f /* yes */ 1862 btst #0,%d6 /* is it early terminating? */ 1863 jbeq 1f /* no */ 1864 jbsr mmu_030_print_helper 1865 jbra 38f 18661: 1867 jbsr mmu_print_tuple_invalidate 1868 jbra 38f 186931: 1870 movel #0,%d1 1871 andil #0xfffffff0,%d6 1872 movel %d6,%a1 187332: 1874 movel %a4,%d5 1875 addil #PAGESIZE<<6,%d5 1876 movel %a1@+,%d6 1877 btst #1,%d6 /* is it a table ptr? */ 1878 jbne 33f /* yes */ 1879 btst #0,%d6 /* is it a page descriptor? */ 1880 jbeq 1f /* no */ 1881 jbsr mmu_030_print_helper 1882 jbra 37f 18831: 1884 jbsr mmu_print_tuple_invalidate 1885 jbra 37f 188633: 1887 movel #0,%d2 1888 andil #0xfffffff0,%d6 1889 movel %d6,%a2 189034: 1891 movel %a4,%d5 1892 addil #PAGESIZE,%d5 1893 movel %a2@+,%d6 1894 btst #0,%d6 1895 jbne 35f 1896 jbsr mmu_print_tuple_invalidate 1897 jbra 36f 189835: 1899 jbsr mmu_030_print_helper 190036: 1901 movel %d5,%a4 1902 addq #1,%d2 1903 cmpib #64,%d2 1904 jbne 34b 190537: 1906 movel %d5,%a4 1907 addq #1,%d1 1908 cmpib #128,%d1 1909 jbne 32b 191038: 1911 movel %d5,%a4 /* move to the next logical address */ 1912 addq #1,%d0 1913 cmpib #128,%d0 1914 jbne 30b 1915 1916mmu_print_done: 1917 puts "\n" 1918 1919func_return mmu_print 1920 1921 1922mmu_030_print_helper: 1923 moveml %d0-%d1,%sp@- 1924 movel %a4,%d0 1925 movel %d6,%d1 1926 lea %pc@(mmu_030_print_flags),%a6 1927 jbsr mmu_print_tuple 1928 moveml %sp@+,%d0-%d1 1929 rts 1930 1931mmu_print_tuple_invalidate: 1932 moveml %a0/%d7,%sp@- 1933 1934 lea %pc@(L(mmu_print_data)),%a0 1935 tstl %a0@(mmu_next_valid) 1936 jbmi mmu_print_tuple_invalidate_exit 1937 1938 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid) 1939 1940 putn %a4 1941 1942 puts "##\n" 1943 1944mmu_print_tuple_invalidate_exit: 1945 moveml %sp@+,%a0/%d7 1946 rts 1947 1948 1949mmu_print_tuple: 1950 moveml %d0-%d7/%a0,%sp@- 1951 1952 lea %pc@(L(mmu_print_data)),%a0 1953 1954 tstl %a0@(mmu_next_valid) 1955 jble mmu_print_tuple_print 1956 1957 cmpl %a0@(mmu_next_physical),%d1 1958 jbeq mmu_print_tuple_increment 1959 1960mmu_print_tuple_print: 1961 putn %d0 1962 puts "->" 1963 putn %d1 1964 1965 movel %d1,%d6 1966 jbsr %a6@ 1967 1968mmu_print_tuple_record: 1969 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid) 1970 1971 movel %d1,%a0@(mmu_next_physical) 1972 1973mmu_print_tuple_increment: 1974 movel %d5,%d7 1975 subl %a4,%d7 1976 addl %d7,%a0@(mmu_next_physical) 1977 1978mmu_print_tuple_exit: 1979 moveml %sp@+,%d0-%d7/%a0 1980 rts 1981 1982mmu_print_machine_cpu_types: 1983 puts "machine: " 1984 1985 is_not_amiga(1f) 1986 puts "amiga" 1987 jbra 9f 19881: 1989 is_not_atari(2f) 1990 puts "atari" 1991 jbra 9f 19922: 1993 is_not_mac(3f) 1994 puts "macintosh" 1995 jbra 9f 19963: puts "unknown" 19979: putc '\n' 1998 1999 puts "cputype: 0" 2000 is_not_060(1f) 2001 putc '6' 2002 jbra 9f 20031: 2004 is_not_040_or_060(2f) 2005 putc '4' 2006 jbra 9f 20072: putc '3' 20089: putc '0' 2009 putc '\n' 2010 2011 rts 2012#endif /* MMU_PRINT */ 2013 2014/* 2015 * mmu_map_tt 2016 * 2017 * This is a specific function which works on all 680x0 machines. 2018 * On 030, 040 & 060 it will attempt to use Transparent Translation 2019 * registers (tt1). 2020 * On 020 it will call the standard mmu_map which will use early 2021 * terminating descriptors. 2022 */ 2023func_start mmu_map_tt,%d0/%d1/%a0,4 2024 2025 dputs "mmu_map_tt:" 2026 dputn ARG1 2027 dputn ARG2 2028 dputn ARG3 2029 dputn ARG4 2030 dputc '\n' 2031 2032 is_020(L(do_map)) 2033 2034 /* Extract the highest bit set 2035 */ 2036 bfffo ARG3{#0,#32},%d1 2037 cmpw #8,%d1 2038 jcc L(do_map) 2039 2040 /* And get the mask 2041 */ 2042 moveq #-1,%d0 2043 lsrl %d1,%d0 2044 lsrl #1,%d0 2045 2046 /* Mask the address 2047 */ 2048 movel %d0,%d1 2049 notl %d1 2050 andl ARG2,%d1 2051 2052 /* Generate the upper 16bit of the tt register 2053 */ 2054 lsrl #8,%d0 2055 orl %d0,%d1 2056 clrw %d1 2057 2058 is_040_or_060(L(mmu_map_tt_040)) 2059 2060 /* set 030 specific bits (read/write access for supervisor mode 2061 * (highest function code set, lower two bits masked)) 2062 */ 2063 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1 2064 movel ARG4,%d0 2065 btst #6,%d0 2066 jeq 1f 2067 orw #TTR_CI,%d1 2068 20691: lea STACK,%a0 2070 dputn %d1 2071 movel %d1,%a0@ 2072 .chip 68030 2073 tstl ARG1 2074 jne 1f 2075 pmove %a0@,%tt0 2076 jra 2f 20771: pmove %a0@,%tt1 20782: .chip 68k 2079 jra L(mmu_map_tt_done) 2080 2081 /* set 040 specific bits 2082 */ 2083L(mmu_map_tt_040): 2084 orw #TTR_ENABLE+TTR_KERNELMODE,%d1 2085 orl ARG4,%d1 2086 dputn %d1 2087 2088 .chip 68040 2089 tstl ARG1 2090 jne 1f 2091 movec %d1,%itt0 2092 movec %d1,%dtt0 2093 jra 2f 20941: movec %d1,%itt1 2095 movec %d1,%dtt1 20962: .chip 68k 2097 2098 jra L(mmu_map_tt_done) 2099 2100L(do_map): 2101 mmu_map_eq ARG2,ARG3,ARG4 2102 2103L(mmu_map_tt_done): 2104 2105func_return mmu_map_tt 2106 2107/* 2108 * mmu_map 2109 * 2110 * This routine will map a range of memory using a pointer 2111 * table and allocating the pages on the fly from the kernel. 2112 * The pointer table does not have to be already linked into 2113 * the root table, this routine will do that if necessary. 2114 * 2115 * NOTE 2116 * This routine will assert failure and use the serial_putc 2117 * routines in the case of a run-time error. For example, 2118 * if the address is already mapped. 2119 * 2120 * NOTE-2 2121 * This routine will use early terminating descriptors 2122 * where possible for the 68020+68851 and 68030 type 2123 * processors. 2124 */ 2125func_start mmu_map,%d0-%d4/%a0-%a4 2126 2127 dputs "\nmmu_map:" 2128 dputn ARG1 2129 dputn ARG2 2130 dputn ARG3 2131 dputn ARG4 2132 dputc '\n' 2133 2134 /* Get logical address and round it down to 256KB 2135 */ 2136 movel ARG1,%d0 2137 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0 2138 movel %d0,%a3 2139 2140 /* Get the end address 2141 */ 2142 movel ARG1,%a4 2143 addl ARG3,%a4 2144 subql #1,%a4 2145 2146 /* Get physical address and round it down to 256KB 2147 */ 2148 movel ARG2,%d0 2149 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0 2150 movel %d0,%a2 2151 2152 /* Add page attributes to the physical address 2153 */ 2154 movel ARG4,%d0 2155 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0 2156 addw %d0,%a2 2157 2158 dputn %a2 2159 dputn %a3 2160 dputn %a4 2161 2162 is_not_040_or_060(L(mmu_map_030)) 2163 2164 addw #_PAGE_GLOBAL040,%a2 2165/* 2166 * MMU 040 & 060 Support 2167 * 2168 * The MMU usage for the 040 and 060 is different enough from 2169 * the 030 and 68851 that there is separate code. This comment 2170 * block describes the data structures and algorithms built by 2171 * this code. 2172 * 2173 * The 040 does not support early terminating descriptors, as 2174 * the 030 does. Therefore, a third level of table is needed 2175 * for the 040, and that would be the page table. In Linux, 2176 * page tables are allocated directly from the memory above the 2177 * kernel. 2178 * 2179 */ 2180 2181L(mmu_map_040): 2182 /* Calculate the offset into the root table 2183 */ 2184 movel %a3,%d0 2185 moveq #ROOT_INDEX_SHIFT,%d1 2186 lsrl %d1,%d0 2187 mmu_get_root_table_entry %d0 2188 2189 /* Calculate the offset into the pointer table 2190 */ 2191 movel %a3,%d0 2192 moveq #PTR_INDEX_SHIFT,%d1 2193 lsrl %d1,%d0 2194 andl #PTR_TABLE_SIZE-1,%d0 2195 mmu_get_ptr_table_entry %a0,%d0 2196 2197 /* Calculate the offset into the page table 2198 */ 2199 movel %a3,%d0 2200 moveq #PAGE_INDEX_SHIFT,%d1 2201 lsrl %d1,%d0 2202 andl #PAGE_TABLE_SIZE-1,%d0 2203 mmu_get_page_table_entry %a0,%d0 2204 2205 /* The page table entry must not no be busy 2206 */ 2207 tstl %a0@ 2208 jne L(mmu_map_error) 2209 2210 /* Do the mapping and advance the pointers 2211 */ 2212 movel %a2,%a0@ 22132: 2214 addw #PAGESIZE,%a2 2215 addw #PAGESIZE,%a3 2216 2217 /* Ready with mapping? 2218 */ 2219 lea %a3@(-1),%a0 2220 cmpl %a0,%a4 2221 jhi L(mmu_map_040) 2222 jra L(mmu_map_done) 2223 2224L(mmu_map_030): 2225 /* Calculate the offset into the root table 2226 */ 2227 movel %a3,%d0 2228 moveq #ROOT_INDEX_SHIFT,%d1 2229 lsrl %d1,%d0 2230 mmu_get_root_table_entry %d0 2231 2232 /* Check if logical address 32MB aligned, 2233 * so we can try to map it once 2234 */ 2235 movel %a3,%d0 2236 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0 2237 jne 1f 2238 2239 /* Is there enough to map for 32MB at once 2240 */ 2241 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1 2242 cmpl %a1,%a4 2243 jcs 1f 2244 2245 addql #1,%a1 2246 2247 /* The root table entry must not no be busy 2248 */ 2249 tstl %a0@ 2250 jne L(mmu_map_error) 2251 2252 /* Do the mapping and advance the pointers 2253 */ 2254 dputs "early term1" 2255 dputn %a2 2256 dputn %a3 2257 dputn %a1 2258 dputc '\n' 2259 movel %a2,%a0@ 2260 2261 movel %a1,%a3 2262 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2 2263 jra L(mmu_mapnext_030) 22641: 2265 /* Calculate the offset into the pointer table 2266 */ 2267 movel %a3,%d0 2268 moveq #PTR_INDEX_SHIFT,%d1 2269 lsrl %d1,%d0 2270 andl #PTR_TABLE_SIZE-1,%d0 2271 mmu_get_ptr_table_entry %a0,%d0 2272 2273 /* The pointer table entry must not no be busy 2274 */ 2275 tstl %a0@ 2276 jne L(mmu_map_error) 2277 2278 /* Do the mapping and advance the pointers 2279 */ 2280 dputs "early term2" 2281 dputn %a2 2282 dputn %a3 2283 dputc '\n' 2284 movel %a2,%a0@ 2285 2286 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2 2287 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3 2288 2289L(mmu_mapnext_030): 2290 /* Ready with mapping? 2291 */ 2292 lea %a3@(-1),%a0 2293 cmpl %a0,%a4 2294 jhi L(mmu_map_030) 2295 jra L(mmu_map_done) 2296 2297L(mmu_map_error): 2298 2299 dputs "mmu_map error:" 2300 dputn %a2 2301 dputn %a3 2302 dputc '\n' 2303 2304L(mmu_map_done): 2305 2306func_return mmu_map 2307 2308/* 2309 * mmu_fixup 2310 * 2311 * On the 040 class machines, all pages that are used for the 2312 * mmu have to be fixed up. 2313 */ 2314 2315func_start mmu_fixup_page_mmu_cache,%d0/%a0 2316 2317 dputs "mmu_fixup_page_mmu_cache" 2318 dputn ARG1 2319 2320 /* Calculate the offset into the root table 2321 */ 2322 movel ARG1,%d0 2323 moveq #ROOT_INDEX_SHIFT,%d1 2324 lsrl %d1,%d0 2325 mmu_get_root_table_entry %d0 2326 2327 /* Calculate the offset into the pointer table 2328 */ 2329 movel ARG1,%d0 2330 moveq #PTR_INDEX_SHIFT,%d1 2331 lsrl %d1,%d0 2332 andl #PTR_TABLE_SIZE-1,%d0 2333 mmu_get_ptr_table_entry %a0,%d0 2334 2335 /* Calculate the offset into the page table 2336 */ 2337 movel ARG1,%d0 2338 moveq #PAGE_INDEX_SHIFT,%d1 2339 lsrl %d1,%d0 2340 andl #PAGE_TABLE_SIZE-1,%d0 2341 mmu_get_page_table_entry %a0,%d0 2342 2343 movel %a0@,%d0 2344 andil #_CACHEMASK040,%d0 2345 orl %pc@(m68k_pgtable_cachemode),%d0 2346 movel %d0,%a0@ 2347 2348 dputc '\n' 2349 2350func_return mmu_fixup_page_mmu_cache 2351 2352/* 2353 * mmu_temp_map 2354 * 2355 * create a temporary mapping to enable the mmu, 2356 * this we don't need any transparation translation tricks. 2357 */ 2358 2359func_start mmu_temp_map,%d0/%d1/%a0/%a1 2360 2361 dputs "mmu_temp_map" 2362 dputn ARG1 2363 dputn ARG2 2364 dputc '\n' 2365 2366 lea %pc@(L(temp_mmap_mem)),%a1 2367 2368 /* Calculate the offset in the root table 2369 */ 2370 movel ARG2,%d0 2371 moveq #ROOT_INDEX_SHIFT,%d1 2372 lsrl %d1,%d0 2373 mmu_get_root_table_entry %d0 2374 2375 /* Check if the table is temporary allocated, so we have to reuse it 2376 */ 2377 movel %a0@,%d0 2378 cmpl %pc@(L(memory_start)),%d0 2379 jcc 1f 2380 2381 /* Temporary allocate a ptr table and insert it into the root table 2382 */ 2383 movel %a1@,%d0 2384 addl #PTR_TABLE_SIZE*4,%a1@ 2385 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0 2386 movel %d0,%a0@ 2387 dputs " (new)" 23881: 2389 dputn %d0 2390 /* Mask the root table entry for the ptr table 2391 */ 2392 andw #-ROOT_TABLE_SIZE,%d0 2393 movel %d0,%a0 2394 2395 /* Calculate the offset into the pointer table 2396 */ 2397 movel ARG2,%d0 2398 moveq #PTR_INDEX_SHIFT,%d1 2399 lsrl %d1,%d0 2400 andl #PTR_TABLE_SIZE-1,%d0 2401 lea %a0@(%d0*4),%a0 2402 dputn %a0 2403 2404 /* Check if a temporary page table is already allocated 2405 */ 2406 movel %a0@,%d0 2407 jne 1f 2408 2409 /* Temporary allocate a page table and insert it into the ptr table 2410 */ 2411 movel %a1@,%d0 2412 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the 2413 alignment restriction for pointer tables on the '0[46]0. */ 2414 addl #512,%a1@ 2415 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0 2416 movel %d0,%a0@ 2417 dputs " (new)" 24181: 2419 dputn %d0 2420 /* Mask the ptr table entry for the page table 2421 */ 2422 andw #-PTR_TABLE_SIZE,%d0 2423 movel %d0,%a0 2424 2425 /* Calculate the offset into the page table 2426 */ 2427 movel ARG2,%d0 2428 moveq #PAGE_INDEX_SHIFT,%d1 2429 lsrl %d1,%d0 2430 andl #PAGE_TABLE_SIZE-1,%d0 2431 lea %a0@(%d0*4),%a0 2432 dputn %a0 2433 2434 /* Insert the address into the page table 2435 */ 2436 movel ARG1,%d0 2437 andw #-PAGESIZE,%d0 2438 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0 2439 movel %d0,%a0@ 2440 dputn %d0 2441 2442 dputc '\n' 2443 2444func_return mmu_temp_map 2445 2446func_start mmu_engage,%d0-%d2/%a0-%a3 2447 2448 moveq #ROOT_TABLE_SIZE-1,%d0 2449 /* Temporarily use a different root table. */ 2450 lea %pc@(L(kernel_pgdir_ptr)),%a0 2451 movel %a0@,%a2 2452 movel %pc@(L(memory_start)),%a1 2453 movel %a1,%a0@ 2454 movel %a2,%a0 24551: 2456 movel %a0@+,%a1@+ 2457 dbra %d0,1b 2458 2459 lea %pc@(L(temp_mmap_mem)),%a0 2460 movel %a1,%a0@ 2461 2462 movew #PAGESIZE-1,%d0 24631: 2464 clrl %a1@+ 2465 dbra %d0,1b 2466 2467 lea %pc@(1b),%a0 2468 movel #1b,%a1 2469 /* Skip temp mappings if phys == virt */ 2470 cmpl %a0,%a1 2471 jeq 1f 2472 2473 mmu_temp_map %a0,%a0 2474 mmu_temp_map %a0,%a1 2475 2476 addw #PAGESIZE,%a0 2477 addw #PAGESIZE,%a1 2478 mmu_temp_map %a0,%a0 2479 mmu_temp_map %a0,%a1 24801: 2481 movel %pc@(L(memory_start)),%a3 2482 movel %pc@(L(phys_kernel_start)),%d2 2483 2484 is_not_040_or_060(L(mmu_engage_030)) 2485 2486L(mmu_engage_040): 2487 .chip 68040 2488 nop 2489 cinva %bc 2490 nop 2491 pflusha 2492 nop 2493 movec %a3,%srp 2494 movel #TC_ENABLE+TC_PAGE4K,%d0 2495 movec %d0,%tc /* enable the MMU */ 2496 jmp 1f:l 24971: nop 2498 movec %a2,%srp 2499 nop 2500 cinva %bc 2501 nop 2502 pflusha 2503 .chip 68k 2504 jra L(mmu_engage_cleanup) 2505 2506L(mmu_engage_030_temp): 2507 .space 12 2508L(mmu_engage_030): 2509 .chip 68030 2510 lea %pc@(L(mmu_engage_030_temp)),%a0 2511 movel #0x80000002,%a0@ 2512 movel %a3,%a0@(4) 2513 movel #0x0808,%d0 2514 movec %d0,%cacr 2515 pmove %a0@,%srp 2516 pflusha 2517 /* 2518 * enable,super root enable,4096 byte pages,7 bit root index, 2519 * 7 bit pointer index, 6 bit page table index. 2520 */ 2521 movel #0x82c07760,%a0@(8) 2522 pmove %a0@(8),%tc /* enable the MMU */ 2523 jmp 1f:l 25241: movel %a2,%a0@(4) 2525 movel #0x0808,%d0 2526 movec %d0,%cacr 2527 pmove %a0@,%srp 2528 pflusha 2529 .chip 68k 2530 2531L(mmu_engage_cleanup): 2532 subl #PAGE_OFFSET,%d2 2533 subl %d2,%a2 2534 movel %a2,L(kernel_pgdir_ptr) 2535 subl %d2,%fp 2536 subl %d2,%sp 2537 subl %d2,ARG0 2538 2539func_return mmu_engage 2540 2541func_start mmu_get_root_table_entry,%d0/%a1 2542 2543#if 0 2544 dputs "mmu_get_root_table_entry:" 2545 dputn ARG1 2546 dputs " =" 2547#endif 2548 2549 movel %pc@(L(kernel_pgdir_ptr)),%a0 2550 tstl %a0 2551 jne 2f 2552 2553 dputs "\nmmu_init:" 2554 2555 /* Find the start of free memory, get_bi_record does this for us, 2556 * as the bootinfo structure is located directly behind the kernel 2557 * and and we simply search for the last entry. 2558 */ 2559 get_bi_record BI_LAST 2560 addw #PAGESIZE-1,%a0 2561 movel %a0,%d0 2562 andw #-PAGESIZE,%d0 2563 2564 dputn %d0 2565 2566 lea %pc@(L(memory_start)),%a0 2567 movel %d0,%a0@ 2568 lea %pc@(L(kernel_end)),%a0 2569 movel %d0,%a0@ 2570 2571 /* we have to return the first page at _stext since the init code 2572 * in mm/init.c simply expects kernel_pg_dir there, the rest of 2573 * page is used for further ptr tables in get_ptr_table. 2574 */ 2575 lea %pc@(_stext),%a0 2576 lea %pc@(L(mmu_cached_pointer_tables)),%a1 2577 movel %a0,%a1@ 2578 addl #ROOT_TABLE_SIZE*4,%a1@ 2579 2580 lea %pc@(L(mmu_num_pointer_tables)),%a1 2581 addql #1,%a1@ 2582 2583 /* clear the page 2584 */ 2585 movel %a0,%a1 2586 movew #PAGESIZE/4-1,%d0 25871: 2588 clrl %a1@+ 2589 dbra %d0,1b 2590 2591 lea %pc@(L(kernel_pgdir_ptr)),%a1 2592 movel %a0,%a1@ 2593 2594 dputn %a0 2595 dputc '\n' 25962: 2597 movel ARG1,%d0 2598 lea %a0@(%d0*4),%a0 2599 2600#if 0 2601 dputn %a0 2602 dputc '\n' 2603#endif 2604 2605func_return mmu_get_root_table_entry 2606 2607 2608 2609func_start mmu_get_ptr_table_entry,%d0/%a1 2610 2611#if 0 2612 dputs "mmu_get_ptr_table_entry:" 2613 dputn ARG1 2614 dputn ARG2 2615 dputs " =" 2616#endif 2617 2618 movel ARG1,%a0 2619 movel %a0@,%d0 2620 jne 2f 2621 2622 /* Keep track of the number of pointer tables we use 2623 */ 2624 dputs "\nmmu_get_new_ptr_table:" 2625 lea %pc@(L(mmu_num_pointer_tables)),%a0 2626 movel %a0@,%d0 2627 addql #1,%a0@ 2628 2629 /* See if there is a free pointer table in our cache of pointer tables 2630 */ 2631 lea %pc@(L(mmu_cached_pointer_tables)),%a1 2632 andw #7,%d0 2633 jne 1f 2634 2635 /* Get a new pointer table page from above the kernel memory 2636 */ 2637 get_new_page 2638 movel %a0,%a1@ 26391: 2640 /* There is an unused pointer table in our cache... use it 2641 */ 2642 movel %a1@,%d0 2643 addl #PTR_TABLE_SIZE*4,%a1@ 2644 2645 dputn %d0 2646 dputc '\n' 2647 2648 /* Insert the new pointer table into the root table 2649 */ 2650 movel ARG1,%a0 2651 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0 2652 movel %d0,%a0@ 26532: 2654 /* Extract the pointer table entry 2655 */ 2656 andw #-PTR_TABLE_SIZE,%d0 2657 movel %d0,%a0 2658 movel ARG2,%d0 2659 lea %a0@(%d0*4),%a0 2660 2661#if 0 2662 dputn %a0 2663 dputc '\n' 2664#endif 2665 2666func_return mmu_get_ptr_table_entry 2667 2668 2669func_start mmu_get_page_table_entry,%d0/%a1 2670 2671#if 0 2672 dputs "mmu_get_page_table_entry:" 2673 dputn ARG1 2674 dputn ARG2 2675 dputs " =" 2676#endif 2677 2678 movel ARG1,%a0 2679 movel %a0@,%d0 2680 jne 2f 2681 2682 /* If the page table entry doesn't exist, we allocate a complete new 2683 * page and use it as one continues big page table which can cover 2684 * 4MB of memory, nearly almost all mappings have that alignment. 2685 */ 2686 get_new_page 2687 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0 2688 2689 /* align pointer table entry for a page of page tables 2690 */ 2691 movel ARG1,%d0 2692 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0 2693 movel %d0,%a1 2694 2695 /* Insert the page tables into the pointer entries 2696 */ 2697 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0 26981: 2699 movel %a0,%a1@+ 2700 lea %a0@(PAGE_TABLE_SIZE*4),%a0 2701 dbra %d0,1b 2702 2703 /* Now we can get the initialized pointer table entry 2704 */ 2705 movel ARG1,%a0 2706 movel %a0@,%d0 27072: 2708 /* Extract the page table entry 2709 */ 2710 andw #-PAGE_TABLE_SIZE,%d0 2711 movel %d0,%a0 2712 movel ARG2,%d0 2713 lea %a0@(%d0*4),%a0 2714 2715#if 0 2716 dputn %a0 2717 dputc '\n' 2718#endif 2719 2720func_return mmu_get_page_table_entry 2721 2722/* 2723 * get_new_page 2724 * 2725 * Return a new page from the memory start and clear it. 2726 */ 2727func_start get_new_page,%d0/%a1 2728 2729 dputs "\nget_new_page:" 2730 2731 /* allocate the page and adjust memory_start 2732 */ 2733 lea %pc@(L(memory_start)),%a0 2734 movel %a0@,%a1 2735 addl #PAGESIZE,%a0@ 2736 2737 /* clear the new page 2738 */ 2739 movel %a1,%a0 2740 movew #PAGESIZE/4-1,%d0 27411: 2742 clrl %a1@+ 2743 dbra %d0,1b 2744 2745 dputn %a0 2746 dputc '\n' 2747 2748func_return get_new_page 2749 2750 2751 2752/* 2753 * Debug output support 2754 * Atarians have a choice between the parallel port, the serial port 2755 * from the MFP or a serial port of the SCC 2756 */ 2757 2758#ifdef CONFIG_MAC 2759 2760L(scc_initable_mac): 2761 .byte 4,0x44 /* x16, 1 stopbit, no parity */ 2762 .byte 3,0xc0 /* receiver: 8 bpc */ 2763 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */ 2764 .byte 10,0 /* NRZ */ 2765 .byte 11,0x50 /* use baud rate generator */ 2766 .byte 12,1,13,0 /* 38400 baud */ 2767 .byte 14,1 /* Baud rate generator enable */ 2768 .byte 3,0xc1 /* enable receiver */ 2769 .byte 5,0xea /* enable transmitter */ 2770 .byte -1 2771 .even 2772#endif 2773 2774#ifdef CONFIG_ATARI 2775/* #define USE_PRINTER */ 2776/* #define USE_SCC_B */ 2777/* #define USE_SCC_A */ 2778#define USE_MFP 2779 2780#if defined(USE_SCC_A) || defined(USE_SCC_B) 2781#define USE_SCC 2782/* Initialisation table for SCC */ 2783L(scc_initable): 2784 .byte 9,12 /* Reset */ 2785 .byte 4,0x44 /* x16, 1 stopbit, no parity */ 2786 .byte 3,0xc0 /* receiver: 8 bpc */ 2787 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */ 2788 .byte 9,0 /* no interrupts */ 2789 .byte 10,0 /* NRZ */ 2790 .byte 11,0x50 /* use baud rate generator */ 2791 .byte 12,24,13,0 /* 9600 baud */ 2792 .byte 14,2,14,3 /* use master clock for BRG, enable */ 2793 .byte 3,0xc1 /* enable receiver */ 2794 .byte 5,0xea /* enable transmitter */ 2795 .byte -1 2796 .even 2797#endif 2798 2799#ifdef USE_PRINTER 2800 2801LPSG_SELECT = 0xff8800 2802LPSG_READ = 0xff8800 2803LPSG_WRITE = 0xff8802 2804LPSG_IO_A = 14 2805LPSG_IO_B = 15 2806LPSG_CONTROL = 7 2807LSTMFP_GPIP = 0xfffa01 2808LSTMFP_DDR = 0xfffa05 2809LSTMFP_IERB = 0xfffa09 2810 2811#elif defined(USE_SCC_B) 2812 2813LSCC_CTRL = 0xff8c85 2814LSCC_DATA = 0xff8c87 2815 2816#elif defined(USE_SCC_A) 2817 2818LSCC_CTRL = 0xff8c81 2819LSCC_DATA = 0xff8c83 2820 2821#elif defined(USE_MFP) 2822 2823LMFP_UCR = 0xfffa29 2824LMFP_TDCDR = 0xfffa1d 2825LMFP_TDDR = 0xfffa25 2826LMFP_TSR = 0xfffa2d 2827LMFP_UDR = 0xfffa2f 2828 2829#endif 2830#endif /* CONFIG_ATARI */ 2831 2832/* 2833 * Serial port output support. 2834 */ 2835 2836/* 2837 * Initialize serial port hardware for 9600/8/1 2838 */ 2839func_start serial_init,%d0/%d1/%a0/%a1 2840 /* 2841 * Some of the register usage that follows 2842 * CONFIG_AMIGA 2843 * a0 = pointer to boot info record 2844 * d0 = boot info offset 2845 * CONFIG_ATARI 2846 * a0 = address of SCC 2847 * a1 = Liobase address/address of scc_initable 2848 * d0 = init data for serial port 2849 * CONFIG_MAC 2850 * a0 = address of SCC 2851 * a1 = address of scc_initable_mac 2852 * d0 = init data for serial port 2853 */ 2854 2855#ifdef CONFIG_AMIGA 2856#define SERIAL_DTR 7 2857#define SERIAL_CNTRL CIABBASE+C_PRA 2858 2859 is_not_amiga(1f) 2860 lea %pc@(L(custom)),%a0 2861 movel #-ZTWOBASE,%a0@ 2862 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE 2863 get_bi_record BI_AMIGA_SERPER 2864 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE 2865| movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE 28661: 2867#endif 2868#ifdef CONFIG_ATARI 2869 is_not_atari(4f) 2870 movel %pc@(L(iobase)),%a1 2871#if defined(USE_PRINTER) 2872 bclr #0,%a1@(LSTMFP_IERB) 2873 bclr #0,%a1@(LSTMFP_DDR) 2874 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT) 2875 moveb #0xff,%a1@(LPSG_WRITE) 2876 moveb #LPSG_IO_B,%a1@(LPSG_SELECT) 2877 clrb %a1@(LPSG_WRITE) 2878 moveb #LPSG_IO_A,%a1@(LPSG_SELECT) 2879 moveb %a1@(LPSG_READ),%d0 2880 bset #5,%d0 2881 moveb %d0,%a1@(LPSG_WRITE) 2882#elif defined(USE_SCC) 2883 lea %a1@(LSCC_CTRL),%a0 2884 lea %pc@(L(scc_initable)),%a1 28852: moveb %a1@+,%d0 2886 jmi 3f 2887 moveb %d0,%a0@ 2888 moveb %a1@+,%a0@ 2889 jra 2b 28903: clrb %a0@ 2891#elif defined(USE_MFP) 2892 bclr #1,%a1@(LMFP_TSR) 2893 moveb #0x88,%a1@(LMFP_UCR) 2894 andb #0x70,%a1@(LMFP_TDCDR) 2895 moveb #2,%a1@(LMFP_TDDR) 2896 orb #1,%a1@(LMFP_TDCDR) 2897 bset #1,%a1@(LMFP_TSR) 2898#endif 2899 jra L(serial_init_done) 29004: 2901#endif 2902#ifdef CONFIG_MAC 2903 is_not_mac(L(serial_init_not_mac)) 2904 2905#ifdef SERIAL_DEBUG 2906 2907/* You may define either or both of these. */ 2908#define MAC_USE_SCC_A /* Modem port */ 2909#define MAC_USE_SCC_B /* Printer port */ 2910 2911#define mac_scc_cha_b_ctrl_offset 0x0 2912#define mac_scc_cha_a_ctrl_offset 0x2 2913#define mac_scc_cha_b_data_offset 0x4 2914#define mac_scc_cha_a_data_offset 0x6 2915 2916#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B) 2917 movel %pc@(L(mac_sccbase)),%a0 2918 /* Reset SCC register pointer */ 2919 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0 2920 /* Reset SCC device: write register pointer then register value */ 2921 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset) 2922 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset) 2923 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */ 2924 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */ 2925 movel #35,%d0 29265: 2927 subq #1,%d0 2928 jne 5b 2929#endif 2930 2931#ifdef MAC_USE_SCC_A 2932 /* Initialize channel A */ 2933 lea %pc@(L(scc_initable_mac)),%a1 29345: moveb %a1@+,%d0 2935 jmi 6f 2936 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset) 2937 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset) 2938 jra 5b 29396: 2940#endif /* MAC_USE_SCC_A */ 2941 2942#ifdef MAC_USE_SCC_B 2943 /* Initialize channel B */ 2944 lea %pc@(L(scc_initable_mac)),%a1 29457: moveb %a1@+,%d0 2946 jmi 8f 2947 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset) 2948 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset) 2949 jra 7b 29508: 2951#endif /* MAC_USE_SCC_B */ 2952 2953#endif /* SERIAL_DEBUG */ 2954 2955 jra L(serial_init_done) 2956L(serial_init_not_mac): 2957#endif /* CONFIG_MAC */ 2958 2959#ifdef CONFIG_Q40 2960 is_not_q40(2f) 2961/* debug output goes into SRAM, so we don't do it unless requested 2962 - check for '%LX$' signature in SRAM */ 2963 lea %pc@(q40_mem_cptr),%a1 2964 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */ 2965 move.l #0xff020000,%a1 2966 cmp.b #'%',%a1@ 2967 bne 2f /*nodbg*/ 2968 addq.w #4,%a1 2969 cmp.b #'L',%a1@ 2970 bne 2f /*nodbg*/ 2971 addq.w #4,%a1 2972 cmp.b #'X',%a1@ 2973 bne 2f /*nodbg*/ 2974 addq.w #4,%a1 2975 cmp.b #'$',%a1@ 2976 bne 2f /*nodbg*/ 2977 /* signature OK */ 2978 lea %pc@(L(q40_do_debug)),%a1 2979 tas %a1@ 2980/*nodbg: q40_do_debug is 0 by default*/ 29812: 2982#endif 2983 2984#ifdef CONFIG_APOLLO 2985/* We count on the PROM initializing SIO1 */ 2986#endif 2987 2988#ifdef CONFIG_HP300 2989/* We count on the boot loader initialising the UART */ 2990#endif 2991 2992L(serial_init_done): 2993func_return serial_init 2994 2995/* 2996 * Output character on serial port. 2997 */ 2998func_start serial_putc,%d0/%d1/%a0/%a1 2999 3000 movel ARG1,%d0 3001 cmpib #'\n',%d0 3002 jbne 1f 3003 3004 /* A little safe recursion is good for the soul */ 3005 serial_putc #'\r' 30061: 3007 3008#ifdef CONFIG_AMIGA 3009 is_not_amiga(2f) 3010 andw #0x00ff,%d0 3011 oriw #0x0100,%d0 3012 movel %pc@(L(custom)),%a0 3013 movew %d0,%a0@(CUSTOMBASE+C_SERDAT) 30141: movew %a0@(CUSTOMBASE+C_SERDATR),%d0 3015 andw #0x2000,%d0 3016 jeq 1b 3017 jra L(serial_putc_done) 30182: 3019#endif 3020 3021#ifdef CONFIG_MAC 3022 is_not_mac(5f) 3023 3024#ifdef SERIAL_DEBUG 3025 3026#if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B) 3027 movel %pc@(L(mac_sccbase)),%a1 3028#endif 3029 3030#ifdef MAC_USE_SCC_A 30313: btst #2,%a1@(mac_scc_cha_a_ctrl_offset) 3032 jeq 3b 3033 moveb %d0,%a1@(mac_scc_cha_a_data_offset) 3034#endif /* MAC_USE_SCC_A */ 3035 3036#ifdef MAC_USE_SCC_B 30374: btst #2,%a1@(mac_scc_cha_b_ctrl_offset) 3038 jeq 4b 3039 moveb %d0,%a1@(mac_scc_cha_b_data_offset) 3040#endif /* MAC_USE_SCC_B */ 3041 3042#endif /* SERIAL_DEBUG */ 3043 3044 jra L(serial_putc_done) 30455: 3046#endif /* CONFIG_MAC */ 3047 3048#ifdef CONFIG_ATARI 3049 is_not_atari(4f) 3050 movel %pc@(L(iobase)),%a1 3051#if defined(USE_PRINTER) 30523: btst #0,%a1@(LSTMFP_GPIP) 3053 jne 3b 3054 moveb #LPSG_IO_B,%a1@(LPSG_SELECT) 3055 moveb %d0,%a1@(LPSG_WRITE) 3056 moveb #LPSG_IO_A,%a1@(LPSG_SELECT) 3057 moveb %a1@(LPSG_READ),%d0 3058 bclr #5,%d0 3059 moveb %d0,%a1@(LPSG_WRITE) 3060 nop 3061 nop 3062 bset #5,%d0 3063 moveb %d0,%a1@(LPSG_WRITE) 3064#elif defined(USE_SCC) 30653: btst #2,%a1@(LSCC_CTRL) 3066 jeq 3b 3067 moveb %d0,%a1@(LSCC_DATA) 3068#elif defined(USE_MFP) 30693: btst #7,%a1@(LMFP_TSR) 3070 jeq 3b 3071 moveb %d0,%a1@(LMFP_UDR) 3072#endif 3073 jra L(serial_putc_done) 30744: 3075#endif /* CONFIG_ATARI */ 3076 3077#ifdef CONFIG_MVME147 3078 is_not_mvme147(2f) 30791: btst #2,M147_SCC_CTRL_A 3080 jeq 1b 3081 moveb %d0,M147_SCC_DATA_A 3082 jbra L(serial_putc_done) 30832: 3084#endif 3085 3086#ifdef CONFIG_MVME16x 3087 is_not_mvme16x(2f) 3088 /* 3089 * If the loader gave us a board type then we can use that to 3090 * select an appropriate output routine; otherwise we just use 3091 * the Bug code. If we have to use the Bug that means the Bug 3092 * workspace has to be valid, which means the Bug has to use 3093 * the SRAM, which is non-standard. 3094 */ 3095 moveml %d0-%d7/%a2-%a6,%sp@- 3096 movel vme_brdtype,%d1 3097 jeq 1f | No tag - use the Bug 3098 cmpi #VME_TYPE_MVME162,%d1 3099 jeq 6f 3100 cmpi #VME_TYPE_MVME172,%d1 3101 jne 5f 3102 /* 162/172; it's an SCC */ 31036: btst #2,M162_SCC_CTRL_A 3104 nop 3105 nop 3106 nop 3107 jeq 6b 3108 moveb #8,M162_SCC_CTRL_A 3109 nop 3110 nop 3111 nop 3112 moveb %d0,M162_SCC_CTRL_A 3113 jra 3f 31145: 3115 /* 166/167/177; it's a CD2401 */ 3116 moveb #0,M167_CYCAR 3117 moveb M167_CYIER,%d2 3118 moveb #0x02,M167_CYIER 31197: 3120 btst #5,M167_PCSCCTICR 3121 jeq 7b 3122 moveb M167_PCTPIACKR,%d1 3123 moveb M167_CYLICR,%d1 3124 jeq 8f 3125 moveb #0x08,M167_CYTEOIR 3126 jra 7b 31278: 3128 moveb %d0,M167_CYTDR 3129 moveb #0,M167_CYTEOIR 3130 moveb %d2,M167_CYIER 3131 jra 3f 31321: 3133 moveb %d0,%sp@- 3134 trap #15 3135 .word 0x0020 /* TRAP 0x020 */ 31363: 3137 moveml %sp@+,%d0-%d7/%a2-%a6 3138 jbra L(serial_putc_done) 31392: 3140#endif /* CONFIG_MVME16x */ 3141 3142#ifdef CONFIG_BVME6000 3143 is_not_bvme6000(2f) 3144 /* 3145 * The BVME6000 machine has a serial port ... 3146 */ 31471: btst #2,BVME_SCC_CTRL_A 3148 jeq 1b 3149 moveb %d0,BVME_SCC_DATA_A 3150 jbra L(serial_putc_done) 31512: 3152#endif 3153 3154#ifdef CONFIG_SUN3X 3155 is_not_sun3x(2f) 3156 movel %d0,-(%sp) 3157 movel 0xFEFE0018,%a1 3158 jbsr (%a1) 3159 addq #4,%sp 3160 jbra L(serial_putc_done) 31612: 3162#endif 3163 3164#ifdef CONFIG_Q40 3165 is_not_q40(2f) 3166 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */ 3167 beq 2f 3168 lea %pc@(q40_mem_cptr),%a1 3169 move.l %a1@,%a0 3170 move.b %d0,%a0@ 3171 addq.l #4,%a0 3172 move.l %a0,%a1@ 3173 jbra L(serial_putc_done) 31742: 3175#endif 3176 3177#ifdef CONFIG_APOLLO 3178 is_not_apollo(2f) 3179 movl %pc@(L(iobase)),%a1 3180 moveb %d0,%a1@(LTHRB0) 31811: moveb %a1@(LSRB0),%d0 3182 andb #0x4,%d0 3183 beq 1b 3184 jbra L(serial_putc_done) 31852: 3186#endif 3187 3188#ifdef CONFIG_HP300 3189 is_not_hp300(3f) 3190 movl %pc@(L(iobase)),%a1 3191 addl %pc@(L(uartbase)),%a1 3192 movel %pc@(L(uart_scode)),%d1 /* Check the scode */ 3193 jmi 3f /* Unset? Exit */ 3194 cmpi #256,%d1 /* APCI scode? */ 3195 jeq 2f 31961: moveb %a1@(DCALSR),%d1 /* Output to DCA */ 3197 andb #0x20,%d1 3198 beq 1b 3199 moveb %d0,%a1@(DCADATA) 3200 jbra L(serial_putc_done) 32012: moveb %a1@(APCILSR),%d1 /* Output to APCI */ 3202 andb #0x20,%d1 3203 beq 2b 3204 moveb %d0,%a1@(APCIDATA) 3205 jbra L(serial_putc_done) 32063: 3207#endif 3208 3209L(serial_putc_done): 3210func_return serial_putc 3211 3212/* 3213 * Output a string. 3214 */ 3215func_start puts,%d0/%a0 3216 3217 movel ARG1,%a0 3218 jra 2f 32191: 3220#ifdef CONSOLE 3221 console_putc %d0 3222#endif 3223#ifdef SERIAL_DEBUG 3224 serial_putc %d0 3225#endif 32262: moveb %a0@+,%d0 3227 jne 1b 3228 3229func_return puts 3230 3231/* 3232 * Output number in hex notation. 3233 */ 3234 3235func_start putn,%d0-%d2 3236 3237 putc ' ' 3238 3239 movel ARG1,%d0 3240 moveq #7,%d1 32411: roll #4,%d0 3242 move %d0,%d2 3243 andb #0x0f,%d2 3244 addb #'0',%d2 3245 cmpb #'9',%d2 3246 jls 2f 3247 addb #'A'-('9'+1),%d2 32482: 3249#ifdef CONSOLE 3250 console_putc %d2 3251#endif 3252#ifdef SERIAL_DEBUG 3253 serial_putc %d2 3254#endif 3255 dbra %d1,1b 3256 3257func_return putn 3258 3259#ifdef CONFIG_MAC 3260/* 3261 * mac_early_print 3262 * 3263 * This routine takes its parameters on the stack. It then 3264 * turns around and calls the internal routines. This routine 3265 * is used by the boot console. 3266 * 3267 * The calling parameters are: 3268 * void mac_early_print(const char *str, unsigned length); 3269 * 3270 * This routine does NOT understand variable arguments only 3271 * simple strings! 3272 */ 3273ENTRY(mac_early_print) 3274 moveml %d0/%d1/%a0,%sp@- 3275 movew %sr,%sp@- 3276 ori #0x0700,%sr 3277 movel %sp@(18),%a0 /* fetch parameter */ 3278 movel %sp@(22),%d1 /* fetch parameter */ 3279 jra 2f 32801: 3281#ifdef CONSOLE 3282 console_putc %d0 3283#endif 3284#ifdef SERIAL_DEBUG 3285 serial_putc %d0 3286#endif 3287 subq #1,%d1 32882: jeq 3f 3289 moveb %a0@+,%d0 3290 jne 1b 32913: 3292 movew %sp@+,%sr 3293 moveml %sp@+,%d0/%d1/%a0 3294 rts 3295#endif /* CONFIG_MAC */ 3296 3297#if defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 3298func_start set_leds,%d0/%a0 3299 movel ARG1,%d0 3300#ifdef CONFIG_HP300 3301 is_not_hp300(1f) 3302 movel %pc@(L(iobase)),%a0 3303 moveb %d0,%a0@(0x1ffff) 3304 jra 2f 3305#endif 33061: 3307#ifdef CONFIG_APOLLO 3308 movel %pc@(L(iobase)),%a0 3309 lsll #8,%d0 3310 eorw #0xff00,%d0 3311 moveb %d0,%a0@(LCPUCTRL) 3312#endif 33132: 3314func_return set_leds 3315#endif 3316 3317#ifdef CONSOLE 3318/* 3319 * For continuity, see the data alignment 3320 * to which this structure is tied. 3321 */ 3322#define Lconsole_struct_cur_column 0 3323#define Lconsole_struct_cur_row 4 3324#define Lconsole_struct_num_columns 8 3325#define Lconsole_struct_num_rows 12 3326#define Lconsole_struct_left_edge 16 3327#define Lconsole_struct_penguin_putc 20 3328 3329func_start console_init,%a0-%a4/%d0-%d7 3330 /* 3331 * Some of the register usage that follows 3332 * a0 = pointer to boot_info 3333 * a1 = pointer to screen 3334 * a2 = pointer to Lconsole_globals 3335 * d3 = pixel width of screen 3336 * d4 = pixel height of screen 3337 * (d3,d4) ~= (x,y) of a point just below 3338 * and to the right of the screen 3339 * NOT on the screen! 3340 * d5 = number of bytes per scan line 3341 * d6 = number of bytes on the entire screen 3342 */ 3343 3344 lea %pc@(L(console_globals)),%a2 3345 movel %pc@(L(mac_videobase)),%a1 3346 movel %pc@(L(mac_rowbytes)),%d5 3347 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */ 3348 movel %d3,%d4 3349 swap %d4 /* -> high byte */ 3350 andl #0xffff,%d3 /* d3 = screen width in pixels */ 3351 andl #0xffff,%d4 /* d4 = screen height in pixels */ 3352 3353 movel %d5,%d6 3354| subl #20,%d6 3355 mulul %d4,%d6 /* scan line bytes x num scan lines */ 3356 divul #8,%d6 /* we'll clear 8 bytes at a time */ 3357 moveq #-1,%d0 /* Mac_black */ 3358 subq #1,%d6 3359 3360L(console_clear_loop): 3361 movel %d0,%a1@+ 3362 movel %d0,%a1@+ 3363 dbra %d6,L(console_clear_loop) 3364 3365 /* Calculate font size */ 3366 3367#if defined(FONT_8x8) && defined(CONFIG_FONT_8x8) 3368 lea %pc@(font_vga_8x8),%a0 3369#elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16) 3370 lea %pc@(font_vga_8x16),%a0 3371#elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11) 3372 lea %pc@(font_vga_6x11),%a0 3373#elif defined(CONFIG_FONT_8x8) /* default */ 3374 lea %pc@(font_vga_8x8),%a0 3375#else /* no compiled-in font */ 3376 lea 0,%a0 3377#endif 3378 3379 /* 3380 * At this point we make a shift in register usage 3381 * a1 = address of console_font pointer 3382 */ 3383 lea %pc@(L(console_font)),%a1 3384 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */ 3385 tstl %a0 3386 jeq 1f 3387 lea %pc@(L(console_font_data)),%a4 3388 movel %a0@(FONT_DESC_DATA),%d0 3389 subl #L(console_font),%a1 3390 addl %a1,%d0 3391 movel %d0,%a4@ 3392 3393 /* 3394 * Calculate global maxs 3395 * Note - we can use either an 3396 * 8 x 16 or 8 x 8 character font 3397 * 6 x 11 also supported 3398 */ 3399 /* ASSERT: a0 = contents of Lconsole_font */ 3400 movel %d3,%d0 /* screen width in pixels */ 3401 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */ 3402 3403 movel %d4,%d1 /* screen height in pixels */ 3404 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */ 3405 3406 movel %d0,%a2@(Lconsole_struct_num_columns) 3407 movel %d1,%a2@(Lconsole_struct_num_rows) 3408 3409 /* 3410 * Clear the current row and column 3411 */ 3412 clrl %a2@(Lconsole_struct_cur_column) 3413 clrl %a2@(Lconsole_struct_cur_row) 3414 clrl %a2@(Lconsole_struct_left_edge) 3415 3416 /* 3417 * Initialization is complete 3418 */ 34191: 3420func_return console_init 3421 3422func_start console_put_stats,%a0/%d7 3423 /* 3424 * Some of the register usage that follows 3425 * a0 = pointer to boot_info 3426 * d7 = value of boot_info fields 3427 */ 3428 puts "\nMacLinux\n" 3429 3430#ifdef SERIAL_DEBUG 3431 puts "\n vidaddr:" 3432 putn %pc@(L(mac_videobase)) /* video addr. */ 3433 3434 puts "\n _stext:" 3435 lea %pc@(_stext),%a0 3436 putn %a0 3437 3438 puts "\nbootinfo:" 3439 lea %pc@(_end),%a0 3440 putn %a0 3441 3442 puts "\n cpuid:" 3443 putn %pc@(L(cputype)) 3444 3445# ifdef CONFIG_MAC 3446 puts "\n sccbase:" 3447 putn %pc@(L(mac_sccbase)) 3448# endif 3449# ifdef MMU_PRINT 3450 putc '\n' 3451 jbsr mmu_print_machine_cpu_types 3452# endif 3453#endif /* SERIAL_DEBUG */ 3454 3455 putc '\n' 3456 3457func_return console_put_stats 3458 3459#ifdef CONSOLE_PENGUIN 3460func_start console_put_penguin,%a0-%a1/%d0-%d7 3461 /* 3462 * Get 'that_penguin' onto the screen in the upper right corner 3463 * penguin is 64 x 74 pixels, align against right edge of screen 3464 */ 3465 lea %pc@(L(mac_dimensions)),%a0 3466 movel %a0@,%d0 3467 andil #0xffff,%d0 3468 subil #64,%d0 /* snug up against the right edge */ 3469 clrl %d1 /* start at the top */ 3470 movel #73,%d7 3471 lea %pc@(L(that_penguin)),%a1 3472L(console_penguin_row): 3473 movel #31,%d6 3474L(console_penguin_pixel_pair): 3475 moveb %a1@,%d2 3476 lsrb #4,%d2 3477 console_plot_pixel %d0,%d1,%d2 3478 addq #1,%d0 3479 moveb %a1@+,%d2 3480 console_plot_pixel %d0,%d1,%d2 3481 addq #1,%d0 3482 dbra %d6,L(console_penguin_pixel_pair) 3483 3484 subil #64,%d0 3485 addq #1,%d1 3486 dbra %d7,L(console_penguin_row) 3487 3488func_return console_put_penguin 3489 3490/* include penguin bitmap */ 3491L(that_penguin): 3492#include "../mac/mac_penguin.S" 3493#endif 3494 3495 /* 3496 * Calculate source and destination addresses 3497 * output a1 = dest 3498 * a2 = source 3499 */ 3500 3501func_start console_scroll,%a0-%a4/%d0-%d7 3502 lea %pc@(L(mac_videobase)),%a0 3503 movel %a0@,%a1 3504 movel %a1,%a2 3505 lea %pc@(L(mac_rowbytes)),%a0 3506 movel %a0@,%d5 3507 movel %pc@(L(console_font)),%a0 3508 tstl %a0 3509 jeq 1f 3510 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */ 3511 addal %d5,%a2 3512 3513 /* 3514 * Get dimensions 3515 */ 3516 lea %pc@(L(mac_dimensions)),%a0 3517 movel %a0@,%d3 3518 movel %d3,%d4 3519 swap %d4 3520 andl #0xffff,%d3 /* d3 = screen width in pixels */ 3521 andl #0xffff,%d4 /* d4 = screen height in pixels */ 3522 3523 /* 3524 * Calculate number of bytes to move 3525 */ 3526 lea %pc@(L(mac_rowbytes)),%a0 3527 movel %a0@,%d6 3528 movel %pc@(L(console_font)),%a0 3529 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */ 3530 mulul %d4,%d6 /* scan line bytes x num scan lines */ 3531 divul #32,%d6 /* we'll move 8 longs at a time */ 3532 subq #1,%d6 3533 3534L(console_scroll_loop): 3535 movel %a2@+,%a1@+ 3536 movel %a2@+,%a1@+ 3537 movel %a2@+,%a1@+ 3538 movel %a2@+,%a1@+ 3539 movel %a2@+,%a1@+ 3540 movel %a2@+,%a1@+ 3541 movel %a2@+,%a1@+ 3542 movel %a2@+,%a1@+ 3543 dbra %d6,L(console_scroll_loop) 3544 3545 lea %pc@(L(mac_rowbytes)),%a0 3546 movel %a0@,%d6 3547 movel %pc@(L(console_font)),%a0 3548 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */ 3549 divul #32,%d6 /* we'll move 8 words at a time */ 3550 subq #1,%d6 3551 3552 moveq #-1,%d0 3553L(console_scroll_clear_loop): 3554 movel %d0,%a1@+ 3555 movel %d0,%a1@+ 3556 movel %d0,%a1@+ 3557 movel %d0,%a1@+ 3558 movel %d0,%a1@+ 3559 movel %d0,%a1@+ 3560 movel %d0,%a1@+ 3561 movel %d0,%a1@+ 3562 dbra %d6,L(console_scroll_clear_loop) 3563 35641: 3565func_return console_scroll 3566 3567 3568func_start console_putc,%a0/%a1/%d0-%d7 3569 3570 is_not_mac(L(console_exit)) 3571 tstl %pc@(L(console_font)) 3572 jeq L(console_exit) 3573 3574 /* Output character in d7 on console. 3575 */ 3576 movel ARG1,%d7 3577 cmpib #'\n',%d7 3578 jbne 1f 3579 3580 /* A little safe recursion is good for the soul */ 3581 console_putc #'\r' 35821: 3583 lea %pc@(L(console_globals)),%a0 3584 3585 cmpib #10,%d7 3586 jne L(console_not_lf) 3587 movel %a0@(Lconsole_struct_cur_row),%d0 3588 addil #1,%d0 3589 movel %d0,%a0@(Lconsole_struct_cur_row) 3590 movel %a0@(Lconsole_struct_num_rows),%d1 3591 cmpl %d1,%d0 3592 jcs 1f 3593 subil #1,%d0 3594 movel %d0,%a0@(Lconsole_struct_cur_row) 3595 console_scroll 35961: 3597 jra L(console_exit) 3598 3599L(console_not_lf): 3600 cmpib #13,%d7 3601 jne L(console_not_cr) 3602 clrl %a0@(Lconsole_struct_cur_column) 3603 jra L(console_exit) 3604 3605L(console_not_cr): 3606 cmpib #1,%d7 3607 jne L(console_not_home) 3608 clrl %a0@(Lconsole_struct_cur_row) 3609 clrl %a0@(Lconsole_struct_cur_column) 3610 jra L(console_exit) 3611 3612/* 3613 * At this point we know that the %d7 character is going to be 3614 * rendered on the screen. Register usage is - 3615 * a0 = pointer to console globals 3616 * a1 = font data 3617 * d0 = cursor column 3618 * d1 = cursor row to draw the character 3619 * d7 = character number 3620 */ 3621L(console_not_home): 3622 movel %a0@(Lconsole_struct_cur_column),%d0 3623 addql #1,%a0@(Lconsole_struct_cur_column) 3624 movel %a0@(Lconsole_struct_num_columns),%d1 3625 cmpl %d1,%d0 3626 jcs 1f 3627 console_putc #'\n' /* recursion is OK! */ 36281: 3629 movel %a0@(Lconsole_struct_cur_row),%d1 3630 3631 /* 3632 * At this point we make a shift in register usage 3633 * a0 = address of pointer to font data (fbcon_font_desc) 3634 */ 3635 movel %pc@(L(console_font)),%a0 3636 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */ 3637 andl #0x000000ff,%d7 3638 /* ASSERT: a0 = contents of Lconsole_font */ 3639 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */ 3640 addl %d7,%a1 /* a1 = points to char image */ 3641 3642 /* 3643 * At this point we make a shift in register usage 3644 * d0 = pixel coordinate, x 3645 * d1 = pixel coordinate, y 3646 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen 3647 * d3 = font scan line data (8 pixels) 3648 * d6 = count down for the font's pixel width (8) 3649 * d7 = count down for the font's pixel count in height 3650 */ 3651 /* ASSERT: a0 = contents of Lconsole_font */ 3652 mulul %a0@(FONT_DESC_WIDTH),%d0 3653 mulul %a0@(FONT_DESC_HEIGHT),%d1 3654 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */ 3655 subq #1,%d7 3656L(console_read_char_scanline): 3657 moveb %a1@+,%d3 3658 3659 /* ASSERT: a0 = contents of Lconsole_font */ 3660 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */ 3661 subql #1,%d6 3662 3663L(console_do_font_scanline): 3664 lslb #1,%d3 3665 scsb %d2 /* convert 1 bit into a byte */ 3666 console_plot_pixel %d0,%d1,%d2 3667 addq #1,%d0 3668 dbra %d6,L(console_do_font_scanline) 3669 3670 /* ASSERT: a0 = contents of Lconsole_font */ 3671 subl %a0@(FONT_DESC_WIDTH),%d0 3672 addq #1,%d1 3673 dbra %d7,L(console_read_char_scanline) 3674 3675L(console_exit): 3676func_return console_putc 3677 3678 /* 3679 * Input: 3680 * d0 = x coordinate 3681 * d1 = y coordinate 3682 * d2 = (bit 0) 1/0 for white/black (!) 3683 * All registers are preserved 3684 */ 3685func_start console_plot_pixel,%a0-%a1/%d0-%d4 3686 3687 movel %pc@(L(mac_videobase)),%a1 3688 movel %pc@(L(mac_videodepth)),%d3 3689 movel ARG1,%d0 3690 movel ARG2,%d1 3691 mulul %pc@(L(mac_rowbytes)),%d1 3692 movel ARG3,%d2 3693 3694 /* 3695 * Register usage: 3696 * d0 = x coord becomes byte offset into frame buffer 3697 * d1 = y coord 3698 * d2 = black or white (0/1) 3699 * d3 = video depth 3700 * d4 = temp of x (d0) for many bit depths 3701 */ 3702L(test_1bit): 3703 cmpb #1,%d3 3704 jbne L(test_2bit) 3705 movel %d0,%d4 /* we need the low order 3 bits! */ 3706 divul #8,%d0 3707 addal %d0,%a1 3708 addal %d1,%a1 3709 andb #7,%d4 3710 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */ 3711 andb #1,%d2 3712 jbne L(white_1) 3713 bsetb %d4,%a1@ 3714 jbra L(console_plot_pixel_exit) 3715L(white_1): 3716 bclrb %d4,%a1@ 3717 jbra L(console_plot_pixel_exit) 3718 3719L(test_2bit): 3720 cmpb #2,%d3 3721 jbne L(test_4bit) 3722 movel %d0,%d4 /* we need the low order 2 bits! */ 3723 divul #4,%d0 3724 addal %d0,%a1 3725 addal %d1,%a1 3726 andb #3,%d4 3727 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */ 3728 lsll #1,%d4 /* ! */ 3729 andb #1,%d2 3730 jbne L(white_2) 3731 bsetb %d4,%a1@ 3732 addq #1,%d4 3733 bsetb %d4,%a1@ 3734 jbra L(console_plot_pixel_exit) 3735L(white_2): 3736 bclrb %d4,%a1@ 3737 addq #1,%d4 3738 bclrb %d4,%a1@ 3739 jbra L(console_plot_pixel_exit) 3740 3741L(test_4bit): 3742 cmpb #4,%d3 3743 jbne L(test_8bit) 3744 movel %d0,%d4 /* we need the low order bit! */ 3745 divul #2,%d0 3746 addal %d0,%a1 3747 addal %d1,%a1 3748 andb #1,%d4 3749 eorb #1,%d4 3750 lsll #2,%d4 /* ! */ 3751 andb #1,%d2 3752 jbne L(white_4) 3753 bsetb %d4,%a1@ 3754 addq #1,%d4 3755 bsetb %d4,%a1@ 3756 addq #1,%d4 3757 bsetb %d4,%a1@ 3758 addq #1,%d4 3759 bsetb %d4,%a1@ 3760 jbra L(console_plot_pixel_exit) 3761L(white_4): 3762 bclrb %d4,%a1@ 3763 addq #1,%d4 3764 bclrb %d4,%a1@ 3765 addq #1,%d4 3766 bclrb %d4,%a1@ 3767 addq #1,%d4 3768 bclrb %d4,%a1@ 3769 jbra L(console_plot_pixel_exit) 3770 3771L(test_8bit): 3772 cmpb #8,%d3 3773 jbne L(test_16bit) 3774 addal %d0,%a1 3775 addal %d1,%a1 3776 andb #1,%d2 3777 jbne L(white_8) 3778 moveb #0xff,%a1@ 3779 jbra L(console_plot_pixel_exit) 3780L(white_8): 3781 clrb %a1@ 3782 jbra L(console_plot_pixel_exit) 3783 3784L(test_16bit): 3785 cmpb #16,%d3 3786 jbne L(console_plot_pixel_exit) 3787 addal %d0,%a1 3788 addal %d0,%a1 3789 addal %d1,%a1 3790 andb #1,%d2 3791 jbne L(white_16) 3792 clrw %a1@ 3793 jbra L(console_plot_pixel_exit) 3794L(white_16): 3795 movew #0x0fff,%a1@ 3796 jbra L(console_plot_pixel_exit) 3797 3798L(console_plot_pixel_exit): 3799func_return console_plot_pixel 3800#endif /* CONSOLE */ 3801 3802#if 0 3803/* 3804 * This is some old code lying around. I don't believe 3805 * it's used or important anymore. My guess is it contributed 3806 * to getting to this point, but it's done for now. 3807 * It was still in the 2.1.77 head.S, so it's still here. 3808 * (And still not used!) 3809 */ 3810L(showtest): 3811 moveml %a0/%d7,%sp@- 3812 puts "A=" 3813 putn %a1 3814 3815 .long 0xf0119f15 | ptestr #5,%a1@,#7,%a0 3816 3817 puts "DA=" 3818 putn %a0 3819 3820 puts "D=" 3821 putn %a0@ 3822 3823 puts "S=" 3824 lea %pc@(L(mmu)),%a0 3825 .long 0xf0106200 | pmove %psr,%a0@ 3826 clrl %d7 3827 movew %a0@,%d7 3828 putn %d7 3829 3830 putc '\n' 3831 moveml %sp@+,%a0/%d7 3832 rts 3833#endif /* 0 */ 3834 3835__INITDATA 3836 .align 4 3837 3838#if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \ 3839 defined(CONFIG_HP300) || defined(CONFIG_APOLLO) 3840L(custom): 3841L(iobase): 3842 .long 0 3843#endif 3844 3845#if defined(CONSOLE) 3846L(console_globals): 3847 .long 0 /* cursor column */ 3848 .long 0 /* cursor row */ 3849 .long 0 /* max num columns */ 3850 .long 0 /* max num rows */ 3851 .long 0 /* left edge */ 3852 .long 0 /* mac putc */ 3853L(console_font): 3854 .long 0 /* pointer to console font (struct font_desc) */ 3855L(console_font_data): 3856 .long 0 /* pointer to console font data */ 3857#endif /* CONSOLE */ 3858 3859#if defined(MMU_PRINT) 3860L(mmu_print_data): 3861 .long 0 /* valid flag */ 3862 .long 0 /* start logical */ 3863 .long 0 /* next logical */ 3864 .long 0 /* start physical */ 3865 .long 0 /* next physical */ 3866#endif /* MMU_PRINT */ 3867 3868L(cputype): 3869 .long 0 3870L(mmu_cached_pointer_tables): 3871 .long 0 3872L(mmu_num_pointer_tables): 3873 .long 0 3874L(phys_kernel_start): 3875 .long 0 3876L(kernel_end): 3877 .long 0 3878L(memory_start): 3879 .long 0 3880L(kernel_pgdir_ptr): 3881 .long 0 3882L(temp_mmap_mem): 3883 .long 0 3884 3885#if defined (CONFIG_MVME147) 3886M147_SCC_CTRL_A = 0xfffe3002 3887M147_SCC_DATA_A = 0xfffe3003 3888#endif 3889 3890#if defined (CONFIG_MVME16x) 3891M162_SCC_CTRL_A = 0xfff45005 3892M167_CYCAR = 0xfff450ee 3893M167_CYIER = 0xfff45011 3894M167_CYLICR = 0xfff45026 3895M167_CYTEOIR = 0xfff45085 3896M167_CYTDR = 0xfff450f8 3897M167_PCSCCTICR = 0xfff4201e 3898M167_PCTPIACKR = 0xfff42025 3899#endif 3900 3901#if defined (CONFIG_BVME6000) 3902BVME_SCC_CTRL_A = 0xffb0000b 3903BVME_SCC_DATA_A = 0xffb0000f 3904#endif 3905 3906#if defined(CONFIG_MAC) 3907L(mac_videobase): 3908 .long 0 3909L(mac_videodepth): 3910 .long 0 3911L(mac_dimensions): 3912 .long 0 3913L(mac_rowbytes): 3914 .long 0 3915#ifdef SERIAL_DEBUG 3916L(mac_sccbase): 3917 .long 0 3918#endif 3919#endif /* CONFIG_MAC */ 3920 3921#if defined (CONFIG_APOLLO) 3922LSRB0 = 0x10412 3923LTHRB0 = 0x10416 3924LCPUCTRL = 0x10100 3925#endif 3926 3927#if defined(CONFIG_HP300) 3928DCADATA = 0x11 3929DCALSR = 0x1b 3930APCIDATA = 0x00 3931APCILSR = 0x14 3932L(uartbase): 3933 .long 0 3934L(uart_scode): 3935 .long -1 3936#endif 3937 3938__FINIT 3939 .data 3940 .align 4 3941 3942availmem: 3943 .long 0 3944m68k_pgtable_cachemode: 3945 .long 0 3946m68k_supervisor_cachemode: 3947 .long 0 3948#if defined(CONFIG_MVME16x) 3949mvme_bdid: 3950 .long 0,0,0,0,0,0,0,0 3951#endif 3952#if defined(CONFIG_Q40) 3953q40_mem_cptr: 3954 .long 0 3955L(q40_do_debug): 3956 .long 0 3957#endif 3958