xref: /openbmc/linux/arch/m68k/include/asm/mcfclk.h (revision cfbb9be8)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * mcfclk.h -- coldfire specific clock structure
4  */
5 
6 
7 #ifndef mcfclk_h
8 #define mcfclk_h
9 
10 struct clk;
11 
12 struct clk_ops {
13 	void (*enable)(struct clk *);
14 	void (*disable)(struct clk *);
15 };
16 
17 struct clk {
18 	const char *name;
19 	struct clk_ops *clk_ops;
20 	unsigned long rate;
21 	unsigned long enabled;
22 	u8 slot;
23 };
24 
25 extern struct clk *mcf_clks[];
26 
27 #ifdef MCFPM_PPMCR0
28 extern struct clk_ops clk_ops0;
29 #ifdef MCFPM_PPMCR1
30 extern struct clk_ops clk_ops1;
31 #endif /* MCFPM_PPMCR1 */
32 
33 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
34 static struct clk __clk_##clk_bank##_##clk_slot = { \
35 	.name = clk_name, \
36 	.clk_ops = &clk_ops##clk_bank, \
37 	.rate = clk_rate, \
38 	.slot = clk_slot, \
39 }
40 
41 void __clk_init_enabled(struct clk *);
42 void __clk_init_disabled(struct clk *);
43 #else
44 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
45         static struct clk clk_##clk_ref = { \
46                 .name = clk_name, \
47                 .rate = clk_rate, \
48         }
49 #endif /* MCFPM_PPMCR0 */
50 
51 #endif /* mcfclk_h */
52