1 /* 2 * linux/include/asm-m68k/io.h 3 * 4 * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other 5 * IO access 6 * - added Q40 support 7 * - added skeleton for GG-II and Amiga PCMCIA 8 * 2/3/01 RZ: - moved a few more defs into raw_io.h 9 * 10 * inX/outX should not be used by any driver unless it does 11 * ISA access. Other drivers should use function defined in raw_io.h 12 * or define its own macros on top of these. 13 * 14 * inX(),outX() are for ISA I/O 15 * isa_readX(),isa_writeX() are for ISA memory 16 */ 17 18 #ifndef _IO_H 19 #define _IO_H 20 21 #ifdef __KERNEL__ 22 23 #include <linux/compiler.h> 24 #include <asm/raw_io.h> 25 #include <asm/virtconvert.h> 26 27 #include <asm-generic/iomap.h> 28 29 #ifdef CONFIG_ATARI 30 #include <asm/atarihw.h> 31 #endif 32 33 34 /* 35 * IO/MEM definitions for various ISA bridges 36 */ 37 38 39 #ifdef CONFIG_Q40 40 41 #define q40_isa_io_base 0xff400000 42 #define q40_isa_mem_base 0xff800000 43 44 #define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr))) 45 #define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr))) 46 #define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr))) 47 #define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr))) 48 49 #define MULTI_ISA 0 50 #endif /* Q40 */ 51 52 #ifdef CONFIG_AMIGA_PCMCIA 53 #include <asm/amigayle.h> 54 55 #define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) ) 56 #define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) ) 57 58 #ifndef MULTI_ISA 59 #define MULTI_ISA 0 60 #else 61 #undef MULTI_ISA 62 #define MULTI_ISA 1 63 #endif 64 #endif /* AMIGA_PCMCIA */ 65 66 67 68 #ifdef CONFIG_ISA 69 70 #if MULTI_ISA == 0 71 #undef MULTI_ISA 72 #endif 73 74 #define ISA_TYPE_Q40 (1) 75 #define ISA_TYPE_AG (2) 76 77 #if defined(CONFIG_Q40) && !defined(MULTI_ISA) 78 #define ISA_TYPE ISA_TYPE_Q40 79 #define ISA_SEX 0 80 #endif 81 #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA) 82 #define ISA_TYPE ISA_TYPE_AG 83 #define ISA_SEX 1 84 #endif 85 86 #ifdef MULTI_ISA 87 extern int isa_type; 88 extern int isa_sex; 89 90 #define ISA_TYPE isa_type 91 #define ISA_SEX isa_sex 92 #endif 93 94 /* 95 * define inline addr translation functions. Normally only one variant will 96 * be compiled in so the case statement will be optimised away 97 */ 98 99 static inline u8 __iomem *isa_itb(unsigned long addr) 100 { 101 switch(ISA_TYPE) 102 { 103 #ifdef CONFIG_Q40 104 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr); 105 #endif 106 #ifdef CONFIG_AMIGA_PCMCIA 107 case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr); 108 #endif 109 default: return NULL; /* avoid warnings, just in case */ 110 } 111 } 112 static inline u16 __iomem *isa_itw(unsigned long addr) 113 { 114 switch(ISA_TYPE) 115 { 116 #ifdef CONFIG_Q40 117 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr); 118 #endif 119 #ifdef CONFIG_AMIGA_PCMCIA 120 case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr); 121 #endif 122 default: return NULL; /* avoid warnings, just in case */ 123 } 124 } 125 static inline u32 __iomem *isa_itl(unsigned long addr) 126 { 127 switch(ISA_TYPE) 128 { 129 #ifdef CONFIG_AMIGA_PCMCIA 130 case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr); 131 #endif 132 default: return 0; /* avoid warnings, just in case */ 133 } 134 } 135 static inline u8 __iomem *isa_mtb(unsigned long addr) 136 { 137 switch(ISA_TYPE) 138 { 139 #ifdef CONFIG_Q40 140 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr); 141 #endif 142 #ifdef CONFIG_AMIGA_PCMCIA 143 case ISA_TYPE_AG: return (u8 __iomem *)addr; 144 #endif 145 default: return NULL; /* avoid warnings, just in case */ 146 } 147 } 148 static inline u16 __iomem *isa_mtw(unsigned long addr) 149 { 150 switch(ISA_TYPE) 151 { 152 #ifdef CONFIG_Q40 153 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr); 154 #endif 155 #ifdef CONFIG_AMIGA_PCMCIA 156 case ISA_TYPE_AG: return (u16 __iomem *)addr; 157 #endif 158 default: return NULL; /* avoid warnings, just in case */ 159 } 160 } 161 162 163 #define isa_inb(port) in_8(isa_itb(port)) 164 #define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port))) 165 #define isa_inl(port) (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port))) 166 #define isa_outb(val,port) out_8(isa_itb(port),(val)) 167 #define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val))) 168 #define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val))) 169 170 #define isa_readb(p) in_8(isa_mtb((unsigned long)(p))) 171 #define isa_readw(p) \ 172 (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \ 173 : in_le16(isa_mtw((unsigned long)(p)))) 174 #define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val)) 175 #define isa_writew(val,p) \ 176 (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \ 177 : out_le16(isa_mtw((unsigned long)(p)),(val))) 178 179 static inline void isa_delay(void) 180 { 181 switch(ISA_TYPE) 182 { 183 #ifdef CONFIG_Q40 184 case ISA_TYPE_Q40: isa_outb(0,0x80); break; 185 #endif 186 #ifdef CONFIG_AMIGA_PCMCIA 187 case ISA_TYPE_AG: break; 188 #endif 189 default: break; /* avoid warnings */ 190 } 191 } 192 193 #define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;}) 194 #define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();}) 195 #define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;}) 196 #define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();}) 197 #define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;}) 198 #define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();}) 199 200 #define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr)) 201 #define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr)) 202 203 #define isa_insw(port, buf, nr) \ 204 (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \ 205 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr))) 206 207 #define isa_outsw(port, buf, nr) \ 208 (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \ 209 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr))) 210 211 #define isa_insl(port, buf, nr) \ 212 (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) : \ 213 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1)) 214 215 #define isa_outsl(port, buf, nr) \ 216 (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \ 217 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1)) 218 219 220 #define inb isa_inb 221 #define inb_p isa_inb_p 222 #define outb isa_outb 223 #define outb_p isa_outb_p 224 #define inw isa_inw 225 #define inw_p isa_inw_p 226 #define outw isa_outw 227 #define outw_p isa_outw_p 228 #define inl isa_inl 229 #define inl_p isa_inl_p 230 #define outl isa_outl 231 #define outl_p isa_outl_p 232 #define insb isa_insb 233 #define insw isa_insw 234 #define insl isa_insl 235 #define outsb isa_outsb 236 #define outsw isa_outsw 237 #define outsl isa_outsl 238 #define readb isa_readb 239 #define readw isa_readw 240 #define writeb isa_writeb 241 #define writew isa_writew 242 243 #else /* CONFIG_ISA */ 244 245 /* 246 * We need to define dummy functions for GENERIC_IOMAP support. 247 */ 248 #define inb(port) 0xff 249 #define inb_p(port) 0xff 250 #define outb(val,port) ((void)0) 251 #define outb_p(val,port) ((void)0) 252 #define inw(port) 0xffff 253 #define inw_p(port) 0xffff 254 #define outw(val,port) ((void)0) 255 #define outw_p(val,port) ((void)0) 256 #define inl(port) 0xffffffffUL 257 #define inl_p(port) 0xffffffffUL 258 #define outl(val,port) ((void)0) 259 #define outl_p(val,port) ((void)0) 260 261 #define insb(port,buf,nr) ((void)0) 262 #define outsb(port,buf,nr) ((void)0) 263 #define insw(port,buf,nr) ((void)0) 264 #define outsw(port,buf,nr) ((void)0) 265 #define insl(port,buf,nr) ((void)0) 266 #define outsl(port,buf,nr) ((void)0) 267 268 /* 269 * These should be valid on any ioremap()ed region 270 */ 271 #define readb(addr) in_8(addr) 272 #define writeb(val,addr) out_8((addr),(val)) 273 #define readw(addr) in_le16(addr) 274 #define writew(val,addr) out_le16((addr),(val)) 275 276 #endif /* CONFIG_ISA */ 277 278 #define readl(addr) in_le32(addr) 279 #define writel(val,addr) out_le32((addr),(val)) 280 281 #define mmiowb() 282 283 static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) 284 { 285 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 286 } 287 static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) 288 { 289 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 290 } 291 static inline void __iomem *ioremap_writethrough(unsigned long physaddr, 292 unsigned long size) 293 { 294 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); 295 } 296 static inline void __iomem *ioremap_fullcache(unsigned long physaddr, 297 unsigned long size) 298 { 299 return __ioremap(physaddr, size, IOMAP_FULL_CACHING); 300 } 301 302 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) 303 { 304 __builtin_memset((void __force *) addr, val, count); 305 } 306 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) 307 { 308 __builtin_memcpy(dst, (void __force *) src, count); 309 } 310 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) 311 { 312 __builtin_memcpy((void __force *) dst, src, count); 313 } 314 315 #ifndef CONFIG_SUN3 316 #define IO_SPACE_LIMIT 0xffff 317 #else 318 #define IO_SPACE_LIMIT 0x0fffffff 319 #endif 320 321 #endif /* __KERNEL__ */ 322 323 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 324 325 /* 326 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 327 * access 328 */ 329 #define xlate_dev_mem_ptr(p) __va(p) 330 331 /* 332 * Convert a virtual cached pointer to an uncached pointer 333 */ 334 #define xlate_dev_kmem_ptr(p) p 335 336 #endif /* _IO_H */ 337