1 /* 2 * linux/include/asm-m68k/io.h 3 * 4 * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other 5 * IO access 6 * - added Q40 support 7 * - added skeleton for GG-II and Amiga PCMCIA 8 * 2/3/01 RZ: - moved a few more defs into raw_io.h 9 * 10 * inX/outX should not be used by any driver unless it does 11 * ISA access. Other drivers should use function defined in raw_io.h 12 * or define its own macros on top of these. 13 * 14 * inX(),outX() are for ISA I/O 15 * isa_readX(),isa_writeX() are for ISA memory 16 */ 17 18 #ifndef _IO_H 19 #define _IO_H 20 21 #ifdef __KERNEL__ 22 23 #include <linux/compiler.h> 24 #include <asm/raw_io.h> 25 #include <asm/virtconvert.h> 26 27 #include <asm-generic/iomap.h> 28 29 #ifdef CONFIG_ATARI 30 #include <asm/atarihw.h> 31 #endif 32 33 34 /* 35 * IO/MEM definitions for various ISA bridges 36 */ 37 38 39 #ifdef CONFIG_Q40 40 41 #define q40_isa_io_base 0xff400000 42 #define q40_isa_mem_base 0xff800000 43 44 #define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr))) 45 #define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr))) 46 #define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr))) 47 #define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr))) 48 49 #define MULTI_ISA 0 50 #endif /* Q40 */ 51 52 #ifdef CONFIG_AMIGA_PCMCIA 53 #include <asm/amigayle.h> 54 55 #define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) ) 56 #define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) ) 57 58 #ifndef MULTI_ISA 59 #define MULTI_ISA 0 60 #else 61 #undef MULTI_ISA 62 #define MULTI_ISA 1 63 #endif 64 #endif /* AMIGA_PCMCIA */ 65 66 67 68 #if defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE) 69 70 #define HAVE_ARCH_PIO_SIZE 71 #define PIO_OFFSET 0 72 #define PIO_MASK 0xffff 73 #define PIO_RESERVED 0x10000 74 75 u8 mcf_pci_inb(u32 addr); 76 u16 mcf_pci_inw(u32 addr); 77 u32 mcf_pci_inl(u32 addr); 78 void mcf_pci_insb(u32 addr, u8 *buf, u32 len); 79 void mcf_pci_insw(u32 addr, u16 *buf, u32 len); 80 void mcf_pci_insl(u32 addr, u32 *buf, u32 len); 81 82 void mcf_pci_outb(u8 v, u32 addr); 83 void mcf_pci_outw(u16 v, u32 addr); 84 void mcf_pci_outl(u32 v, u32 addr); 85 void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len); 86 void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len); 87 void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len); 88 89 #define inb mcf_pci_inb 90 #define inb_p mcf_pci_inb 91 #define inw mcf_pci_inw 92 #define inw_p mcf_pci_inw 93 #define inl mcf_pci_inl 94 #define inl_p mcf_pci_inl 95 #define insb mcf_pci_insb 96 #define insw mcf_pci_insw 97 #define insl mcf_pci_insl 98 99 #define outb mcf_pci_outb 100 #define outb_p mcf_pci_outb 101 #define outw mcf_pci_outw 102 #define outw_p mcf_pci_outw 103 #define outl mcf_pci_outl 104 #define outl_p mcf_pci_outl 105 #define outsb mcf_pci_outsb 106 #define outsw mcf_pci_outsw 107 #define outsl mcf_pci_outsl 108 109 #define readb(addr) in_8(addr) 110 #define writeb(v, addr) out_8((addr), (v)) 111 #define readw(addr) in_le16(addr) 112 #define writew(v, addr) out_le16((addr), (v)) 113 114 #elif defined(CONFIG_ISA) 115 116 #if MULTI_ISA == 0 117 #undef MULTI_ISA 118 #endif 119 120 #define ISA_TYPE_Q40 (1) 121 #define ISA_TYPE_AG (2) 122 123 #if defined(CONFIG_Q40) && !defined(MULTI_ISA) 124 #define ISA_TYPE ISA_TYPE_Q40 125 #define ISA_SEX 0 126 #endif 127 #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA) 128 #define ISA_TYPE ISA_TYPE_AG 129 #define ISA_SEX 1 130 #endif 131 132 #ifdef MULTI_ISA 133 extern int isa_type; 134 extern int isa_sex; 135 136 #define ISA_TYPE isa_type 137 #define ISA_SEX isa_sex 138 #endif 139 140 /* 141 * define inline addr translation functions. Normally only one variant will 142 * be compiled in so the case statement will be optimised away 143 */ 144 145 static inline u8 __iomem *isa_itb(unsigned long addr) 146 { 147 switch(ISA_TYPE) 148 { 149 #ifdef CONFIG_Q40 150 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr); 151 #endif 152 #ifdef CONFIG_AMIGA_PCMCIA 153 case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr); 154 #endif 155 default: return NULL; /* avoid warnings, just in case */ 156 } 157 } 158 static inline u16 __iomem *isa_itw(unsigned long addr) 159 { 160 switch(ISA_TYPE) 161 { 162 #ifdef CONFIG_Q40 163 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr); 164 #endif 165 #ifdef CONFIG_AMIGA_PCMCIA 166 case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr); 167 #endif 168 default: return NULL; /* avoid warnings, just in case */ 169 } 170 } 171 static inline u32 __iomem *isa_itl(unsigned long addr) 172 { 173 switch(ISA_TYPE) 174 { 175 #ifdef CONFIG_AMIGA_PCMCIA 176 case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr); 177 #endif 178 default: return 0; /* avoid warnings, just in case */ 179 } 180 } 181 static inline u8 __iomem *isa_mtb(unsigned long addr) 182 { 183 switch(ISA_TYPE) 184 { 185 #ifdef CONFIG_Q40 186 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr); 187 #endif 188 #ifdef CONFIG_AMIGA_PCMCIA 189 case ISA_TYPE_AG: return (u8 __iomem *)addr; 190 #endif 191 default: return NULL; /* avoid warnings, just in case */ 192 } 193 } 194 static inline u16 __iomem *isa_mtw(unsigned long addr) 195 { 196 switch(ISA_TYPE) 197 { 198 #ifdef CONFIG_Q40 199 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr); 200 #endif 201 #ifdef CONFIG_AMIGA_PCMCIA 202 case ISA_TYPE_AG: return (u16 __iomem *)addr; 203 #endif 204 default: return NULL; /* avoid warnings, just in case */ 205 } 206 } 207 208 209 #define isa_inb(port) in_8(isa_itb(port)) 210 #define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port))) 211 #define isa_inl(port) (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port))) 212 #define isa_outb(val,port) out_8(isa_itb(port),(val)) 213 #define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val))) 214 #define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val))) 215 216 #define isa_readb(p) in_8(isa_mtb((unsigned long)(p))) 217 #define isa_readw(p) \ 218 (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \ 219 : in_le16(isa_mtw((unsigned long)(p)))) 220 #define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val)) 221 #define isa_writew(val,p) \ 222 (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \ 223 : out_le16(isa_mtw((unsigned long)(p)),(val))) 224 225 static inline void isa_delay(void) 226 { 227 switch(ISA_TYPE) 228 { 229 #ifdef CONFIG_Q40 230 case ISA_TYPE_Q40: isa_outb(0,0x80); break; 231 #endif 232 #ifdef CONFIG_AMIGA_PCMCIA 233 case ISA_TYPE_AG: break; 234 #endif 235 default: break; /* avoid warnings */ 236 } 237 } 238 239 #define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;}) 240 #define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();}) 241 #define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;}) 242 #define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();}) 243 #define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;}) 244 #define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();}) 245 246 #define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr)) 247 #define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr)) 248 249 #define isa_insw(port, buf, nr) \ 250 (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \ 251 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr))) 252 253 #define isa_outsw(port, buf, nr) \ 254 (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \ 255 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr))) 256 257 #define isa_insl(port, buf, nr) \ 258 (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) : \ 259 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1)) 260 261 #define isa_outsl(port, buf, nr) \ 262 (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \ 263 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1)) 264 265 266 #define inb isa_inb 267 #define inb_p isa_inb_p 268 #define outb isa_outb 269 #define outb_p isa_outb_p 270 #define inw isa_inw 271 #define inw_p isa_inw_p 272 #define outw isa_outw 273 #define outw_p isa_outw_p 274 #define inl isa_inl 275 #define inl_p isa_inl_p 276 #define outl isa_outl 277 #define outl_p isa_outl_p 278 #define insb isa_insb 279 #define insw isa_insw 280 #define insl isa_insl 281 #define outsb isa_outsb 282 #define outsw isa_outsw 283 #define outsl isa_outsl 284 #define readb isa_readb 285 #define readw isa_readw 286 #define writeb isa_writeb 287 #define writew isa_writew 288 289 #else /* CONFIG_ISA */ 290 291 /* 292 * We need to define dummy functions for GENERIC_IOMAP support. 293 */ 294 #define inb(port) 0xff 295 #define inb_p(port) 0xff 296 #define outb(val,port) ((void)0) 297 #define outb_p(val,port) ((void)0) 298 #define inw(port) 0xffff 299 #define inw_p(port) 0xffff 300 #define outw(val,port) ((void)0) 301 #define outw_p(val,port) ((void)0) 302 #define inl(port) 0xffffffffUL 303 #define inl_p(port) 0xffffffffUL 304 #define outl(val,port) ((void)0) 305 #define outl_p(val,port) ((void)0) 306 307 #define insb(port,buf,nr) ((void)0) 308 #define outsb(port,buf,nr) ((void)0) 309 #define insw(port,buf,nr) ((void)0) 310 #define outsw(port,buf,nr) ((void)0) 311 #define insl(port,buf,nr) ((void)0) 312 #define outsl(port,buf,nr) ((void)0) 313 314 /* 315 * These should be valid on any ioremap()ed region 316 */ 317 #define readb(addr) in_8(addr) 318 #define writeb(val,addr) out_8((addr),(val)) 319 #define readw(addr) in_le16(addr) 320 #define writew(val,addr) out_le16((addr),(val)) 321 322 #endif /* CONFIG_ISA */ 323 324 #define readl(addr) in_le32(addr) 325 #define writel(val,addr) out_le32((addr),(val)) 326 327 #define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr)) 328 #define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr)) 329 #define readsl(port, buf, nr) raw_insl((port), (u32 *)(buf), (nr)) 330 #define writesb(port, buf, nr) raw_outsb((port), (u8 *)(buf), (nr)) 331 #define writesw(port, buf, nr) raw_outsw((port), (u16 *)(buf), (nr)) 332 #define writesl(port, buf, nr) raw_outsl((port), (u32 *)(buf), (nr)) 333 334 #define mmiowb() 335 336 static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) 337 { 338 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 339 } 340 static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) 341 { 342 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 343 } 344 static inline void __iomem *ioremap_writethrough(unsigned long physaddr, 345 unsigned long size) 346 { 347 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); 348 } 349 static inline void __iomem *ioremap_fullcache(unsigned long physaddr, 350 unsigned long size) 351 { 352 return __ioremap(physaddr, size, IOMAP_FULL_CACHING); 353 } 354 355 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) 356 { 357 __builtin_memset((void __force *) addr, val, count); 358 } 359 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) 360 { 361 __builtin_memcpy(dst, (void __force *) src, count); 362 } 363 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) 364 { 365 __builtin_memcpy((void __force *) dst, src, count); 366 } 367 368 #ifndef CONFIG_SUN3 369 #define IO_SPACE_LIMIT 0xffff 370 #else 371 #define IO_SPACE_LIMIT 0x0fffffff 372 #endif 373 374 #endif /* __KERNEL__ */ 375 376 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 377 378 /* 379 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 380 * access 381 */ 382 #define xlate_dev_mem_ptr(p) __va(p) 383 384 /* 385 * Convert a virtual cached pointer to an uncached pointer 386 */ 387 #define xlate_dev_kmem_ptr(p) p 388 389 #define ioport_map(port, nr) ((void __iomem *)(port)) 390 391 #endif /* _IO_H */ 392