1 #ifndef _M68K_BITOPS_H 2 #define _M68K_BITOPS_H 3 /* 4 * Copyright 1992, Linus Torvalds. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file COPYING in the main directory of this archive 8 * for more details. 9 */ 10 11 #ifndef _LINUX_BITOPS_H 12 #error only <linux/bitops.h> can be included directly 13 #endif 14 15 #include <linux/compiler.h> 16 #include <asm/barrier.h> 17 18 /* 19 * Bit access functions vary across the ColdFire and 68k families. 20 * So we will break them out here, and then macro in the ones we want. 21 * 22 * ColdFire - supports standard bset/bclr/bchg with register operand only 23 * 68000 - supports standard bset/bclr/bchg with memory operand 24 * >= 68020 - also supports the bfset/bfclr/bfchg instructions 25 * 26 * Although it is possible to use only the bset/bclr/bchg with register 27 * operands on all platforms you end up with larger generated code. 28 * So we use the best form possible on a given platform. 29 */ 30 31 static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr) 32 { 33 char *p = (char *)vaddr + (nr ^ 31) / 8; 34 35 __asm__ __volatile__ ("bset %1,(%0)" 36 : 37 : "a" (p), "di" (nr & 7) 38 : "memory"); 39 } 40 41 static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr) 42 { 43 char *p = (char *)vaddr + (nr ^ 31) / 8; 44 45 __asm__ __volatile__ ("bset %1,%0" 46 : "+m" (*p) 47 : "di" (nr & 7)); 48 } 49 50 static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) 51 { 52 __asm__ __volatile__ ("bfset %1{%0:#1}" 53 : 54 : "d" (nr ^ 31), "o" (*vaddr) 55 : "memory"); 56 } 57 58 #if defined(CONFIG_COLDFIRE) 59 #define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr) 60 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 61 #define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr) 62 #else 63 #define set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 64 bset_mem_set_bit(nr, vaddr) : \ 65 bfset_mem_set_bit(nr, vaddr)) 66 #endif 67 68 static __always_inline void 69 arch___set_bit(unsigned long nr, volatile unsigned long *addr) 70 { 71 set_bit(nr, addr); 72 } 73 74 static inline void bclr_reg_clear_bit(int nr, volatile unsigned long *vaddr) 75 { 76 char *p = (char *)vaddr + (nr ^ 31) / 8; 77 78 __asm__ __volatile__ ("bclr %1,(%0)" 79 : 80 : "a" (p), "di" (nr & 7) 81 : "memory"); 82 } 83 84 static inline void bclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) 85 { 86 char *p = (char *)vaddr + (nr ^ 31) / 8; 87 88 __asm__ __volatile__ ("bclr %1,%0" 89 : "+m" (*p) 90 : "di" (nr & 7)); 91 } 92 93 static inline void bfclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) 94 { 95 __asm__ __volatile__ ("bfclr %1{%0:#1}" 96 : 97 : "d" (nr ^ 31), "o" (*vaddr) 98 : "memory"); 99 } 100 101 #if defined(CONFIG_COLDFIRE) 102 #define clear_bit(nr, vaddr) bclr_reg_clear_bit(nr, vaddr) 103 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 104 #define clear_bit(nr, vaddr) bclr_mem_clear_bit(nr, vaddr) 105 #else 106 #define clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 107 bclr_mem_clear_bit(nr, vaddr) : \ 108 bfclr_mem_clear_bit(nr, vaddr)) 109 #endif 110 111 static __always_inline void 112 arch___clear_bit(unsigned long nr, volatile unsigned long *addr) 113 { 114 clear_bit(nr, addr); 115 } 116 117 static inline void bchg_reg_change_bit(int nr, volatile unsigned long *vaddr) 118 { 119 char *p = (char *)vaddr + (nr ^ 31) / 8; 120 121 __asm__ __volatile__ ("bchg %1,(%0)" 122 : 123 : "a" (p), "di" (nr & 7) 124 : "memory"); 125 } 126 127 static inline void bchg_mem_change_bit(int nr, volatile unsigned long *vaddr) 128 { 129 char *p = (char *)vaddr + (nr ^ 31) / 8; 130 131 __asm__ __volatile__ ("bchg %1,%0" 132 : "+m" (*p) 133 : "di" (nr & 7)); 134 } 135 136 static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr) 137 { 138 __asm__ __volatile__ ("bfchg %1{%0:#1}" 139 : 140 : "d" (nr ^ 31), "o" (*vaddr) 141 : "memory"); 142 } 143 144 #if defined(CONFIG_COLDFIRE) 145 #define change_bit(nr, vaddr) bchg_reg_change_bit(nr, vaddr) 146 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 147 #define change_bit(nr, vaddr) bchg_mem_change_bit(nr, vaddr) 148 #else 149 #define change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 150 bchg_mem_change_bit(nr, vaddr) : \ 151 bfchg_mem_change_bit(nr, vaddr)) 152 #endif 153 154 static __always_inline void 155 arch___change_bit(unsigned long nr, volatile unsigned long *addr) 156 { 157 change_bit(nr, addr); 158 } 159 160 #define arch_test_bit generic_test_bit 161 #define arch_test_bit_acquire generic_test_bit_acquire 162 163 static inline int bset_reg_test_and_set_bit(int nr, 164 volatile unsigned long *vaddr) 165 { 166 char *p = (char *)vaddr + (nr ^ 31) / 8; 167 char retval; 168 169 __asm__ __volatile__ ("bset %2,(%1); sne %0" 170 : "=d" (retval) 171 : "a" (p), "di" (nr & 7) 172 : "memory"); 173 return retval; 174 } 175 176 static inline int bset_mem_test_and_set_bit(int nr, 177 volatile unsigned long *vaddr) 178 { 179 char *p = (char *)vaddr + (nr ^ 31) / 8; 180 char retval; 181 182 __asm__ __volatile__ ("bset %2,%1; sne %0" 183 : "=d" (retval), "+m" (*p) 184 : "di" (nr & 7)); 185 return retval; 186 } 187 188 static inline int bfset_mem_test_and_set_bit(int nr, 189 volatile unsigned long *vaddr) 190 { 191 char retval; 192 193 __asm__ __volatile__ ("bfset %2{%1:#1}; sne %0" 194 : "=d" (retval) 195 : "d" (nr ^ 31), "o" (*vaddr) 196 : "memory"); 197 return retval; 198 } 199 200 #if defined(CONFIG_COLDFIRE) 201 #define test_and_set_bit(nr, vaddr) bset_reg_test_and_set_bit(nr, vaddr) 202 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 203 #define test_and_set_bit(nr, vaddr) bset_mem_test_and_set_bit(nr, vaddr) 204 #else 205 #define test_and_set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 206 bset_mem_test_and_set_bit(nr, vaddr) : \ 207 bfset_mem_test_and_set_bit(nr, vaddr)) 208 #endif 209 210 static __always_inline bool 211 arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr) 212 { 213 return test_and_set_bit(nr, addr); 214 } 215 216 static inline int bclr_reg_test_and_clear_bit(int nr, 217 volatile unsigned long *vaddr) 218 { 219 char *p = (char *)vaddr + (nr ^ 31) / 8; 220 char retval; 221 222 __asm__ __volatile__ ("bclr %2,(%1); sne %0" 223 : "=d" (retval) 224 : "a" (p), "di" (nr & 7) 225 : "memory"); 226 return retval; 227 } 228 229 static inline int bclr_mem_test_and_clear_bit(int nr, 230 volatile unsigned long *vaddr) 231 { 232 char *p = (char *)vaddr + (nr ^ 31) / 8; 233 char retval; 234 235 __asm__ __volatile__ ("bclr %2,%1; sne %0" 236 : "=d" (retval), "+m" (*p) 237 : "di" (nr & 7)); 238 return retval; 239 } 240 241 static inline int bfclr_mem_test_and_clear_bit(int nr, 242 volatile unsigned long *vaddr) 243 { 244 char retval; 245 246 __asm__ __volatile__ ("bfclr %2{%1:#1}; sne %0" 247 : "=d" (retval) 248 : "d" (nr ^ 31), "o" (*vaddr) 249 : "memory"); 250 return retval; 251 } 252 253 #if defined(CONFIG_COLDFIRE) 254 #define test_and_clear_bit(nr, vaddr) bclr_reg_test_and_clear_bit(nr, vaddr) 255 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 256 #define test_and_clear_bit(nr, vaddr) bclr_mem_test_and_clear_bit(nr, vaddr) 257 #else 258 #define test_and_clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 259 bclr_mem_test_and_clear_bit(nr, vaddr) : \ 260 bfclr_mem_test_and_clear_bit(nr, vaddr)) 261 #endif 262 263 static __always_inline bool 264 arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) 265 { 266 return test_and_clear_bit(nr, addr); 267 } 268 269 static inline int bchg_reg_test_and_change_bit(int nr, 270 volatile unsigned long *vaddr) 271 { 272 char *p = (char *)vaddr + (nr ^ 31) / 8; 273 char retval; 274 275 __asm__ __volatile__ ("bchg %2,(%1); sne %0" 276 : "=d" (retval) 277 : "a" (p), "di" (nr & 7) 278 : "memory"); 279 return retval; 280 } 281 282 static inline int bchg_mem_test_and_change_bit(int nr, 283 volatile unsigned long *vaddr) 284 { 285 char *p = (char *)vaddr + (nr ^ 31) / 8; 286 char retval; 287 288 __asm__ __volatile__ ("bchg %2,%1; sne %0" 289 : "=d" (retval), "+m" (*p) 290 : "di" (nr & 7)); 291 return retval; 292 } 293 294 static inline int bfchg_mem_test_and_change_bit(int nr, 295 volatile unsigned long *vaddr) 296 { 297 char retval; 298 299 __asm__ __volatile__ ("bfchg %2{%1:#1}; sne %0" 300 : "=d" (retval) 301 : "d" (nr ^ 31), "o" (*vaddr) 302 : "memory"); 303 return retval; 304 } 305 306 #if defined(CONFIG_COLDFIRE) 307 #define test_and_change_bit(nr, vaddr) bchg_reg_test_and_change_bit(nr, vaddr) 308 #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) 309 #define test_and_change_bit(nr, vaddr) bchg_mem_test_and_change_bit(nr, vaddr) 310 #else 311 #define test_and_change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ 312 bchg_mem_test_and_change_bit(nr, vaddr) : \ 313 bfchg_mem_test_and_change_bit(nr, vaddr)) 314 #endif 315 316 static __always_inline bool 317 arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr) 318 { 319 return test_and_change_bit(nr, addr); 320 } 321 322 /* 323 * The true 68020 and more advanced processors support the "bfffo" 324 * instruction for finding bits. ColdFire and simple 68000 parts 325 * (including CPU32) do not support this. They simply use the generic 326 * functions. 327 */ 328 #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) 329 #include <asm-generic/bitops/ffz.h> 330 #else 331 332 static inline int find_first_zero_bit(const unsigned long *vaddr, 333 unsigned size) 334 { 335 const unsigned long *p = vaddr; 336 int res = 32; 337 unsigned int words; 338 unsigned long num; 339 340 if (!size) 341 return 0; 342 343 words = (size + 31) >> 5; 344 while (!(num = ~*p++)) { 345 if (!--words) 346 goto out; 347 } 348 349 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 350 : "=d" (res) : "d" (num & -num)); 351 res ^= 31; 352 out: 353 res += ((long)p - (long)vaddr - 4) * 8; 354 return res < size ? res : size; 355 } 356 #define find_first_zero_bit find_first_zero_bit 357 358 static inline int find_next_zero_bit(const unsigned long *vaddr, int size, 359 int offset) 360 { 361 const unsigned long *p = vaddr + (offset >> 5); 362 int bit = offset & 31UL, res; 363 364 if (offset >= size) 365 return size; 366 367 if (bit) { 368 unsigned long num = ~*p++ & (~0UL << bit); 369 offset -= bit; 370 371 /* Look for zero in first longword */ 372 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 373 : "=d" (res) : "d" (num & -num)); 374 if (res < 32) { 375 offset += res ^ 31; 376 return offset < size ? offset : size; 377 } 378 offset += 32; 379 380 if (offset >= size) 381 return size; 382 } 383 /* No zero yet, search remaining full bytes for a zero */ 384 return offset + find_first_zero_bit(p, size - offset); 385 } 386 #define find_next_zero_bit find_next_zero_bit 387 388 static inline int find_first_bit(const unsigned long *vaddr, unsigned size) 389 { 390 const unsigned long *p = vaddr; 391 int res = 32; 392 unsigned int words; 393 unsigned long num; 394 395 if (!size) 396 return 0; 397 398 words = (size + 31) >> 5; 399 while (!(num = *p++)) { 400 if (!--words) 401 goto out; 402 } 403 404 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 405 : "=d" (res) : "d" (num & -num)); 406 res ^= 31; 407 out: 408 res += ((long)p - (long)vaddr - 4) * 8; 409 return res < size ? res : size; 410 } 411 #define find_first_bit find_first_bit 412 413 static inline int find_next_bit(const unsigned long *vaddr, int size, 414 int offset) 415 { 416 const unsigned long *p = vaddr + (offset >> 5); 417 int bit = offset & 31UL, res; 418 419 if (offset >= size) 420 return size; 421 422 if (bit) { 423 unsigned long num = *p++ & (~0UL << bit); 424 offset -= bit; 425 426 /* Look for one in first longword */ 427 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 428 : "=d" (res) : "d" (num & -num)); 429 if (res < 32) { 430 offset += res ^ 31; 431 return offset < size ? offset : size; 432 } 433 offset += 32; 434 435 if (offset >= size) 436 return size; 437 } 438 /* No one yet, search remaining full bytes for a one */ 439 return offset + find_first_bit(p, size - offset); 440 } 441 #define find_next_bit find_next_bit 442 443 /* 444 * ffz = Find First Zero in word. Undefined if no zero exists, 445 * so code should check against ~0UL first.. 446 */ 447 static inline unsigned long ffz(unsigned long word) 448 { 449 int res; 450 451 __asm__ __volatile__ ("bfffo %1{#0,#0},%0" 452 : "=d" (res) : "d" (~word & -~word)); 453 return res ^ 31; 454 } 455 456 #endif 457 458 #ifdef __KERNEL__ 459 460 #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) 461 462 /* 463 * The newer ColdFire family members support a "bitrev" instruction 464 * and we can use that to implement a fast ffs. Older Coldfire parts, 465 * and normal 68000 parts don't have anything special, so we use the 466 * generic functions for those. 467 */ 468 #if (defined(__mcfisaaplus__) || defined(__mcfisac__)) && \ 469 !defined(CONFIG_M68000) 470 static inline unsigned long __ffs(unsigned long x) 471 { 472 __asm__ __volatile__ ("bitrev %0; ff1 %0" 473 : "=d" (x) 474 : "0" (x)); 475 return x; 476 } 477 478 static inline int ffs(int x) 479 { 480 if (!x) 481 return 0; 482 return __ffs(x) + 1; 483 } 484 485 #else 486 #include <asm-generic/bitops/ffs.h> 487 #include <asm-generic/bitops/__ffs.h> 488 #endif 489 490 #include <asm-generic/bitops/fls.h> 491 #include <asm-generic/bitops/__fls.h> 492 493 #else 494 495 /* 496 * ffs: find first bit set. This is defined the same way as 497 * the libc and compiler builtin ffs routines, therefore 498 * differs in spirit from the above ffz (man ffs). 499 */ 500 static inline int ffs(int x) 501 { 502 int cnt; 503 504 __asm__ ("bfffo %1{#0:#0},%0" 505 : "=d" (cnt) 506 : "dm" (x & -x)); 507 return 32 - cnt; 508 } 509 510 static inline unsigned long __ffs(unsigned long x) 511 { 512 return ffs(x) - 1; 513 } 514 515 /* 516 * fls: find last bit set. 517 */ 518 static inline int fls(unsigned int x) 519 { 520 int cnt; 521 522 __asm__ ("bfffo %1{#0,#0},%0" 523 : "=d" (cnt) 524 : "dm" (x)); 525 return 32 - cnt; 526 } 527 528 static inline unsigned long __fls(unsigned long x) 529 { 530 return fls(x) - 1; 531 } 532 533 #endif 534 535 /* Simple test-and-set bit locks */ 536 #define test_and_set_bit_lock test_and_set_bit 537 #define clear_bit_unlock clear_bit 538 #define __clear_bit_unlock clear_bit_unlock 539 540 #include <asm-generic/bitops/non-instrumented-non-atomic.h> 541 #include <asm-generic/bitops/ext2-atomic.h> 542 #include <asm-generic/bitops/fls64.h> 543 #include <asm-generic/bitops/sched.h> 544 #include <asm-generic/bitops/hweight.h> 545 #include <asm-generic/bitops/le.h> 546 #endif /* __KERNEL__ */ 547 548 #endif /* _M68K_BITOPS_H */ 549