xref: /openbmc/linux/arch/m68k/coldfire/stmark2.c (revision bbecb07f)
1 /*
2  * stmark2.c -- Support for Sysam AMCORE open board
3  *
4  * (C) Copyright 2017, Angelo Dureghello <angelo@sysam.it>
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive
8  * for more details.
9  */
10 
11 #include <linux/platform_device.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/spi/spi.h>
14 #include <linux/spi/spi-fsl-dspi.h>
15 #include <linux/spi/flash.h>
16 #include <asm/mcfsim.h>
17 
18 /*
19  * Partitioning of parallel NOR flash (39VF3201B)
20  */
21 static struct mtd_partition stmark2_partitions[] = {
22 	{
23 		.name = "U-Boot (1024K)",
24 		.size = 0x100000,
25 		.offset = 0x0
26 	}, {
27 		.name = "Kernel+initramfs (7168K)",
28 		.size = 0x700000,
29 		.offset = MTDPART_OFS_APPEND
30 	}, {
31 		.name = "Flash Free Space (8192K)",
32 		.size = MTDPART_SIZ_FULL,
33 		.offset = MTDPART_OFS_APPEND
34 	}
35 };
36 
37 static struct flash_platform_data stmark2_spi_flash_data = {
38 	.name = "is25lp128",
39 	.parts = stmark2_partitions,
40 	.nr_parts = ARRAY_SIZE(stmark2_partitions),
41 	.type = "is25lp128",
42 };
43 
44 static struct spi_board_info stmark2_board_info[] __initdata = {
45 	{
46 		.modalias = "m25p80",
47 		.max_speed_hz = 5000000,
48 		.bus_num = 0,
49 		.chip_select = 1,
50 		.platform_data = &stmark2_spi_flash_data,
51 		.mode = SPI_MODE_3,
52 	}
53 };
54 
55 /* SPI controller data, SPI (0) */
56 static struct fsl_dspi_platform_data dspi_spi0_info = {
57 	.cs_num = 4,
58 	.bus_num = 0,
59 	.sck_cs_delay = 100,
60 	.cs_sck_delay = 100,
61 };
62 
63 static struct resource dspi_spi0_resource[] = {
64 	[0] = {
65 		.start = MCFDSPI_BASE0,
66 		.end   = MCFDSPI_BASE0 + 0xFF,
67 		.flags = IORESOURCE_MEM,
68 		},
69 	[1] = {
70 		.start = 12,
71 		.end   = 13,
72 		.flags = IORESOURCE_DMA,
73 	},
74 	[2] = {
75 		.start = MCF_IRQ_DSPI0,
76 		.end   = MCF_IRQ_DSPI0,
77 		.flags = IORESOURCE_IRQ,
78 	},
79 };
80 
81 /* SPI controller, id = bus number */
82 static struct platform_device dspi_spi0_device = {
83 	.name = "fsl-dspi",
84 	.id = 0,
85 	.num_resources = ARRAY_SIZE(dspi_spi0_resource),
86 	.resource = dspi_spi0_resource,
87 	.dev = {
88 		.platform_data = &dspi_spi0_info,
89 	},
90 };
91 
92 static struct platform_device *stmark2_devices[] __initdata = {
93 	&dspi_spi0_device,
94 };
95 
96 /*
97  * Note: proper pin-mux setup is mandatory for proper SPI functionality.
98  */
99 static int __init init_stmark2(void)
100 {
101 	/* DSPI0, all pins as DSPI, and using CS1 */
102 	__raw_writeb(0x80, MCFGPIO_PAR_DSPIOWL);
103 	__raw_writeb(0xfc, MCFGPIO_PAR_DSPIOWH);
104 
105 	/* Board gpio setup */
106 	__raw_writeb(0x00, MCFGPIO_PAR_BE);
107 	__raw_writeb(0x00, MCFGPIO_PAR_FBCTL);
108 	__raw_writeb(0x00, MCFGPIO_PAR_CS);
109 	__raw_writeb(0x00, MCFGPIO_PAR_CANI2C);
110 
111 	platform_add_devices(stmark2_devices, ARRAY_SIZE(stmark2_devices));
112 
113 	spi_register_board_info(stmark2_board_info,
114 				ARRAY_SIZE(stmark2_board_info));
115 
116 	return 0;
117 }
118 
119 late_initcall(init_stmark2);
120