xref: /openbmc/linux/arch/m68k/coldfire/m54xx.c (revision ca55b2fe)
1 /***************************************************************************/
2 
3 /*
4  *	m54xx.c  -- platform support for ColdFire 54xx based boards
5  *
6  *	Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be>
7  */
8 
9 /***************************************************************************/
10 
11 #include <linux/kernel.h>
12 #include <linux/param.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/mm.h>
17 #include <linux/clk.h>
18 #include <linux/bootmem.h>
19 #include <asm/pgalloc.h>
20 #include <asm/machdep.h>
21 #include <asm/coldfire.h>
22 #include <asm/m54xxsim.h>
23 #include <asm/mcfuart.h>
24 #include <asm/mcfclk.h>
25 #include <asm/m54xxgpt.h>
26 #ifdef CONFIG_MMU
27 #include <asm/mmu_context.h>
28 #include <linux/pfn.h>
29 #endif
30 
31 /***************************************************************************/
32 
33 DEFINE_CLK(pll, "pll.0", MCF_CLK);
34 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
35 DEFINE_CLK(mcfslt0, "mcfslt.0", MCF_BUSCLK);
36 DEFINE_CLK(mcfslt1, "mcfslt.1", MCF_BUSCLK);
37 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
38 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
39 DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
40 DEFINE_CLK(mcfuart3, "mcfuart.3", MCF_BUSCLK);
41 
42 struct clk *mcf_clks[] = {
43 	&clk_pll,
44 	&clk_sys,
45 	&clk_mcfslt0,
46 	&clk_mcfslt1,
47 	&clk_mcfuart0,
48 	&clk_mcfuart1,
49 	&clk_mcfuart2,
50 	&clk_mcfuart3,
51 	NULL
52 };
53 
54 /***************************************************************************/
55 
56 static void __init m54xx_uarts_init(void)
57 {
58 	/* enable io pins */
59 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC0);
60 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
61 		MCFGPIO_PAR_PSC1);
62 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
63 		MCF_PAR_PSC_CTS_CTS, MCFGPIO_PAR_PSC2);
64 	__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC3);
65 }
66 
67 /***************************************************************************/
68 
69 static void mcf54xx_reset(void)
70 {
71 	/* disable interrupts and enable the watchdog */
72 	asm("movew #0x2700, %sr\n");
73 	__raw_writel(0, MCF_GPT_GMS0);
74 	__raw_writel(MCF_GPT_GCIR_CNT(1), MCF_GPT_GCIR0);
75 	__raw_writel(MCF_GPT_GMS_WDEN | MCF_GPT_GMS_CE | MCF_GPT_GMS_TMS(4),
76 		MCF_GPT_GMS0);
77 }
78 
79 /***************************************************************************/
80 
81 #ifdef CONFIG_MMU
82 
83 unsigned long num_pages;
84 
85 static void __init mcf54xx_bootmem_alloc(void)
86 {
87 	unsigned long start_pfn;
88 	unsigned long memstart;
89 
90 	/* _rambase and _ramend will be naturally page aligned */
91 	m68k_memory[0].addr = _rambase;
92 	m68k_memory[0].size = _ramend - _rambase;
93 
94 	/* compute total pages in system */
95 	num_pages = PFN_DOWN(_ramend - _rambase);
96 
97 	/* page numbers */
98 	memstart = PAGE_ALIGN(_ramstart);
99 	min_low_pfn = PFN_DOWN(_rambase);
100 	start_pfn = PFN_DOWN(memstart);
101 	max_low_pfn = PFN_DOWN(_ramend);
102 	high_memory = (void *)_ramend;
103 
104 	m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6;
105 	module_fixup(NULL, __start_fixup, __stop_fixup);
106 
107 	/* setup bootmem data */
108 	m68k_setup_node(0);
109 	memstart += init_bootmem_node(NODE_DATA(0), start_pfn,
110 		min_low_pfn, max_low_pfn);
111 	free_bootmem_node(NODE_DATA(0), memstart, _ramend - memstart);
112 }
113 
114 #endif /* CONFIG_MMU */
115 
116 /***************************************************************************/
117 
118 void __init config_BSP(char *commandp, int size)
119 {
120 #ifdef CONFIG_MMU
121 	mcf54xx_bootmem_alloc();
122 	mmu_context_init();
123 #endif
124 	mach_reset = mcf54xx_reset;
125 	mach_sched_init = hw_timer_init;
126 	m54xx_uarts_init();
127 }
128 
129 /***************************************************************************/
130