1 /***************************************************************************/ 2 3 /* 4 * m5307.c -- platform support for ColdFire 5307 based boards 5 * 6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) 7 * Copyright (C) 2000, Lineo (www.lineo.com) 8 */ 9 10 /***************************************************************************/ 11 12 #include <linux/kernel.h> 13 #include <linux/param.h> 14 #include <linux/init.h> 15 #include <linux/io.h> 16 #include <asm/machdep.h> 17 #include <asm/coldfire.h> 18 #include <asm/mcfsim.h> 19 #include <asm/mcfwdebug.h> 20 #include <asm/mcfclk.h> 21 22 /***************************************************************************/ 23 24 /* 25 * Some platforms need software versions of the GPIO data registers. 26 */ 27 unsigned short ppdata; 28 unsigned char ledbank = 0xff; 29 30 /***************************************************************************/ 31 32 DEFINE_CLK(pll, "pll.0", MCF_CLK); 33 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 34 DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); 35 DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); 36 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); 37 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 38 DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK); 39 40 struct clk *mcf_clks[] = { 41 &clk_pll, 42 &clk_sys, 43 &clk_mcftmr0, 44 &clk_mcftmr1, 45 &clk_mcfuart0, 46 &clk_mcfuart1, 47 &clk_mcfi2c0, 48 NULL 49 }; 50 51 /***************************************************************************/ 52 53 static void __init m5307_i2c_init(void) 54 { 55 #if IS_ENABLED(CONFIG_I2C_IMX) 56 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, 57 MCFSIM_I2CICR); 58 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); 59 #endif /* IS_ENABLED(CONFIG_I2C_IMX) */ 60 } 61 62 /***************************************************************************/ 63 64 void __init config_BSP(char *commandp, int size) 65 { 66 #if defined(CONFIG_NETtel) || \ 67 defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA) 68 /* Copy command line from FLASH to local buffer... */ 69 memcpy(commandp, (char *) 0xf0004000, size); 70 commandp[size-1] = 0; 71 #endif 72 73 mach_sched_init = hw_timer_init; 74 75 /* Only support the external interrupts on their primary level */ 76 mcf_mapirq2imr(25, MCFINTC_EINT1); 77 mcf_mapirq2imr(27, MCFINTC_EINT3); 78 mcf_mapirq2imr(29, MCFINTC_EINT5); 79 mcf_mapirq2imr(31, MCFINTC_EINT7); 80 81 #ifdef CONFIG_BDM_DISABLE 82 /* 83 * Disable the BDM clocking. This also turns off most of the rest of 84 * the BDM device. This is good for EMC reasons. This option is not 85 * incompatible with the memory protection option. 86 */ 87 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK); 88 #endif 89 m5307_i2c_init(); 90 } 91 92 /***************************************************************************/ 93