1 /***************************************************************************/ 2 3 /* 4 * m528x.c -- platform support for ColdFire 528x based boards 5 * 6 * Sub-architcture dependent initialization code for the Freescale 7 * 5280, 5281 and 5282 CPUs. 8 * 9 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com) 10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) 11 */ 12 13 /***************************************************************************/ 14 15 #include <linux/kernel.h> 16 #include <linux/param.h> 17 #include <linux/init.h> 18 #include <linux/platform_device.h> 19 #include <linux/io.h> 20 #include <asm/machdep.h> 21 #include <asm/coldfire.h> 22 #include <asm/mcfsim.h> 23 #include <asm/mcfuart.h> 24 #include <asm/mcfclk.h> 25 26 /***************************************************************************/ 27 28 DEFINE_CLK(pll, "pll.0", MCF_CLK); 29 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 30 DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK); 31 DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK); 32 DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK); 33 DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK); 34 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); 35 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 36 DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK); 37 DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); 38 DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); 39 DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK); 40 41 struct clk *mcf_clks[] = { 42 &clk_pll, 43 &clk_sys, 44 &clk_mcfpit0, 45 &clk_mcfpit1, 46 &clk_mcfpit2, 47 &clk_mcfpit3, 48 &clk_mcfuart0, 49 &clk_mcfuart1, 50 &clk_mcfuart2, 51 &clk_mcfqspi0, 52 &clk_fec0, 53 &clk_mcfi2c0, 54 NULL 55 }; 56 57 /***************************************************************************/ 58 59 static void __init m528x_qspi_init(void) 60 { 61 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) 62 /* setup Port QS for QSPI with gpio CS control */ 63 __raw_writeb(0x07, MCFGPIO_PQSPAR); 64 #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ 65 } 66 67 /***************************************************************************/ 68 69 static void __init m528x_i2c_init(void) 70 { 71 #if IS_ENABLED(CONFIG_I2C_IMX) 72 u16 paspar; 73 74 /* setup Port AS Pin Assignment Register for I2C */ 75 /* set PASPA0 to SCL and PASPA1 to SDA */ 76 paspar = readw(MCFGPIO_PASPAR); 77 paspar |= 0xF; 78 writew(paspar, MCFGPIO_PASPAR); 79 #endif /* IS_ENABLED(CONFIG_I2C_IMX) */ 80 } 81 82 /***************************************************************************/ 83 84 static void __init m528x_uarts_init(void) 85 { 86 u8 port; 87 88 /* make sure PUAPAR is set for UART0 and UART1 */ 89 port = readb(MCFGPIO_PUAPAR); 90 port |= 0x03 | (0x03 << 2); 91 writeb(port, MCFGPIO_PUAPAR); 92 } 93 94 /***************************************************************************/ 95 96 static void __init m528x_fec_init(void) 97 { 98 u16 v16; 99 100 /* Set multi-function pins to ethernet mode for fec0 */ 101 v16 = readw(MCFGPIO_PASPAR); 102 writew(v16 | 0xf00, MCFGPIO_PASPAR); 103 writeb(0xc0, MCFGPIO_PEHLPAR); 104 } 105 106 /***************************************************************************/ 107 108 #ifdef CONFIG_WILDFIRE 109 void wildfire_halt(void) 110 { 111 writeb(0, 0x30000007); 112 writeb(0x2, 0x30000007); 113 } 114 #endif 115 116 #ifdef CONFIG_WILDFIREMOD 117 void wildfiremod_halt(void) 118 { 119 printk(KERN_INFO "WildFireMod hibernating...\n"); 120 121 /* Set portE.5 to Digital IO */ 122 writew(readw(MCFGPIO_PEPAR) & ~(1 << (5 * 2)), MCFGPIO_PEPAR); 123 124 /* Make portE.5 an output */ 125 writeb(readb(MCFGPIO_PDDR_E) | (1 << 5), MCFGPIO_PDDR_E); 126 127 /* Now toggle portE.5 from low to high */ 128 writeb(readb(MCFGPIO_PODR_E) & ~(1 << 5), MCFGPIO_PODR_E); 129 writeb(readb(MCFGPIO_PODR_E) | (1 << 5), MCFGPIO_PODR_E); 130 131 printk(KERN_EMERG "Failed to hibernate. Halting!\n"); 132 } 133 #endif 134 135 void __init config_BSP(char *commandp, int size) 136 { 137 #ifdef CONFIG_WILDFIRE 138 mach_halt = wildfire_halt; 139 #endif 140 #ifdef CONFIG_WILDFIREMOD 141 mach_halt = wildfiremod_halt; 142 #endif 143 mach_sched_init = hw_timer_init; 144 m528x_uarts_init(); 145 m528x_fec_init(); 146 m528x_qspi_init(); 147 m528x_i2c_init(); 148 } 149 150 /***************************************************************************/ 151