1 /* 2 * arch/m68k/bvme6000/config.c 3 * 4 * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk] 5 * 6 * Based on: 7 * 8 * linux/amiga/config.c 9 * 10 * Copyright (C) 1993 Hamish Macdonald 11 * 12 * This file is subject to the terms and conditions of the GNU General Public 13 * License. See the file README.legal in the main directory of this archive 14 * for more details. 15 */ 16 17 #include <linux/types.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/tty.h> 21 #include <linux/clocksource.h> 22 #include <linux/console.h> 23 #include <linux/linkage.h> 24 #include <linux/init.h> 25 #include <linux/major.h> 26 #include <linux/genhd.h> 27 #include <linux/rtc.h> 28 #include <linux/interrupt.h> 29 #include <linux/bcd.h> 30 31 #include <asm/bootinfo.h> 32 #include <asm/bootinfo-vme.h> 33 #include <asm/byteorder.h> 34 #include <asm/pgtable.h> 35 #include <asm/setup.h> 36 #include <asm/irq.h> 37 #include <asm/traps.h> 38 #include <asm/machdep.h> 39 #include <asm/bvme6000hw.h> 40 41 static void bvme6000_get_model(char *model); 42 extern void bvme6000_sched_init(irq_handler_t handler); 43 extern int bvme6000_hwclk (int, struct rtc_time *); 44 extern void bvme6000_reset (void); 45 void bvme6000_set_vectors (void); 46 47 48 int __init bvme6000_parse_bootinfo(const struct bi_record *bi) 49 { 50 if (be16_to_cpu(bi->tag) == BI_VME_TYPE) 51 return 0; 52 else 53 return 1; 54 } 55 56 void bvme6000_reset(void) 57 { 58 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; 59 60 pr_info("\r\n\nCalled bvme6000_reset\r\n" 61 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r"); 62 /* The string of returns is to delay the reset until the whole 63 * message is output. */ 64 /* Enable the watchdog, via PIT port C bit 4 */ 65 66 pit->pcddr |= 0x10; /* WDOG enable */ 67 68 while(1) 69 ; 70 } 71 72 static void bvme6000_get_model(char *model) 73 { 74 sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4); 75 } 76 77 /* 78 * This function is called during kernel startup to initialize 79 * the bvme6000 IRQ handling routines. 80 */ 81 static void __init bvme6000_init_IRQ(void) 82 { 83 m68k_setup_user_interrupt(VEC_USER, 192); 84 } 85 86 void __init config_bvme6000(void) 87 { 88 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; 89 90 /* Board type is only set by newer versions of vmelilo/tftplilo */ 91 if (!vme_brdtype) { 92 if (m68k_cputype == CPU_68060) 93 vme_brdtype = VME_TYPE_BVME6000; 94 else 95 vme_brdtype = VME_TYPE_BVME4000; 96 } 97 #if 0 98 /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug 99 * debugger. Note trap_init() will splat the abort vector, but 100 * bvme6000_init_IRQ() will put it back again. Hopefully. */ 101 102 bvme6000_set_vectors(); 103 #endif 104 105 mach_max_dma_address = 0xffffffff; 106 mach_sched_init = bvme6000_sched_init; 107 mach_init_IRQ = bvme6000_init_IRQ; 108 mach_hwclk = bvme6000_hwclk; 109 mach_reset = bvme6000_reset; 110 mach_get_model = bvme6000_get_model; 111 112 pr_info("Board is %sconfigured as a System Controller\n", 113 *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not "); 114 115 /* Now do the PIT configuration */ 116 117 pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */ 118 pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */ 119 pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */ 120 pit->padr = 0x00; /* Just to be tidy! */ 121 pit->paddr = 0x00; /* All inputs for now (safest) */ 122 pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */ 123 pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40); 124 /* PRI, SYSCON?, Level3, SCC clks from xtal */ 125 pit->pbddr = 0xf3; /* Mostly outputs */ 126 pit->pcdr = 0x01; /* PA transceiver disabled */ 127 pit->pcddr = 0x03; /* WDOG disable */ 128 129 /* Disable snooping for Ethernet and VME accesses */ 130 131 bvme_acr_addrctl = 0; 132 } 133 134 135 irqreturn_t bvme6000_abort_int (int irq, void *dev_id) 136 { 137 unsigned long *new = (unsigned long *)vectors; 138 unsigned long *old = (unsigned long *)0xf8000000; 139 140 /* Wait for button release */ 141 while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS) 142 ; 143 144 *(new+4) = *(old+4); /* Illegal instruction */ 145 *(new+9) = *(old+9); /* Trace */ 146 *(new+47) = *(old+47); /* Trap #15 */ 147 *(new+0x1f) = *(old+0x1f); /* ABORT switch */ 148 return IRQ_HANDLED; 149 } 150 151 static u64 bvme6000_read_clk(struct clocksource *cs); 152 153 static struct clocksource bvme6000_clk = { 154 .name = "rtc", 155 .rating = 250, 156 .read = bvme6000_read_clk, 157 .mask = CLOCKSOURCE_MASK(32), 158 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 159 }; 160 161 static u32 clk_total, clk_offset; 162 163 #define RTC_TIMER_CLOCK_FREQ 8000000 164 #define RTC_TIMER_CYCLES (RTC_TIMER_CLOCK_FREQ / HZ) 165 #define RTC_TIMER_COUNT ((RTC_TIMER_CYCLES / 2) - 1) 166 167 static irqreturn_t bvme6000_timer_int (int irq, void *dev_id) 168 { 169 irq_handler_t timer_routine = dev_id; 170 unsigned long flags; 171 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 172 unsigned char msr; 173 174 local_irq_save(flags); 175 msr = rtc->msr & 0xc0; 176 rtc->msr = msr | 0x20; /* Ack the interrupt */ 177 clk_total += RTC_TIMER_CYCLES; 178 clk_offset = 0; 179 timer_routine(0, NULL); 180 local_irq_restore(flags); 181 182 return IRQ_HANDLED; 183 } 184 185 /* 186 * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms 187 * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low. 188 * So, when reading the elapsed time, you should read timer1, 189 * subtract it from 39999, and then add 40000 if T1 is high. 190 * That gives you the number of 125ns ticks in to the 10ms period, 191 * so divide by 8 to get the microsecond result. 192 */ 193 194 void bvme6000_sched_init (irq_handler_t timer_routine) 195 { 196 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 197 unsigned char msr = rtc->msr & 0xc0; 198 199 rtc->msr = 0; /* Ensure timer registers accessible */ 200 201 if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer", 202 timer_routine)) 203 panic ("Couldn't register timer int"); 204 205 rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */ 206 rtc->t1msb = RTC_TIMER_COUNT >> 8; 207 rtc->t1lsb = RTC_TIMER_COUNT & 0xff; 208 rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */ 209 rtc->msr = 0x40; /* Access int.cntrl, etc */ 210 rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */ 211 rtc->irr_icr1 = 0; 212 rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */ 213 rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */ 214 rtc->msr = 0; /* Access timer 1 control */ 215 rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */ 216 217 rtc->msr = msr; 218 219 clocksource_register_hz(&bvme6000_clk, RTC_TIMER_CLOCK_FREQ); 220 221 if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0, 222 "abort", bvme6000_abort_int)) 223 panic ("Couldn't register abort int"); 224 } 225 226 227 /* 228 * NOTE: Don't accept any readings within 5us of rollover, as 229 * the T1INT bit may be a little slow getting set. There is also 230 * a fault in the chip, meaning that reads may produce invalid 231 * results... 232 */ 233 234 static u64 bvme6000_read_clk(struct clocksource *cs) 235 { 236 unsigned long flags; 237 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 238 volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE; 239 unsigned char msr, msb; 240 unsigned char t1int, t1op; 241 u32 v = 800000, ov; 242 243 local_irq_save(flags); 244 245 msr = rtc->msr & 0xc0; 246 rtc->msr = 0; /* Ensure timer registers accessible */ 247 248 do { 249 ov = v; 250 t1int = rtc->msr & 0x20; 251 t1op = pit->pcdr & 0x04; 252 rtc->t1cr_omr |= 0x40; /* Latch timer1 */ 253 msb = rtc->t1msb; /* Read timer1 */ 254 v = (msb << 8) | rtc->t1lsb; /* Read timer1 */ 255 } while (t1int != (rtc->msr & 0x20) || 256 t1op != (pit->pcdr & 0x04) || 257 abs(ov-v) > 80 || 258 v > RTC_TIMER_COUNT - (RTC_TIMER_COUNT / 100)); 259 260 v = RTC_TIMER_COUNT - v; 261 if (!t1op) /* If in second half cycle.. */ 262 v += RTC_TIMER_CYCLES / 2; 263 if (msb > 0 && t1int) 264 clk_offset = RTC_TIMER_CYCLES; 265 rtc->msr = msr; 266 267 v += clk_offset + clk_total; 268 269 local_irq_restore(flags); 270 271 return v; 272 } 273 274 /* 275 * Looks like op is non-zero for setting the clock, and zero for 276 * reading the clock. 277 * 278 * struct hwclk_time { 279 * unsigned sec; 0..59 280 * unsigned min; 0..59 281 * unsigned hour; 0..23 282 * unsigned day; 1..31 283 * unsigned mon; 0..11 284 * unsigned year; 00... 285 * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set 286 * }; 287 */ 288 289 int bvme6000_hwclk(int op, struct rtc_time *t) 290 { 291 volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE; 292 unsigned char msr = rtc->msr & 0xc0; 293 294 rtc->msr = 0x40; /* Ensure clock and real-time-mode-register 295 * are accessible */ 296 if (op) 297 { /* Write.... */ 298 rtc->t0cr_rtmr = t->tm_year%4; 299 rtc->bcd_tenms = 0; 300 rtc->bcd_sec = bin2bcd(t->tm_sec); 301 rtc->bcd_min = bin2bcd(t->tm_min); 302 rtc->bcd_hr = bin2bcd(t->tm_hour); 303 rtc->bcd_dom = bin2bcd(t->tm_mday); 304 rtc->bcd_mth = bin2bcd(t->tm_mon + 1); 305 rtc->bcd_year = bin2bcd(t->tm_year%100); 306 if (t->tm_wday >= 0) 307 rtc->bcd_dow = bin2bcd(t->tm_wday+1); 308 rtc->t0cr_rtmr = t->tm_year%4 | 0x08; 309 } 310 else 311 { /* Read.... */ 312 do { 313 t->tm_sec = bcd2bin(rtc->bcd_sec); 314 t->tm_min = bcd2bin(rtc->bcd_min); 315 t->tm_hour = bcd2bin(rtc->bcd_hr); 316 t->tm_mday = bcd2bin(rtc->bcd_dom); 317 t->tm_mon = bcd2bin(rtc->bcd_mth)-1; 318 t->tm_year = bcd2bin(rtc->bcd_year); 319 if (t->tm_year < 70) 320 t->tm_year += 100; 321 t->tm_wday = bcd2bin(rtc->bcd_dow)-1; 322 } while (t->tm_sec != bcd2bin(rtc->bcd_sec)); 323 } 324 325 rtc->msr = msr; 326 327 return 0; 328 } 329