xref: /openbmc/linux/arch/m68k/bvme6000/config.c (revision de2bdb3d)
1 /*
2  *  arch/m68k/bvme6000/config.c
3  *
4  *  Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
5  *
6  * Based on:
7  *
8  *  linux/amiga/config.c
9  *
10  *  Copyright (C) 1993 Hamish Macdonald
11  *
12  * This file is subject to the terms and conditions of the GNU General Public
13  * License.  See the file README.legal in the main directory of this archive
14  * for more details.
15  */
16 
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/tty.h>
21 #include <linux/console.h>
22 #include <linux/linkage.h>
23 #include <linux/init.h>
24 #include <linux/major.h>
25 #include <linux/genhd.h>
26 #include <linux/rtc.h>
27 #include <linux/interrupt.h>
28 #include <linux/bcd.h>
29 
30 #include <asm/bootinfo.h>
31 #include <asm/bootinfo-vme.h>
32 #include <asm/byteorder.h>
33 #include <asm/pgtable.h>
34 #include <asm/setup.h>
35 #include <asm/irq.h>
36 #include <asm/traps.h>
37 #include <asm/machdep.h>
38 #include <asm/bvme6000hw.h>
39 
40 static void bvme6000_get_model(char *model);
41 extern void bvme6000_sched_init(irq_handler_t handler);
42 extern u32 bvme6000_gettimeoffset(void);
43 extern int bvme6000_hwclk (int, struct rtc_time *);
44 extern int bvme6000_set_clock_mmss (unsigned long);
45 extern void bvme6000_reset (void);
46 void bvme6000_set_vectors (void);
47 
48 /* Save tick handler routine pointer, will point to xtime_update() in
49  * kernel/timer/timekeeping.c, called via bvme6000_process_int() */
50 
51 static irq_handler_t tick_handler;
52 
53 
54 int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
55 {
56 	if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
57 		return 0;
58 	else
59 		return 1;
60 }
61 
62 void bvme6000_reset(void)
63 {
64 	volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
65 
66 	printk ("\r\n\nCalled bvme6000_reset\r\n"
67 			"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
68 	/* The string of returns is to delay the reset until the whole
69 	 * message is output. */
70 	/* Enable the watchdog, via PIT port C bit 4 */
71 
72 	pit->pcddr	|= 0x10;	/* WDOG enable */
73 
74 	while(1)
75 		;
76 }
77 
78 static void bvme6000_get_model(char *model)
79 {
80     sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
81 }
82 
83 /*
84  * This function is called during kernel startup to initialize
85  * the bvme6000 IRQ handling routines.
86  */
87 static void __init bvme6000_init_IRQ(void)
88 {
89 	m68k_setup_user_interrupt(VEC_USER, 192);
90 }
91 
92 void __init config_bvme6000(void)
93 {
94     volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
95 
96     /* Board type is only set by newer versions of vmelilo/tftplilo */
97     if (!vme_brdtype) {
98 	if (m68k_cputype == CPU_68060)
99 	    vme_brdtype = VME_TYPE_BVME6000;
100 	else
101 	    vme_brdtype = VME_TYPE_BVME4000;
102     }
103 #if 0
104     /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
105      * debugger.  Note trap_init() will splat the abort vector, but
106      * bvme6000_init_IRQ() will put it back again.  Hopefully. */
107 
108     bvme6000_set_vectors();
109 #endif
110 
111     mach_max_dma_address = 0xffffffff;
112     mach_sched_init      = bvme6000_sched_init;
113     mach_init_IRQ        = bvme6000_init_IRQ;
114     arch_gettimeoffset   = bvme6000_gettimeoffset;
115     mach_hwclk           = bvme6000_hwclk;
116     mach_set_clock_mmss	 = bvme6000_set_clock_mmss;
117     mach_reset		 = bvme6000_reset;
118     mach_get_model       = bvme6000_get_model;
119 
120     printk ("Board is %sconfigured as a System Controller\n",
121 		*config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
122 
123     /* Now do the PIT configuration */
124 
125     pit->pgcr	= 0x00;	/* Unidirectional 8 bit, no handshake for now */
126     pit->psrr	= 0x18;	/* PIACK and PIRQ functions enabled */
127     pit->pacr	= 0x00;	/* Sub Mode 00, H2 i/p, no DMA */
128     pit->padr	= 0x00;	/* Just to be tidy! */
129     pit->paddr	= 0x00;	/* All inputs for now (safest) */
130     pit->pbcr	= 0x80;	/* Sub Mode 1x, H4 i/p, no DMA */
131     pit->pbdr	= 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
132 			/* PRI, SYSCON?, Level3, SCC clks from xtal */
133     pit->pbddr	= 0xf3;	/* Mostly outputs */
134     pit->pcdr	= 0x01;	/* PA transceiver disabled */
135     pit->pcddr	= 0x03;	/* WDOG disable */
136 
137     /* Disable snooping for Ethernet and VME accesses */
138 
139     bvme_acr_addrctl = 0;
140 }
141 
142 
143 irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
144 {
145         unsigned long *new = (unsigned long *)vectors;
146         unsigned long *old = (unsigned long *)0xf8000000;
147 
148         /* Wait for button release */
149         while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
150                 ;
151 
152         *(new+4) = *(old+4);            /* Illegal instruction */
153         *(new+9) = *(old+9);            /* Trace */
154         *(new+47) = *(old+47);          /* Trap #15 */
155         *(new+0x1f) = *(old+0x1f);      /* ABORT switch */
156 	return IRQ_HANDLED;
157 }
158 
159 
160 static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
161 {
162     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
163     unsigned char msr = rtc->msr & 0xc0;
164 
165     rtc->msr = msr | 0x20;		/* Ack the interrupt */
166 
167     return tick_handler(irq, dev_id);
168 }
169 
170 /*
171  * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
172  * (40000 x 125ns).  It will interrupt every 10ms, when T1 goes low.
173  * So, when reading the elapsed time, you should read timer1,
174  * subtract it from 39999, and then add 40000 if T1 is high.
175  * That gives you the number of 125ns ticks in to the 10ms period,
176  * so divide by 8 to get the microsecond result.
177  */
178 
179 void bvme6000_sched_init (irq_handler_t timer_routine)
180 {
181     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
182     unsigned char msr = rtc->msr & 0xc0;
183 
184     rtc->msr = 0;	/* Ensure timer registers accessible */
185 
186     tick_handler = timer_routine;
187     if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
188 				"timer", bvme6000_timer_int))
189 	panic ("Couldn't register timer int");
190 
191     rtc->t1cr_omr = 0x04;	/* Mode 2, ext clk */
192     rtc->t1msb = 39999 >> 8;
193     rtc->t1lsb = 39999 & 0xff;
194     rtc->irr_icr1 &= 0xef;	/* Route timer 1 to INTR pin */
195     rtc->msr = 0x40;		/* Access int.cntrl, etc */
196     rtc->pfr_icr0 = 0x80;	/* Just timer 1 ints enabled */
197     rtc->irr_icr1 = 0;
198     rtc->t1cr_omr = 0x0a;	/* INTR+T1 active lo, push-pull */
199     rtc->t0cr_rtmr &= 0xdf;	/* Stop timers in standby */
200     rtc->msr = 0;		/* Access timer 1 control */
201     rtc->t1cr_omr = 0x05;	/* Mode 2, ext clk, GO */
202 
203     rtc->msr = msr;
204 
205     if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
206 				"abort", bvme6000_abort_int))
207 	panic ("Couldn't register abort int");
208 }
209 
210 
211 /* This is always executed with interrupts disabled.  */
212 
213 /*
214  * NOTE:  Don't accept any readings within 5us of rollover, as
215  * the T1INT bit may be a little slow getting set.  There is also
216  * a fault in the chip, meaning that reads may produce invalid
217  * results...
218  */
219 
220 u32 bvme6000_gettimeoffset(void)
221 {
222     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
223     volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
224     unsigned char msr = rtc->msr & 0xc0;
225     unsigned char t1int, t1op;
226     u32 v = 800000, ov;
227 
228     rtc->msr = 0;	/* Ensure timer registers accessible */
229 
230     do {
231 	ov = v;
232 	t1int = rtc->msr & 0x20;
233 	t1op  = pit->pcdr & 0x04;
234 	rtc->t1cr_omr |= 0x40;		/* Latch timer1 */
235 	v = rtc->t1msb << 8;		/* Read timer1 */
236 	v |= rtc->t1lsb;		/* Read timer1 */
237     } while (t1int != (rtc->msr & 0x20) ||
238 		t1op != (pit->pcdr & 0x04) ||
239 			abs(ov-v) > 80 ||
240 				v > 39960);
241 
242     v = 39999 - v;
243     if (!t1op)				/* If in second half cycle.. */
244 	v += 40000;
245     v /= 8;				/* Convert ticks to microseconds */
246     if (t1int)
247 	v += 10000;			/* Int pending, + 10ms */
248     rtc->msr = msr;
249 
250     return v * 1000;
251 }
252 
253 /*
254  * Looks like op is non-zero for setting the clock, and zero for
255  * reading the clock.
256  *
257  *  struct hwclk_time {
258  *         unsigned        sec;       0..59
259  *         unsigned        min;       0..59
260  *         unsigned        hour;      0..23
261  *         unsigned        day;       1..31
262  *         unsigned        mon;       0..11
263  *         unsigned        year;      00...
264  *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
265  * };
266  */
267 
268 int bvme6000_hwclk(int op, struct rtc_time *t)
269 {
270 	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
271 	unsigned char msr = rtc->msr & 0xc0;
272 
273 	rtc->msr = 0x40;	/* Ensure clock and real-time-mode-register
274 				 * are accessible */
275 	if (op)
276 	{	/* Write.... */
277 		rtc->t0cr_rtmr = t->tm_year%4;
278 		rtc->bcd_tenms = 0;
279 		rtc->bcd_sec = bin2bcd(t->tm_sec);
280 		rtc->bcd_min = bin2bcd(t->tm_min);
281 		rtc->bcd_hr  = bin2bcd(t->tm_hour);
282 		rtc->bcd_dom = bin2bcd(t->tm_mday);
283 		rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
284 		rtc->bcd_year = bin2bcd(t->tm_year%100);
285 		if (t->tm_wday >= 0)
286 			rtc->bcd_dow = bin2bcd(t->tm_wday+1);
287 		rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
288 	}
289 	else
290 	{	/* Read....  */
291 		do {
292 			t->tm_sec  = bcd2bin(rtc->bcd_sec);
293 			t->tm_min  = bcd2bin(rtc->bcd_min);
294 			t->tm_hour = bcd2bin(rtc->bcd_hr);
295 			t->tm_mday = bcd2bin(rtc->bcd_dom);
296 			t->tm_mon  = bcd2bin(rtc->bcd_mth)-1;
297 			t->tm_year = bcd2bin(rtc->bcd_year);
298 			if (t->tm_year < 70)
299 				t->tm_year += 100;
300 			t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
301 		} while (t->tm_sec != bcd2bin(rtc->bcd_sec));
302 	}
303 
304 	rtc->msr = msr;
305 
306 	return 0;
307 }
308 
309 /*
310  * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
311  * clock is out by > 30 minutes.  Logic lifted from atari code.
312  * Algorithm is to wait for the 10ms register to change, and then to
313  * wait a short while, and then set it.
314  */
315 
316 int bvme6000_set_clock_mmss (unsigned long nowtime)
317 {
318 	int retval = 0;
319 	short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
320 	unsigned char rtc_minutes, rtc_tenms;
321 	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
322 	unsigned char msr = rtc->msr & 0xc0;
323 	unsigned long flags;
324 	volatile int i;
325 
326 	rtc->msr = 0;		/* Ensure clock accessible */
327 	rtc_minutes = bcd2bin (rtc->bcd_min);
328 
329 	if ((rtc_minutes < real_minutes
330 		? real_minutes - rtc_minutes
331 			: rtc_minutes - real_minutes) < 30)
332 	{
333 		local_irq_save(flags);
334 		rtc_tenms = rtc->bcd_tenms;
335 		while (rtc_tenms == rtc->bcd_tenms)
336 			;
337 		for (i = 0; i < 1000; i++)
338 			;
339 		rtc->bcd_min = bin2bcd(real_minutes);
340 		rtc->bcd_sec = bin2bcd(real_seconds);
341 		local_irq_restore(flags);
342 	}
343 	else
344 		retval = -1;
345 
346 	rtc->msr = msr;
347 
348 	return retval;
349 }
350 
351