xref: /openbmc/linux/arch/m68k/bvme6000/config.c (revision 0883c2c0)
1 /*
2  *  arch/m68k/bvme6000/config.c
3  *
4  *  Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
5  *
6  * Based on:
7  *
8  *  linux/amiga/config.c
9  *
10  *  Copyright (C) 1993 Hamish Macdonald
11  *
12  * This file is subject to the terms and conditions of the GNU General Public
13  * License.  See the file README.legal in the main directory of this archive
14  * for more details.
15  */
16 
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/tty.h>
21 #include <linux/console.h>
22 #include <linux/linkage.h>
23 #include <linux/init.h>
24 #include <linux/major.h>
25 #include <linux/genhd.h>
26 #include <linux/rtc.h>
27 #include <linux/interrupt.h>
28 #include <linux/bcd.h>
29 
30 #include <asm/bootinfo.h>
31 #include <asm/bootinfo-vme.h>
32 #include <asm/byteorder.h>
33 #include <asm/pgtable.h>
34 #include <asm/setup.h>
35 #include <asm/irq.h>
36 #include <asm/traps.h>
37 #include <asm/rtc.h>
38 #include <asm/machdep.h>
39 #include <asm/bvme6000hw.h>
40 
41 static void bvme6000_get_model(char *model);
42 extern void bvme6000_sched_init(irq_handler_t handler);
43 extern u32 bvme6000_gettimeoffset(void);
44 extern int bvme6000_hwclk (int, struct rtc_time *);
45 extern int bvme6000_set_clock_mmss (unsigned long);
46 extern void bvme6000_reset (void);
47 void bvme6000_set_vectors (void);
48 
49 /* Save tick handler routine pointer, will point to xtime_update() in
50  * kernel/timer/timekeeping.c, called via bvme6000_process_int() */
51 
52 static irq_handler_t tick_handler;
53 
54 
55 int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
56 {
57 	if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
58 		return 0;
59 	else
60 		return 1;
61 }
62 
63 void bvme6000_reset(void)
64 {
65 	volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
66 
67 	printk ("\r\n\nCalled bvme6000_reset\r\n"
68 			"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
69 	/* The string of returns is to delay the reset until the whole
70 	 * message is output. */
71 	/* Enable the watchdog, via PIT port C bit 4 */
72 
73 	pit->pcddr	|= 0x10;	/* WDOG enable */
74 
75 	while(1)
76 		;
77 }
78 
79 static void bvme6000_get_model(char *model)
80 {
81     sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
82 }
83 
84 /*
85  * This function is called during kernel startup to initialize
86  * the bvme6000 IRQ handling routines.
87  */
88 static void __init bvme6000_init_IRQ(void)
89 {
90 	m68k_setup_user_interrupt(VEC_USER, 192);
91 }
92 
93 void __init config_bvme6000(void)
94 {
95     volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
96 
97     /* Board type is only set by newer versions of vmelilo/tftplilo */
98     if (!vme_brdtype) {
99 	if (m68k_cputype == CPU_68060)
100 	    vme_brdtype = VME_TYPE_BVME6000;
101 	else
102 	    vme_brdtype = VME_TYPE_BVME4000;
103     }
104 #if 0
105     /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
106      * debugger.  Note trap_init() will splat the abort vector, but
107      * bvme6000_init_IRQ() will put it back again.  Hopefully. */
108 
109     bvme6000_set_vectors();
110 #endif
111 
112     mach_max_dma_address = 0xffffffff;
113     mach_sched_init      = bvme6000_sched_init;
114     mach_init_IRQ        = bvme6000_init_IRQ;
115     arch_gettimeoffset   = bvme6000_gettimeoffset;
116     mach_hwclk           = bvme6000_hwclk;
117     mach_set_clock_mmss	 = bvme6000_set_clock_mmss;
118     mach_reset		 = bvme6000_reset;
119     mach_get_model       = bvme6000_get_model;
120 
121     printk ("Board is %sconfigured as a System Controller\n",
122 		*config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
123 
124     /* Now do the PIT configuration */
125 
126     pit->pgcr	= 0x00;	/* Unidirectional 8 bit, no handshake for now */
127     pit->psrr	= 0x18;	/* PIACK and PIRQ functions enabled */
128     pit->pacr	= 0x00;	/* Sub Mode 00, H2 i/p, no DMA */
129     pit->padr	= 0x00;	/* Just to be tidy! */
130     pit->paddr	= 0x00;	/* All inputs for now (safest) */
131     pit->pbcr	= 0x80;	/* Sub Mode 1x, H4 i/p, no DMA */
132     pit->pbdr	= 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
133 			/* PRI, SYSCON?, Level3, SCC clks from xtal */
134     pit->pbddr	= 0xf3;	/* Mostly outputs */
135     pit->pcdr	= 0x01;	/* PA transceiver disabled */
136     pit->pcddr	= 0x03;	/* WDOG disable */
137 
138     /* Disable snooping for Ethernet and VME accesses */
139 
140     bvme_acr_addrctl = 0;
141 }
142 
143 
144 irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
145 {
146         unsigned long *new = (unsigned long *)vectors;
147         unsigned long *old = (unsigned long *)0xf8000000;
148 
149         /* Wait for button release */
150         while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
151                 ;
152 
153         *(new+4) = *(old+4);            /* Illegal instruction */
154         *(new+9) = *(old+9);            /* Trace */
155         *(new+47) = *(old+47);          /* Trap #15 */
156         *(new+0x1f) = *(old+0x1f);      /* ABORT switch */
157 	return IRQ_HANDLED;
158 }
159 
160 
161 static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
162 {
163     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
164     unsigned char msr = rtc->msr & 0xc0;
165 
166     rtc->msr = msr | 0x20;		/* Ack the interrupt */
167 
168     return tick_handler(irq, dev_id);
169 }
170 
171 /*
172  * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
173  * (40000 x 125ns).  It will interrupt every 10ms, when T1 goes low.
174  * So, when reading the elapsed time, you should read timer1,
175  * subtract it from 39999, and then add 40000 if T1 is high.
176  * That gives you the number of 125ns ticks in to the 10ms period,
177  * so divide by 8 to get the microsecond result.
178  */
179 
180 void bvme6000_sched_init (irq_handler_t timer_routine)
181 {
182     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
183     unsigned char msr = rtc->msr & 0xc0;
184 
185     rtc->msr = 0;	/* Ensure timer registers accessible */
186 
187     tick_handler = timer_routine;
188     if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
189 				"timer", bvme6000_timer_int))
190 	panic ("Couldn't register timer int");
191 
192     rtc->t1cr_omr = 0x04;	/* Mode 2, ext clk */
193     rtc->t1msb = 39999 >> 8;
194     rtc->t1lsb = 39999 & 0xff;
195     rtc->irr_icr1 &= 0xef;	/* Route timer 1 to INTR pin */
196     rtc->msr = 0x40;		/* Access int.cntrl, etc */
197     rtc->pfr_icr0 = 0x80;	/* Just timer 1 ints enabled */
198     rtc->irr_icr1 = 0;
199     rtc->t1cr_omr = 0x0a;	/* INTR+T1 active lo, push-pull */
200     rtc->t0cr_rtmr &= 0xdf;	/* Stop timers in standby */
201     rtc->msr = 0;		/* Access timer 1 control */
202     rtc->t1cr_omr = 0x05;	/* Mode 2, ext clk, GO */
203 
204     rtc->msr = msr;
205 
206     if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
207 				"abort", bvme6000_abort_int))
208 	panic ("Couldn't register abort int");
209 }
210 
211 
212 /* This is always executed with interrupts disabled.  */
213 
214 /*
215  * NOTE:  Don't accept any readings within 5us of rollover, as
216  * the T1INT bit may be a little slow getting set.  There is also
217  * a fault in the chip, meaning that reads may produce invalid
218  * results...
219  */
220 
221 u32 bvme6000_gettimeoffset(void)
222 {
223     volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
224     volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
225     unsigned char msr = rtc->msr & 0xc0;
226     unsigned char t1int, t1op;
227     u32 v = 800000, ov;
228 
229     rtc->msr = 0;	/* Ensure timer registers accessible */
230 
231     do {
232 	ov = v;
233 	t1int = rtc->msr & 0x20;
234 	t1op  = pit->pcdr & 0x04;
235 	rtc->t1cr_omr |= 0x40;		/* Latch timer1 */
236 	v = rtc->t1msb << 8;		/* Read timer1 */
237 	v |= rtc->t1lsb;		/* Read timer1 */
238     } while (t1int != (rtc->msr & 0x20) ||
239 		t1op != (pit->pcdr & 0x04) ||
240 			abs(ov-v) > 80 ||
241 				v > 39960);
242 
243     v = 39999 - v;
244     if (!t1op)				/* If in second half cycle.. */
245 	v += 40000;
246     v /= 8;				/* Convert ticks to microseconds */
247     if (t1int)
248 	v += 10000;			/* Int pending, + 10ms */
249     rtc->msr = msr;
250 
251     return v * 1000;
252 }
253 
254 /*
255  * Looks like op is non-zero for setting the clock, and zero for
256  * reading the clock.
257  *
258  *  struct hwclk_time {
259  *         unsigned        sec;       0..59
260  *         unsigned        min;       0..59
261  *         unsigned        hour;      0..23
262  *         unsigned        day;       1..31
263  *         unsigned        mon;       0..11
264  *         unsigned        year;      00...
265  *         int             wday;      0..6, 0 is Sunday, -1 means unknown/don't set
266  * };
267  */
268 
269 int bvme6000_hwclk(int op, struct rtc_time *t)
270 {
271 	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
272 	unsigned char msr = rtc->msr & 0xc0;
273 
274 	rtc->msr = 0x40;	/* Ensure clock and real-time-mode-register
275 				 * are accessible */
276 	if (op)
277 	{	/* Write.... */
278 		rtc->t0cr_rtmr = t->tm_year%4;
279 		rtc->bcd_tenms = 0;
280 		rtc->bcd_sec = bin2bcd(t->tm_sec);
281 		rtc->bcd_min = bin2bcd(t->tm_min);
282 		rtc->bcd_hr  = bin2bcd(t->tm_hour);
283 		rtc->bcd_dom = bin2bcd(t->tm_mday);
284 		rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
285 		rtc->bcd_year = bin2bcd(t->tm_year%100);
286 		if (t->tm_wday >= 0)
287 			rtc->bcd_dow = bin2bcd(t->tm_wday+1);
288 		rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
289 	}
290 	else
291 	{	/* Read....  */
292 		do {
293 			t->tm_sec  = bcd2bin(rtc->bcd_sec);
294 			t->tm_min  = bcd2bin(rtc->bcd_min);
295 			t->tm_hour = bcd2bin(rtc->bcd_hr);
296 			t->tm_mday = bcd2bin(rtc->bcd_dom);
297 			t->tm_mon  = bcd2bin(rtc->bcd_mth)-1;
298 			t->tm_year = bcd2bin(rtc->bcd_year);
299 			if (t->tm_year < 70)
300 				t->tm_year += 100;
301 			t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
302 		} while (t->tm_sec != bcd2bin(rtc->bcd_sec));
303 	}
304 
305 	rtc->msr = msr;
306 
307 	return 0;
308 }
309 
310 /*
311  * Set the minutes and seconds from seconds value 'nowtime'.  Fail if
312  * clock is out by > 30 minutes.  Logic lifted from atari code.
313  * Algorithm is to wait for the 10ms register to change, and then to
314  * wait a short while, and then set it.
315  */
316 
317 int bvme6000_set_clock_mmss (unsigned long nowtime)
318 {
319 	int retval = 0;
320 	short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
321 	unsigned char rtc_minutes, rtc_tenms;
322 	volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
323 	unsigned char msr = rtc->msr & 0xc0;
324 	unsigned long flags;
325 	volatile int i;
326 
327 	rtc->msr = 0;		/* Ensure clock accessible */
328 	rtc_minutes = bcd2bin (rtc->bcd_min);
329 
330 	if ((rtc_minutes < real_minutes
331 		? real_minutes - rtc_minutes
332 			: rtc_minutes - real_minutes) < 30)
333 	{
334 		local_irq_save(flags);
335 		rtc_tenms = rtc->bcd_tenms;
336 		while (rtc_tenms == rtc->bcd_tenms)
337 			;
338 		for (i = 0; i < 1000; i++)
339 			;
340 		rtc->bcd_min = bin2bcd(real_minutes);
341 		rtc->bcd_sec = bin2bcd(real_seconds);
342 		local_irq_restore(flags);
343 	}
344 	else
345 		retval = -1;
346 
347 	rtc->msr = msr;
348 
349 	return retval;
350 }
351 
352