1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Author: Huacai Chen <chenhuacai@loongson.cn> 4 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 5 */ 6 #include <linux/bitops.h> 7 #include <linux/bug.h> 8 #include <linux/compiler.h> 9 #include <linux/context_tracking.h> 10 #include <linux/entry-common.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/kexec.h> 14 #include <linux/module.h> 15 #include <linux/extable.h> 16 #include <linux/mm.h> 17 #include <linux/sched/mm.h> 18 #include <linux/sched/debug.h> 19 #include <linux/smp.h> 20 #include <linux/spinlock.h> 21 #include <linux/kallsyms.h> 22 #include <linux/memblock.h> 23 #include <linux/interrupt.h> 24 #include <linux/ptrace.h> 25 #include <linux/kgdb.h> 26 #include <linux/kdebug.h> 27 #include <linux/kprobes.h> 28 #include <linux/notifier.h> 29 #include <linux/irq.h> 30 #include <linux/perf_event.h> 31 32 #include <asm/addrspace.h> 33 #include <asm/bootinfo.h> 34 #include <asm/branch.h> 35 #include <asm/break.h> 36 #include <asm/cpu.h> 37 #include <asm/fpu.h> 38 #include <asm/loongarch.h> 39 #include <asm/mmu_context.h> 40 #include <asm/pgtable.h> 41 #include <asm/ptrace.h> 42 #include <asm/sections.h> 43 #include <asm/siginfo.h> 44 #include <asm/stacktrace.h> 45 #include <asm/tlb.h> 46 #include <asm/types.h> 47 #include <asm/unwind.h> 48 49 #include "access-helper.h" 50 51 extern asmlinkage void handle_ade(void); 52 extern asmlinkage void handle_ale(void); 53 extern asmlinkage void handle_sys(void); 54 extern asmlinkage void handle_bp(void); 55 extern asmlinkage void handle_ri(void); 56 extern asmlinkage void handle_fpu(void); 57 extern asmlinkage void handle_fpe(void); 58 extern asmlinkage void handle_lbt(void); 59 extern asmlinkage void handle_lsx(void); 60 extern asmlinkage void handle_lasx(void); 61 extern asmlinkage void handle_reserved(void); 62 extern asmlinkage void handle_watch(void); 63 extern asmlinkage void handle_vint(void); 64 65 static void show_backtrace(struct task_struct *task, const struct pt_regs *regs, 66 const char *loglvl, bool user) 67 { 68 unsigned long addr; 69 struct unwind_state state; 70 struct pt_regs *pregs = (struct pt_regs *)regs; 71 72 if (!task) 73 task = current; 74 75 printk("%sCall Trace:", loglvl); 76 for (unwind_start(&state, task, pregs); 77 !unwind_done(&state); unwind_next_frame(&state)) { 78 addr = unwind_get_return_address(&state); 79 print_ip_sym(loglvl, addr); 80 } 81 printk("%s\n", loglvl); 82 } 83 84 static void show_stacktrace(struct task_struct *task, 85 const struct pt_regs *regs, const char *loglvl, bool user) 86 { 87 int i; 88 const int field = 2 * sizeof(unsigned long); 89 unsigned long stackdata; 90 unsigned long *sp = (unsigned long *)regs->regs[3]; 91 92 printk("%sStack :", loglvl); 93 i = 0; 94 while ((unsigned long) sp & (PAGE_SIZE - 1)) { 95 if (i && ((i % (64 / field)) == 0)) { 96 pr_cont("\n"); 97 printk("%s ", loglvl); 98 } 99 if (i > 39) { 100 pr_cont(" ..."); 101 break; 102 } 103 104 if (__get_addr(&stackdata, sp++, user)) { 105 pr_cont(" (Bad stack address)"); 106 break; 107 } 108 109 pr_cont(" %0*lx", field, stackdata); 110 i++; 111 } 112 pr_cont("\n"); 113 show_backtrace(task, regs, loglvl, user); 114 } 115 116 void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl) 117 { 118 struct pt_regs regs; 119 120 regs.csr_crmd = 0; 121 if (sp) { 122 regs.csr_era = 0; 123 regs.regs[1] = 0; 124 regs.regs[3] = (unsigned long)sp; 125 } else { 126 if (!task || task == current) 127 prepare_frametrace(®s); 128 else { 129 regs.csr_era = task->thread.reg01; 130 regs.regs[1] = 0; 131 regs.regs[3] = task->thread.reg03; 132 regs.regs[22] = task->thread.reg22; 133 } 134 } 135 136 show_stacktrace(task, ®s, loglvl, false); 137 } 138 139 static void show_code(unsigned int *pc, bool user) 140 { 141 long i; 142 unsigned int insn; 143 144 printk("Code:"); 145 146 for(i = -3 ; i < 6 ; i++) { 147 if (__get_inst(&insn, pc + i, user)) { 148 pr_cont(" (Bad address in era)\n"); 149 break; 150 } 151 pr_cont("%c%08x%c", (i?' ':'<'), insn, (i?' ':'>')); 152 } 153 pr_cont("\n"); 154 } 155 156 static void __show_regs(const struct pt_regs *regs) 157 { 158 const int field = 2 * sizeof(unsigned long); 159 unsigned int excsubcode; 160 unsigned int exccode; 161 int i; 162 163 show_regs_print_info(KERN_DEFAULT); 164 165 /* 166 * Saved main processor registers 167 */ 168 for (i = 0; i < 32; ) { 169 if ((i % 4) == 0) 170 printk("$%2d :", i); 171 pr_cont(" %0*lx", field, regs->regs[i]); 172 173 i++; 174 if ((i % 4) == 0) 175 pr_cont("\n"); 176 } 177 178 /* 179 * Saved csr registers 180 */ 181 printk("era : %0*lx %pS\n", field, regs->csr_era, 182 (void *) regs->csr_era); 183 printk("ra : %0*lx %pS\n", field, regs->regs[1], 184 (void *) regs->regs[1]); 185 186 printk("CSR crmd: %08lx ", regs->csr_crmd); 187 printk("CSR prmd: %08lx ", regs->csr_prmd); 188 printk("CSR euen: %08lx ", regs->csr_euen); 189 printk("CSR ecfg: %08lx ", regs->csr_ecfg); 190 printk("CSR estat: %08lx ", regs->csr_estat); 191 192 pr_cont("\n"); 193 194 exccode = ((regs->csr_estat) & CSR_ESTAT_EXC) >> CSR_ESTAT_EXC_SHIFT; 195 excsubcode = ((regs->csr_estat) & CSR_ESTAT_ESUBCODE) >> CSR_ESTAT_ESUBCODE_SHIFT; 196 printk("ExcCode : %x (SubCode %x)\n", exccode, excsubcode); 197 198 if (exccode >= EXCCODE_TLBL && exccode <= EXCCODE_ALE) 199 printk("BadVA : %0*lx\n", field, regs->csr_badvaddr); 200 201 printk("PrId : %08x (%s)\n", read_cpucfg(LOONGARCH_CPUCFG0), 202 cpu_family_string()); 203 } 204 205 void show_regs(struct pt_regs *regs) 206 { 207 __show_regs((struct pt_regs *)regs); 208 dump_stack(); 209 } 210 211 void show_registers(struct pt_regs *regs) 212 { 213 __show_regs(regs); 214 print_modules(); 215 printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n", 216 current->comm, current->pid, current_thread_info(), current); 217 218 show_stacktrace(current, regs, KERN_DEFAULT, user_mode(regs)); 219 show_code((void *)regs->csr_era, user_mode(regs)); 220 printk("\n"); 221 } 222 223 static DEFINE_RAW_SPINLOCK(die_lock); 224 225 void __noreturn die(const char *str, struct pt_regs *regs) 226 { 227 static int die_counter; 228 int sig = SIGSEGV; 229 230 oops_enter(); 231 232 if (notify_die(DIE_OOPS, str, regs, 0, current->thread.trap_nr, 233 SIGSEGV) == NOTIFY_STOP) 234 sig = 0; 235 236 console_verbose(); 237 raw_spin_lock_irq(&die_lock); 238 bust_spinlocks(1); 239 240 printk("%s[#%d]:\n", str, ++die_counter); 241 show_registers(regs); 242 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); 243 raw_spin_unlock_irq(&die_lock); 244 245 oops_exit(); 246 247 if (regs && kexec_should_crash(current)) 248 crash_kexec(regs); 249 250 if (in_interrupt()) 251 panic("Fatal exception in interrupt"); 252 253 if (panic_on_oops) 254 panic("Fatal exception"); 255 256 make_task_dead(sig); 257 } 258 259 static inline void setup_vint_size(unsigned int size) 260 { 261 unsigned int vs; 262 263 vs = ilog2(size/4); 264 265 if (vs == 0 || vs > 7) 266 panic("vint_size %d Not support yet", vs); 267 268 csr_xchg32(vs<<CSR_ECFG_VS_SHIFT, CSR_ECFG_VS, LOONGARCH_CSR_ECFG); 269 } 270 271 /* 272 * Send SIGFPE according to FCSR Cause bits, which must have already 273 * been masked against Enable bits. This is impotant as Inexact can 274 * happen together with Overflow or Underflow, and `ptrace' can set 275 * any bits. 276 */ 277 void force_fcsr_sig(unsigned long fcsr, void __user *fault_addr, 278 struct task_struct *tsk) 279 { 280 int si_code = FPE_FLTUNK; 281 282 if (fcsr & FPU_CSR_INV_X) 283 si_code = FPE_FLTINV; 284 else if (fcsr & FPU_CSR_DIV_X) 285 si_code = FPE_FLTDIV; 286 else if (fcsr & FPU_CSR_OVF_X) 287 si_code = FPE_FLTOVF; 288 else if (fcsr & FPU_CSR_UDF_X) 289 si_code = FPE_FLTUND; 290 else if (fcsr & FPU_CSR_INE_X) 291 si_code = FPE_FLTRES; 292 293 force_sig_fault(SIGFPE, si_code, fault_addr); 294 } 295 296 int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcsr) 297 { 298 int si_code; 299 300 switch (sig) { 301 case 0: 302 return 0; 303 304 case SIGFPE: 305 force_fcsr_sig(fcsr, fault_addr, current); 306 return 1; 307 308 case SIGBUS: 309 force_sig_fault(SIGBUS, BUS_ADRERR, fault_addr); 310 return 1; 311 312 case SIGSEGV: 313 mmap_read_lock(current->mm); 314 if (vma_lookup(current->mm, (unsigned long)fault_addr)) 315 si_code = SEGV_ACCERR; 316 else 317 si_code = SEGV_MAPERR; 318 mmap_read_unlock(current->mm); 319 force_sig_fault(SIGSEGV, si_code, fault_addr); 320 return 1; 321 322 default: 323 force_sig(sig); 324 return 1; 325 } 326 } 327 328 /* 329 * Delayed fp exceptions when doing a lazy ctx switch 330 */ 331 asmlinkage void noinstr do_fpe(struct pt_regs *regs, unsigned long fcsr) 332 { 333 int sig; 334 void __user *fault_addr; 335 irqentry_state_t state = irqentry_enter(regs); 336 337 if (notify_die(DIE_FP, "FP exception", regs, 0, current->thread.trap_nr, 338 SIGFPE) == NOTIFY_STOP) 339 goto out; 340 341 /* Clear FCSR.Cause before enabling interrupts */ 342 write_fcsr(LOONGARCH_FCSR0, fcsr & ~mask_fcsr_x(fcsr)); 343 local_irq_enable(); 344 345 die_if_kernel("FP exception in kernel code", regs); 346 347 sig = SIGFPE; 348 fault_addr = (void __user *) regs->csr_era; 349 350 /* Send a signal if required. */ 351 process_fpemu_return(sig, fault_addr, fcsr); 352 353 out: 354 local_irq_disable(); 355 irqentry_exit(regs, state); 356 } 357 358 asmlinkage void noinstr do_ade(struct pt_regs *regs) 359 { 360 irqentry_state_t state = irqentry_enter(regs); 361 362 die_if_kernel("Kernel ade access", regs); 363 force_sig_fault(SIGBUS, BUS_ADRERR, (void __user *)regs->csr_badvaddr); 364 365 irqentry_exit(regs, state); 366 } 367 368 /* sysctl hooks */ 369 int unaligned_enabled __read_mostly = 1; /* Enabled by default */ 370 int no_unaligned_warning __read_mostly = 1; /* Only 1 warning by default */ 371 372 asmlinkage void noinstr do_ale(struct pt_regs *regs) 373 { 374 unsigned int *pc; 375 irqentry_state_t state = irqentry_enter(regs); 376 377 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, regs->csr_badvaddr); 378 379 /* 380 * Did we catch a fault trying to load an instruction? 381 */ 382 if (regs->csr_badvaddr == regs->csr_era) 383 goto sigbus; 384 if (user_mode(regs) && !test_thread_flag(TIF_FIXADE)) 385 goto sigbus; 386 if (!unaligned_enabled) 387 goto sigbus; 388 if (!no_unaligned_warning) 389 show_registers(regs); 390 391 pc = (unsigned int *)exception_era(regs); 392 393 emulate_load_store_insn(regs, (void __user *)regs->csr_badvaddr, pc); 394 395 goto out; 396 397 sigbus: 398 die_if_kernel("Kernel ale access", regs); 399 force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)regs->csr_badvaddr); 400 401 out: 402 irqentry_exit(regs, state); 403 } 404 405 #ifdef CONFIG_GENERIC_BUG 406 int is_valid_bugaddr(unsigned long addr) 407 { 408 return 1; 409 } 410 #endif /* CONFIG_GENERIC_BUG */ 411 412 static void bug_handler(struct pt_regs *regs) 413 { 414 switch (report_bug(regs->csr_era, regs)) { 415 case BUG_TRAP_TYPE_BUG: 416 case BUG_TRAP_TYPE_NONE: 417 die_if_kernel("Oops - BUG", regs); 418 force_sig(SIGTRAP); 419 break; 420 421 case BUG_TRAP_TYPE_WARN: 422 /* Skip the BUG instruction and continue */ 423 regs->csr_era += LOONGARCH_INSN_SIZE; 424 break; 425 } 426 } 427 428 asmlinkage void noinstr do_bp(struct pt_regs *regs) 429 { 430 bool user = user_mode(regs); 431 unsigned int opcode, bcode; 432 unsigned long era = exception_era(regs); 433 irqentry_state_t state = irqentry_enter(regs); 434 435 local_irq_enable(); 436 current->thread.trap_nr = read_csr_excode(); 437 if (__get_inst(&opcode, (u32 *)era, user)) 438 goto out_sigsegv; 439 440 bcode = (opcode & 0x7fff); 441 442 /* 443 * notify the kprobe handlers, if instruction is likely to 444 * pertain to them. 445 */ 446 switch (bcode) { 447 case BRK_KPROBE_BP: 448 if (notify_die(DIE_BREAK, "Kprobe", regs, bcode, 449 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) 450 goto out; 451 else 452 break; 453 case BRK_KPROBE_SSTEPBP: 454 if (notify_die(DIE_SSTEPBP, "Kprobe_SingleStep", regs, bcode, 455 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) 456 goto out; 457 else 458 break; 459 case BRK_UPROBE_BP: 460 if (notify_die(DIE_UPROBE, "Uprobe", regs, bcode, 461 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) 462 goto out; 463 else 464 break; 465 case BRK_UPROBE_XOLBP: 466 if (notify_die(DIE_UPROBE_XOL, "Uprobe_XOL", regs, bcode, 467 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) 468 goto out; 469 else 470 break; 471 default: 472 if (notify_die(DIE_TRAP, "Break", regs, bcode, 473 current->thread.trap_nr, SIGTRAP) == NOTIFY_STOP) 474 goto out; 475 else 476 break; 477 } 478 479 switch (bcode) { 480 case BRK_BUG: 481 bug_handler(regs); 482 break; 483 case BRK_DIVZERO: 484 die_if_kernel("Break instruction in kernel code", regs); 485 force_sig_fault(SIGFPE, FPE_INTDIV, (void __user *)regs->csr_era); 486 break; 487 case BRK_OVERFLOW: 488 die_if_kernel("Break instruction in kernel code", regs); 489 force_sig_fault(SIGFPE, FPE_INTOVF, (void __user *)regs->csr_era); 490 break; 491 default: 492 die_if_kernel("Break instruction in kernel code", regs); 493 force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->csr_era); 494 break; 495 } 496 497 out: 498 local_irq_disable(); 499 irqentry_exit(regs, state); 500 return; 501 502 out_sigsegv: 503 force_sig(SIGSEGV); 504 goto out; 505 } 506 507 asmlinkage void noinstr do_watch(struct pt_regs *regs) 508 { 509 pr_warn("Hardware watch point handler not implemented!\n"); 510 } 511 512 asmlinkage void noinstr do_ri(struct pt_regs *regs) 513 { 514 int status = SIGILL; 515 unsigned int opcode = 0; 516 unsigned int __user *era = (unsigned int __user *)exception_era(regs); 517 irqentry_state_t state = irqentry_enter(regs); 518 519 local_irq_enable(); 520 current->thread.trap_nr = read_csr_excode(); 521 522 if (notify_die(DIE_RI, "RI Fault", regs, 0, current->thread.trap_nr, 523 SIGILL) == NOTIFY_STOP) 524 goto out; 525 526 die_if_kernel("Reserved instruction in kernel code", regs); 527 528 if (unlikely(get_user(opcode, era) < 0)) { 529 status = SIGSEGV; 530 current->thread.error_code = 1; 531 } 532 533 force_sig(status); 534 535 out: 536 local_irq_disable(); 537 irqentry_exit(regs, state); 538 } 539 540 static void init_restore_fp(void) 541 { 542 if (!used_math()) { 543 /* First time FP context user. */ 544 init_fpu(); 545 } else { 546 /* This task has formerly used the FP context */ 547 if (!is_fpu_owner()) 548 own_fpu_inatomic(1); 549 } 550 551 BUG_ON(!is_fp_enabled()); 552 } 553 554 asmlinkage void noinstr do_fpu(struct pt_regs *regs) 555 { 556 irqentry_state_t state = irqentry_enter(regs); 557 558 local_irq_enable(); 559 die_if_kernel("do_fpu invoked from kernel context!", regs); 560 561 preempt_disable(); 562 init_restore_fp(); 563 preempt_enable(); 564 565 local_irq_disable(); 566 irqentry_exit(regs, state); 567 } 568 569 asmlinkage void noinstr do_lsx(struct pt_regs *regs) 570 { 571 irqentry_state_t state = irqentry_enter(regs); 572 573 local_irq_enable(); 574 force_sig(SIGILL); 575 local_irq_disable(); 576 577 irqentry_exit(regs, state); 578 } 579 580 asmlinkage void noinstr do_lasx(struct pt_regs *regs) 581 { 582 irqentry_state_t state = irqentry_enter(regs); 583 584 local_irq_enable(); 585 force_sig(SIGILL); 586 local_irq_disable(); 587 588 irqentry_exit(regs, state); 589 } 590 591 asmlinkage void noinstr do_lbt(struct pt_regs *regs) 592 { 593 irqentry_state_t state = irqentry_enter(regs); 594 595 local_irq_enable(); 596 force_sig(SIGILL); 597 local_irq_disable(); 598 599 irqentry_exit(regs, state); 600 } 601 602 asmlinkage void noinstr do_reserved(struct pt_regs *regs) 603 { 604 irqentry_state_t state = irqentry_enter(regs); 605 606 local_irq_enable(); 607 /* 608 * Game over - no way to handle this if it ever occurs. Most probably 609 * caused by a fatal error after another hardware/software error. 610 */ 611 pr_err("Caught reserved exception %u on pid:%d [%s] - should not happen\n", 612 read_csr_excode(), current->pid, current->comm); 613 die_if_kernel("do_reserved exception", regs); 614 force_sig(SIGUNUSED); 615 616 local_irq_disable(); 617 618 irqentry_exit(regs, state); 619 } 620 621 asmlinkage void cache_parity_error(void) 622 { 623 /* For the moment, report the problem and hang. */ 624 pr_err("Cache error exception:\n"); 625 pr_err("csr_merrctl == %08x\n", csr_read32(LOONGARCH_CSR_MERRCTL)); 626 pr_err("csr_merrera == %016llx\n", csr_read64(LOONGARCH_CSR_MERRERA)); 627 panic("Can't handle the cache error!"); 628 } 629 630 asmlinkage void noinstr handle_loongarch_irq(struct pt_regs *regs) 631 { 632 struct pt_regs *old_regs; 633 634 irq_enter_rcu(); 635 old_regs = set_irq_regs(regs); 636 handle_arch_irq(regs); 637 set_irq_regs(old_regs); 638 irq_exit_rcu(); 639 } 640 641 asmlinkage void noinstr do_vint(struct pt_regs *regs, unsigned long sp) 642 { 643 register int cpu; 644 register unsigned long stack; 645 irqentry_state_t state = irqentry_enter(regs); 646 647 cpu = smp_processor_id(); 648 649 if (on_irq_stack(cpu, sp)) 650 handle_loongarch_irq(regs); 651 else { 652 stack = per_cpu(irq_stack, cpu) + IRQ_STACK_START; 653 654 /* Save task's sp on IRQ stack for unwinding */ 655 *(unsigned long *)stack = sp; 656 657 __asm__ __volatile__( 658 "move $s0, $sp \n" /* Preserve sp */ 659 "move $sp, %[stk] \n" /* Switch stack */ 660 "move $a0, %[regs] \n" 661 "bl handle_loongarch_irq \n" 662 "move $sp, $s0 \n" /* Restore sp */ 663 : /* No outputs */ 664 : [stk] "r" (stack), [regs] "r" (regs) 665 : "$a0", "$a1", "$a2", "$a3", "$a4", "$a5", "$a6", "$a7", "$s0", 666 "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", "$t8", 667 "memory"); 668 } 669 670 irqentry_exit(regs, state); 671 } 672 673 unsigned long eentry; 674 unsigned long tlbrentry; 675 676 long exception_handlers[VECSIZE * 128 / sizeof(long)] __aligned(SZ_64K); 677 678 static void configure_exception_vector(void) 679 { 680 eentry = (unsigned long)exception_handlers; 681 tlbrentry = (unsigned long)exception_handlers + 80*VECSIZE; 682 683 csr_write64(eentry, LOONGARCH_CSR_EENTRY); 684 csr_write64(eentry, LOONGARCH_CSR_MERRENTRY); 685 csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY); 686 } 687 688 void per_cpu_trap_init(int cpu) 689 { 690 unsigned int i; 691 692 setup_vint_size(VECSIZE); 693 694 configure_exception_vector(); 695 696 if (!cpu_data[cpu].asid_cache) 697 cpu_data[cpu].asid_cache = asid_first_version(cpu); 698 699 mmgrab(&init_mm); 700 current->active_mm = &init_mm; 701 BUG_ON(current->mm); 702 enter_lazy_tlb(&init_mm, current); 703 704 /* Initialise exception handlers */ 705 if (cpu == 0) 706 for (i = 0; i < 64; i++) 707 set_handler(i * VECSIZE, handle_reserved, VECSIZE); 708 709 tlb_init(cpu); 710 cpu_cache_init(); 711 } 712 713 /* Install CPU exception handler */ 714 void set_handler(unsigned long offset, void *addr, unsigned long size) 715 { 716 memcpy((void *)(eentry + offset), addr, size); 717 local_flush_icache_range(eentry + offset, eentry + offset + size); 718 } 719 720 static const char panic_null_cerr[] = 721 "Trying to set NULL cache error exception handler\n"; 722 723 /* 724 * Install uncached CPU exception handler. 725 * This is suitable only for the cache error exception which is the only 726 * exception handler that is being run uncached. 727 */ 728 void set_merr_handler(unsigned long offset, void *addr, unsigned long size) 729 { 730 unsigned long uncached_eentry = TO_UNCACHE(__pa(eentry)); 731 732 if (!addr) 733 panic(panic_null_cerr); 734 735 memcpy((void *)(uncached_eentry + offset), addr, size); 736 } 737 738 void __init trap_init(void) 739 { 740 long i; 741 742 /* Set interrupt vector handler */ 743 for (i = EXCCODE_INT_START; i < EXCCODE_INT_END; i++) 744 set_handler(i * VECSIZE, handle_vint, VECSIZE); 745 746 set_handler(EXCCODE_ADE * VECSIZE, handle_ade, VECSIZE); 747 set_handler(EXCCODE_ALE * VECSIZE, handle_ale, VECSIZE); 748 set_handler(EXCCODE_SYS * VECSIZE, handle_sys, VECSIZE); 749 set_handler(EXCCODE_BP * VECSIZE, handle_bp, VECSIZE); 750 set_handler(EXCCODE_INE * VECSIZE, handle_ri, VECSIZE); 751 set_handler(EXCCODE_IPE * VECSIZE, handle_ri, VECSIZE); 752 set_handler(EXCCODE_FPDIS * VECSIZE, handle_fpu, VECSIZE); 753 set_handler(EXCCODE_LSXDIS * VECSIZE, handle_lsx, VECSIZE); 754 set_handler(EXCCODE_LASXDIS * VECSIZE, handle_lasx, VECSIZE); 755 set_handler(EXCCODE_FPE * VECSIZE, handle_fpe, VECSIZE); 756 set_handler(EXCCODE_BTDIS * VECSIZE, handle_lbt, VECSIZE); 757 set_handler(EXCCODE_WATCH * VECSIZE, handle_watch, VECSIZE); 758 759 cache_error_setup(); 760 761 local_flush_icache_range(eentry, eentry + 0x400); 762 } 763