1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited 4 */ 5 #ifndef _ASM_IO_H 6 #define _ASM_IO_H 7 8 #define ARCH_HAS_IOREMAP_WC 9 10 #include <linux/kernel.h> 11 #include <linux/types.h> 12 13 #include <asm/addrspace.h> 14 #include <asm/cpu.h> 15 #include <asm/page.h> 16 #include <asm/pgtable-bits.h> 17 #include <asm/string.h> 18 19 /* 20 * Change "struct page" to physical address. 21 */ 22 #define page_to_phys(page) ((phys_addr_t)page_to_pfn(page) << PAGE_SHIFT) 23 24 extern void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size); 25 extern void __init early_iounmap(void __iomem *addr, unsigned long size); 26 27 #define early_memremap early_ioremap 28 #define early_memunmap early_iounmap 29 30 static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size, 31 unsigned long prot_val) 32 { 33 if (prot_val == _CACHE_CC) 34 return (void __iomem *)(unsigned long)(CACHE_BASE + offset); 35 else 36 return (void __iomem *)(unsigned long)(UNCACHE_BASE + offset); 37 } 38 39 /* 40 * ioremap - map bus memory into CPU space 41 * @offset: bus address of the memory 42 * @size: size of the resource to map 43 * 44 * ioremap performs a platform specific sequence of operations to 45 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 46 * writew/writel functions and the other mmio helpers. The returned 47 * address is not guaranteed to be usable directly as a virtual 48 * address. 49 */ 50 #define ioremap(offset, size) \ 51 ioremap_prot((offset), (size), _CACHE_SUC) 52 53 /* 54 * ioremap_wc - map bus memory into CPU space 55 * @offset: bus address of the memory 56 * @size: size of the resource to map 57 * 58 * ioremap_wc performs a platform specific sequence of operations to 59 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 60 * writew/writel functions and the other mmio helpers. The returned 61 * address is not guaranteed to be usable directly as a virtual 62 * address. 63 * 64 * This version of ioremap ensures that the memory is marked uncachable 65 * but accelerated by means of write-combining feature. It is specifically 66 * useful for PCIe prefetchable windows, which may vastly improve a 67 * communications performance. If it was determined on boot stage, what 68 * CPU CCA doesn't support WUC, the method shall fall-back to the 69 * _CACHE_SUC option (see cpu_probe() method). 70 */ 71 #define ioremap_wc(offset, size) \ 72 ioremap_prot((offset), (size), _CACHE_WUC) 73 74 /* 75 * ioremap_cache - map bus memory into CPU space 76 * @offset: bus address of the memory 77 * @size: size of the resource to map 78 * 79 * ioremap_cache performs a platform specific sequence of operations to 80 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 81 * writew/writel functions and the other mmio helpers. The returned 82 * address is not guaranteed to be usable directly as a virtual 83 * address. 84 * 85 * This version of ioremap ensures that the memory is marked cachable by 86 * the CPU. Also enables full write-combining. Useful for some 87 * memory-like regions on I/O busses. 88 */ 89 #define ioremap_cache(offset, size) \ 90 ioremap_prot((offset), (size), _CACHE_CC) 91 92 static inline void iounmap(const volatile void __iomem *addr) 93 { 94 } 95 96 #define mmiowb() asm volatile ("dbar 0" ::: "memory") 97 98 /* 99 * String version of I/O memory access operations. 100 */ 101 extern void __memset_io(volatile void __iomem *dst, int c, size_t count); 102 extern void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count); 103 extern void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count); 104 #define memset_io(c, v, l) __memset_io((c), (v), (l)) 105 #define memcpy_fromio(a, c, l) __memcpy_fromio((a), (c), (l)) 106 #define memcpy_toio(c, a, l) __memcpy_toio((c), (a), (l)) 107 108 #include <asm-generic/io.h> 109 110 #endif /* _ASM_IO_H */ 111