xref: /openbmc/linux/arch/loongarch/include/asm/cache.h (revision 09cfefb7)
1*09cfefb7SHuacai Chen /* SPDX-License-Identifier: GPL-2.0 */
2*09cfefb7SHuacai Chen /*
3*09cfefb7SHuacai Chen  * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4*09cfefb7SHuacai Chen  */
5*09cfefb7SHuacai Chen #ifndef _ASM_CACHE_H
6*09cfefb7SHuacai Chen #define _ASM_CACHE_H
7*09cfefb7SHuacai Chen 
8*09cfefb7SHuacai Chen #define L1_CACHE_SHIFT		CONFIG_L1_CACHE_SHIFT
9*09cfefb7SHuacai Chen #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
10*09cfefb7SHuacai Chen 
11*09cfefb7SHuacai Chen #define __read_mostly __section(".data..read_mostly")
12*09cfefb7SHuacai Chen 
13*09cfefb7SHuacai Chen #endif /* _ASM_CACHE_H */
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