1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Exceptions for specific devices. Usually work-arounds for fatal design flaws. 4 * Derived from fixup.c of i386 tree. 5 */ 6 7 #include <linux/pci.h> 8 #include <linux/init.h> 9 #include <linux/vgaarb.h> 10 #include <linux/screen_info.h> 11 12 #include <asm/machvec.h> 13 14 /* 15 * Fixup to mark boot BIOS video selected by BIOS before it changes 16 * 17 * From information provided by "Jon Smirl" <jonsmirl@gmail.com> 18 * 19 * The standard boot ROM sequence for an x86 machine uses the BIOS 20 * to select an initial video card for boot display. This boot video 21 * card will have its BIOS copied to 0xC0000 in system RAM. 22 * IORESOURCE_ROM_SHADOW is used to associate the boot video 23 * card with this copy. On laptops this copy has to be used since 24 * the main ROM may be compressed or combined with another image. 25 * See pci_map_rom() for use of this flag. Before marking the device 26 * with IORESOURCE_ROM_SHADOW check if a vga_default_device is already set 27 * by either arch code or vga-arbitration; if so only apply the fixup to this 28 * already-determined primary video card. 29 */ 30 31 static void pci_fixup_video(struct pci_dev *pdev) 32 { 33 struct pci_dev *bridge; 34 struct pci_bus *bus; 35 u16 config; 36 struct resource *res; 37 38 if ((strcmp(ia64_platform_name, "dig") != 0) 39 && (strcmp(ia64_platform_name, "hpzx1") != 0)) 40 return; 41 /* Maybe, this machine supports legacy memory map. */ 42 43 /* Is VGA routed to us? */ 44 bus = pdev->bus; 45 while (bus) { 46 bridge = bus->self; 47 48 /* 49 * From information provided by 50 * "David Miller" <davem@davemloft.net> 51 * The bridge control register is valid for PCI header 52 * type BRIDGE, or CARDBUS. Host to PCI controllers use 53 * PCI header type NORMAL. 54 */ 55 if (bridge && (pci_is_bridge(bridge))) { 56 pci_read_config_word(bridge, PCI_BRIDGE_CONTROL, 57 &config); 58 if (!(config & PCI_BRIDGE_CTL_VGA)) 59 return; 60 } 61 bus = bus->parent; 62 } 63 if (!vga_default_device() || pdev == vga_default_device()) { 64 pci_read_config_word(pdev, PCI_COMMAND, &config); 65 if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) { 66 res = &pdev->resource[PCI_ROM_RESOURCE]; 67 68 pci_disable_rom(pdev); 69 if (res->parent) 70 release_resource(res); 71 72 res->start = 0xC0000; 73 res->end = res->start + 0x20000 - 1; 74 res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW | 75 IORESOURCE_PCI_FIXED; 76 dev_info(&pdev->dev, "Video device with shadowed ROM at %pR\n", 77 res); 78 } 79 } 80 } 81 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID, 82 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video); 83