11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * TLB support routines. 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co 51da177e4SLinus Torvalds * David Mosberger-Tang <davidm@hpl.hp.com> 61da177e4SLinus Torvalds * 71da177e4SLinus Torvalds * 08/02/00 A. Mallick <asit.k.mallick@intel.com> 81da177e4SLinus Torvalds * Modified RID allocation for SMP 91da177e4SLinus Torvalds * Goutham Rao <goutham.rao@intel.com> 101da177e4SLinus Torvalds * IPI based ptc implementation and A-step IPI implementation. 11dcc17d1bSPeter Keilty * Rohit Seth <rohit.seth@intel.com> 12dcc17d1bSPeter Keilty * Ken Chen <kenneth.w.chen@intel.com> 13aec103bfSde Dinechin, Christophe (Integrity VM) * Christophe de Dinechin <ddd@hp.com>: Avoid ptc.e on memory allocation 142046b94eSFenghua Yu * Copyright (C) 2007 Intel Corp 152046b94eSFenghua Yu * Fenghua Yu <fenghua.yu@intel.com> 162046b94eSFenghua Yu * Add multiple ptc.g/ptc.ga instruction support in global tlb purge. 171da177e4SLinus Torvalds */ 181da177e4SLinus Torvalds #include <linux/module.h> 191da177e4SLinus Torvalds #include <linux/init.h> 201da177e4SLinus Torvalds #include <linux/kernel.h> 211da177e4SLinus Torvalds #include <linux/sched.h> 221da177e4SLinus Torvalds #include <linux/smp.h> 231da177e4SLinus Torvalds #include <linux/mm.h> 24dcc17d1bSPeter Keilty #include <linux/bootmem.h> 251da177e4SLinus Torvalds 261da177e4SLinus Torvalds #include <asm/delay.h> 271da177e4SLinus Torvalds #include <asm/mmu_context.h> 281da177e4SLinus Torvalds #include <asm/pgalloc.h> 291da177e4SLinus Torvalds #include <asm/pal.h> 301da177e4SLinus Torvalds #include <asm/tlbflush.h> 31dcc17d1bSPeter Keilty #include <asm/dma.h> 3296651896SXiantao Zhang #include <asm/processor.h> 332046b94eSFenghua Yu #include <asm/sal.h> 3496651896SXiantao Zhang #include <asm/tlb.h> 351da177e4SLinus Torvalds 361da177e4SLinus Torvalds static struct { 37e088a4adSMatthew Wilcox u64 mask; /* mask of supported purge page-sizes */ 3858cd9082SChen, Kenneth W unsigned long max_bits; /* log2 of largest supported purge page-size */ 391da177e4SLinus Torvalds } purge; 401da177e4SLinus Torvalds 411da177e4SLinus Torvalds struct ia64_ctx ia64_ctx = { 428737d595SMilind Arun Choudhary .lock = __SPIN_LOCK_UNLOCKED(ia64_ctx.lock), 431da177e4SLinus Torvalds .next = 1, 441da177e4SLinus Torvalds .max_ctx = ~0U 451da177e4SLinus Torvalds }; 461da177e4SLinus Torvalds 471da177e4SLinus Torvalds DEFINE_PER_CPU(u8, ia64_need_tlb_flush); 4896651896SXiantao Zhang DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/ 4996651896SXiantao Zhang DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/ 5096651896SXiantao Zhang 5196651896SXiantao Zhang struct ia64_tr_entry __per_cpu_idtrs[NR_CPUS][2][IA64_TR_ALLOC_MAX]; 521da177e4SLinus Torvalds 531da177e4SLinus Torvalds /* 54dcc17d1bSPeter Keilty * Initializes the ia64_ctx.bitmap array based on max_ctx+1. 55dcc17d1bSPeter Keilty * Called after cpu_init() has setup ia64_ctx.max_ctx based on 56dcc17d1bSPeter Keilty * maximum RID that is supported by boot CPU. 57dcc17d1bSPeter Keilty */ 58dcc17d1bSPeter Keilty void __init 59dcc17d1bSPeter Keilty mmu_context_init (void) 60dcc17d1bSPeter Keilty { 61dcc17d1bSPeter Keilty ia64_ctx.bitmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3); 62dcc17d1bSPeter Keilty ia64_ctx.flushmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3); 63dcc17d1bSPeter Keilty } 64dcc17d1bSPeter Keilty 65dcc17d1bSPeter Keilty /* 661da177e4SLinus Torvalds * Acquire the ia64_ctx.lock before calling this function! 671da177e4SLinus Torvalds */ 681da177e4SLinus Torvalds void 691da177e4SLinus Torvalds wrap_mmu_context (struct mm_struct *mm) 701da177e4SLinus Torvalds { 7158cd9082SChen, Kenneth W int i, cpu; 72dcc17d1bSPeter Keilty unsigned long flush_bit; 731da177e4SLinus Torvalds 74dcc17d1bSPeter Keilty for (i=0; i <= ia64_ctx.max_ctx / BITS_PER_LONG; i++) { 75dcc17d1bSPeter Keilty flush_bit = xchg(&ia64_ctx.flushmap[i], 0); 76dcc17d1bSPeter Keilty ia64_ctx.bitmap[i] ^= flush_bit; 77dcc17d1bSPeter Keilty } 781da177e4SLinus Torvalds 79dcc17d1bSPeter Keilty /* use offset at 300 to skip daemons */ 80dcc17d1bSPeter Keilty ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap, 81dcc17d1bSPeter Keilty ia64_ctx.max_ctx, 300); 82dcc17d1bSPeter Keilty ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap, 83dcc17d1bSPeter Keilty ia64_ctx.max_ctx, ia64_ctx.next); 841da177e4SLinus Torvalds 8558cd9082SChen, Kenneth W /* 8658cd9082SChen, Kenneth W * can't call flush_tlb_all() here because of race condition 8758cd9082SChen, Kenneth W * with O(1) scheduler [EF] 8858cd9082SChen, Kenneth W */ 8958cd9082SChen, Kenneth W cpu = get_cpu(); /* prevent preemption/migration */ 9058cd9082SChen, Kenneth W for_each_online_cpu(i) 91dc565b52Shawkes@sgi.com if (i != cpu) 921da177e4SLinus Torvalds per_cpu(ia64_need_tlb_flush, i) = 1; 931da177e4SLinus Torvalds put_cpu(); 941da177e4SLinus Torvalds local_flush_tlb_all(); 951da177e4SLinus Torvalds } 961da177e4SLinus Torvalds 972046b94eSFenghua Yu /* 982046b94eSFenghua Yu * Implement "spinaphores" ... like counting semaphores, but they 992046b94eSFenghua Yu * spin instead of sleeping. If there are ever any other users for 1002046b94eSFenghua Yu * this primitive it can be moved up to a spinaphore.h header. 1012046b94eSFenghua Yu */ 1022046b94eSFenghua Yu struct spinaphore { 1032046b94eSFenghua Yu atomic_t cur; 1042046b94eSFenghua Yu }; 1052046b94eSFenghua Yu 1062046b94eSFenghua Yu static inline void spinaphore_init(struct spinaphore *ss, int val) 1072046b94eSFenghua Yu { 1082046b94eSFenghua Yu atomic_set(&ss->cur, val); 1092046b94eSFenghua Yu } 1102046b94eSFenghua Yu 1112046b94eSFenghua Yu static inline void down_spin(struct spinaphore *ss) 1122046b94eSFenghua Yu { 1132046b94eSFenghua Yu while (unlikely(!atomic_add_unless(&ss->cur, -1, 0))) 1142046b94eSFenghua Yu while (atomic_read(&ss->cur) == 0) 1152046b94eSFenghua Yu cpu_relax(); 1162046b94eSFenghua Yu } 1172046b94eSFenghua Yu 1182046b94eSFenghua Yu static inline void up_spin(struct spinaphore *ss) 1192046b94eSFenghua Yu { 1202046b94eSFenghua Yu atomic_add(1, &ss->cur); 1212046b94eSFenghua Yu } 1222046b94eSFenghua Yu 1232046b94eSFenghua Yu static struct spinaphore ptcg_sem; 1242046b94eSFenghua Yu static u16 nptcg = 1; 1252046b94eSFenghua Yu static int need_ptcg_sem = 1; 1262046b94eSFenghua Yu static int toolatetochangeptcgsem = 0; 1272046b94eSFenghua Yu 1282046b94eSFenghua Yu /* 129a6c75b86SFenghua Yu * Kernel parameter "nptcg=" overrides max number of concurrent global TLB 130a6c75b86SFenghua Yu * purges which is reported from either PAL or SAL PALO. 131a6c75b86SFenghua Yu * 132a6c75b86SFenghua Yu * We don't have sanity checking for nptcg value. It's the user's responsibility 133a6c75b86SFenghua Yu * for valid nptcg value on the platform. Otherwise, kernel may hang in some 134a6c75b86SFenghua Yu * cases. 135a6c75b86SFenghua Yu */ 136a6c75b86SFenghua Yu static int __init 137a6c75b86SFenghua Yu set_nptcg(char *str) 138a6c75b86SFenghua Yu { 139a6c75b86SFenghua Yu int value = 0; 140a6c75b86SFenghua Yu 141a6c75b86SFenghua Yu get_option(&str, &value); 142a6c75b86SFenghua Yu setup_ptcg_sem(value, NPTCG_FROM_KERNEL_PARAMETER); 143a6c75b86SFenghua Yu 144a6c75b86SFenghua Yu return 1; 145a6c75b86SFenghua Yu } 146a6c75b86SFenghua Yu 147a6c75b86SFenghua Yu __setup("nptcg=", set_nptcg); 148a6c75b86SFenghua Yu 149a6c75b86SFenghua Yu /* 1502046b94eSFenghua Yu * Maximum number of simultaneous ptc.g purges in the system can 1512046b94eSFenghua Yu * be defined by PAL_VM_SUMMARY (in which case we should take 1522046b94eSFenghua Yu * the smallest value for any cpu in the system) or by the PAL 1532046b94eSFenghua Yu * override table (in which case we should ignore the value from 1542046b94eSFenghua Yu * PAL_VM_SUMMARY). 1552046b94eSFenghua Yu * 156a6c75b86SFenghua Yu * Kernel parameter "nptcg=" overrides maximum number of simultanesous ptc.g 157a6c75b86SFenghua Yu * purges defined in either PAL_VM_SUMMARY or PAL override table. In this case, 158a6c75b86SFenghua Yu * we should ignore the value from either PAL_VM_SUMMARY or PAL override table. 159a6c75b86SFenghua Yu * 1602046b94eSFenghua Yu * Complicating the logic here is the fact that num_possible_cpus() 1612046b94eSFenghua Yu * isn't fully setup until we start bringing cpus online. 1622046b94eSFenghua Yu */ 1632046b94eSFenghua Yu void 164a6c75b86SFenghua Yu setup_ptcg_sem(int max_purges, int nptcg_from) 1652046b94eSFenghua Yu { 166a6c75b86SFenghua Yu static int kp_override; 167a6c75b86SFenghua Yu static int palo_override; 1682046b94eSFenghua Yu static int firstcpu = 1; 1692046b94eSFenghua Yu 1702046b94eSFenghua Yu if (toolatetochangeptcgsem) { 171e617fce6SHidetoshi Seto if (nptcg_from == NPTCG_FROM_PAL && max_purges == 0) 172e617fce6SHidetoshi Seto BUG_ON(1 < nptcg); 173e617fce6SHidetoshi Seto else 1742046b94eSFenghua Yu BUG_ON(max_purges < nptcg); 1752046b94eSFenghua Yu return; 1762046b94eSFenghua Yu } 1772046b94eSFenghua Yu 178a6c75b86SFenghua Yu if (nptcg_from == NPTCG_FROM_KERNEL_PARAMETER) { 179a6c75b86SFenghua Yu kp_override = 1; 180a6c75b86SFenghua Yu nptcg = max_purges; 181a6c75b86SFenghua Yu goto resetsema; 182a6c75b86SFenghua Yu } 183a6c75b86SFenghua Yu if (kp_override) { 184a6c75b86SFenghua Yu need_ptcg_sem = num_possible_cpus() > nptcg; 185a6c75b86SFenghua Yu return; 186a6c75b86SFenghua Yu } 187a6c75b86SFenghua Yu 188a6c75b86SFenghua Yu if (nptcg_from == NPTCG_FROM_PALO) { 189a6c75b86SFenghua Yu palo_override = 1; 1902046b94eSFenghua Yu 1912046b94eSFenghua Yu /* In PALO max_purges == 0 really means it! */ 1922046b94eSFenghua Yu if (max_purges == 0) 1932046b94eSFenghua Yu panic("Whoa! Platform does not support global TLB purges.\n"); 1942046b94eSFenghua Yu nptcg = max_purges; 1952046b94eSFenghua Yu if (nptcg == PALO_MAX_TLB_PURGES) { 1962046b94eSFenghua Yu need_ptcg_sem = 0; 1972046b94eSFenghua Yu return; 1982046b94eSFenghua Yu } 1992046b94eSFenghua Yu goto resetsema; 2002046b94eSFenghua Yu } 201a6c75b86SFenghua Yu if (palo_override) { 2022046b94eSFenghua Yu if (nptcg != PALO_MAX_TLB_PURGES) 2032046b94eSFenghua Yu need_ptcg_sem = (num_possible_cpus() > nptcg); 2042046b94eSFenghua Yu return; 2052046b94eSFenghua Yu } 2062046b94eSFenghua Yu 2072046b94eSFenghua Yu /* In PAL_VM_SUMMARY max_purges == 0 actually means 1 */ 2082046b94eSFenghua Yu if (max_purges == 0) max_purges = 1; 2092046b94eSFenghua Yu 2102046b94eSFenghua Yu if (firstcpu) { 2112046b94eSFenghua Yu nptcg = max_purges; 2122046b94eSFenghua Yu firstcpu = 0; 2132046b94eSFenghua Yu } 2142046b94eSFenghua Yu if (max_purges < nptcg) 2152046b94eSFenghua Yu nptcg = max_purges; 2162046b94eSFenghua Yu if (nptcg == PAL_MAX_PURGES) { 2172046b94eSFenghua Yu need_ptcg_sem = 0; 2182046b94eSFenghua Yu return; 2192046b94eSFenghua Yu } else 2202046b94eSFenghua Yu need_ptcg_sem = (num_possible_cpus() > nptcg); 2212046b94eSFenghua Yu 2222046b94eSFenghua Yu resetsema: 2232046b94eSFenghua Yu spinaphore_init(&ptcg_sem, max_purges); 2242046b94eSFenghua Yu } 2252046b94eSFenghua Yu 2261da177e4SLinus Torvalds void 22758cd9082SChen, Kenneth W ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, 22858cd9082SChen, Kenneth W unsigned long end, unsigned long nbits) 2291da177e4SLinus Torvalds { 230aec103bfSde Dinechin, Christophe (Integrity VM) struct mm_struct *active_mm = current->active_mm; 231aec103bfSde Dinechin, Christophe (Integrity VM) 2322046b94eSFenghua Yu toolatetochangeptcgsem = 1; 2332046b94eSFenghua Yu 234aec103bfSde Dinechin, Christophe (Integrity VM) if (mm != active_mm) { 235aec103bfSde Dinechin, Christophe (Integrity VM) /* Restore region IDs for mm */ 236aec103bfSde Dinechin, Christophe (Integrity VM) if (mm && active_mm) { 237aec103bfSde Dinechin, Christophe (Integrity VM) activate_context(mm); 238aec103bfSde Dinechin, Christophe (Integrity VM) } else { 239c1902aaeSDean Roe flush_tlb_all(); 240c1902aaeSDean Roe return; 241c1902aaeSDean Roe } 242aec103bfSde Dinechin, Christophe (Integrity VM) } 243c1902aaeSDean Roe 2442046b94eSFenghua Yu if (need_ptcg_sem) 2452046b94eSFenghua Yu down_spin(&ptcg_sem); 2462046b94eSFenghua Yu 2471da177e4SLinus Torvalds do { 2481da177e4SLinus Torvalds /* 2491da177e4SLinus Torvalds * Flush ALAT entries also. 2501da177e4SLinus Torvalds */ 2511da177e4SLinus Torvalds ia64_ptcga(start, (nbits << 2)); 2521da177e4SLinus Torvalds ia64_srlz_i(); 2531da177e4SLinus Torvalds start += (1UL << nbits); 2541da177e4SLinus Torvalds } while (start < end); 2552046b94eSFenghua Yu 2562046b94eSFenghua Yu if (need_ptcg_sem) 2572046b94eSFenghua Yu up_spin(&ptcg_sem); 258aec103bfSde Dinechin, Christophe (Integrity VM) 259aec103bfSde Dinechin, Christophe (Integrity VM) if (mm != active_mm) { 260aec103bfSde Dinechin, Christophe (Integrity VM) activate_context(active_mm); 261aec103bfSde Dinechin, Christophe (Integrity VM) } 2621da177e4SLinus Torvalds } 2631da177e4SLinus Torvalds 2641da177e4SLinus Torvalds void 2651da177e4SLinus Torvalds local_flush_tlb_all (void) 2661da177e4SLinus Torvalds { 2671da177e4SLinus Torvalds unsigned long i, j, flags, count0, count1, stride0, stride1, addr; 2681da177e4SLinus Torvalds 2691da177e4SLinus Torvalds addr = local_cpu_data->ptce_base; 2701da177e4SLinus Torvalds count0 = local_cpu_data->ptce_count[0]; 2711da177e4SLinus Torvalds count1 = local_cpu_data->ptce_count[1]; 2721da177e4SLinus Torvalds stride0 = local_cpu_data->ptce_stride[0]; 2731da177e4SLinus Torvalds stride1 = local_cpu_data->ptce_stride[1]; 2741da177e4SLinus Torvalds 2751da177e4SLinus Torvalds local_irq_save(flags); 2761da177e4SLinus Torvalds for (i = 0; i < count0; ++i) { 2771da177e4SLinus Torvalds for (j = 0; j < count1; ++j) { 2781da177e4SLinus Torvalds ia64_ptce(addr); 2791da177e4SLinus Torvalds addr += stride1; 2801da177e4SLinus Torvalds } 2811da177e4SLinus Torvalds addr += stride0; 2821da177e4SLinus Torvalds } 2831da177e4SLinus Torvalds local_irq_restore(flags); 2841da177e4SLinus Torvalds ia64_srlz_i(); /* srlz.i implies srlz.d */ 2851da177e4SLinus Torvalds } 2861da177e4SLinus Torvalds 2871da177e4SLinus Torvalds void 28858cd9082SChen, Kenneth W flush_tlb_range (struct vm_area_struct *vma, unsigned long start, 28958cd9082SChen, Kenneth W unsigned long end) 2901da177e4SLinus Torvalds { 2911da177e4SLinus Torvalds struct mm_struct *mm = vma->vm_mm; 2921da177e4SLinus Torvalds unsigned long size = end - start; 2931da177e4SLinus Torvalds unsigned long nbits; 2941da177e4SLinus Torvalds 295c1902aaeSDean Roe #ifndef CONFIG_SMP 2961da177e4SLinus Torvalds if (mm != current->active_mm) { 2971da177e4SLinus Torvalds mm->context = 0; 2981da177e4SLinus Torvalds return; 2991da177e4SLinus Torvalds } 300c1902aaeSDean Roe #endif 3011da177e4SLinus Torvalds 3021da177e4SLinus Torvalds nbits = ia64_fls(size + 0xfff); 30358cd9082SChen, Kenneth W while (unlikely (((1UL << nbits) & purge.mask) == 0) && 30458cd9082SChen, Kenneth W (nbits < purge.max_bits)) 3051da177e4SLinus Torvalds ++nbits; 3061da177e4SLinus Torvalds if (nbits > purge.max_bits) 3071da177e4SLinus Torvalds nbits = purge.max_bits; 3081da177e4SLinus Torvalds start &= ~((1UL << nbits) - 1); 3091da177e4SLinus Torvalds 310663b97f7SHugh Dickins preempt_disable(); 311ce9eed5aSChen, Kenneth W #ifdef CONFIG_SMP 3125d8c39f6SRusty Russell if (mm != current->active_mm || cpumask_weight(mm_cpumask(mm)) != 1) { 313ce9eed5aSChen, Kenneth W platform_global_tlb_purge(mm, start, end, nbits); 314ce9eed5aSChen, Kenneth W preempt_enable(); 315ce9eed5aSChen, Kenneth W return; 316ce9eed5aSChen, Kenneth W } 317ce9eed5aSChen, Kenneth W #endif 3181da177e4SLinus Torvalds do { 3191da177e4SLinus Torvalds ia64_ptcl(start, (nbits<<2)); 3201da177e4SLinus Torvalds start += (1UL << nbits); 3211da177e4SLinus Torvalds } while (start < end); 322663b97f7SHugh Dickins preempt_enable(); 3231da177e4SLinus Torvalds ia64_srlz_i(); /* srlz.i implies srlz.d */ 3241da177e4SLinus Torvalds } 3251da177e4SLinus Torvalds EXPORT_SYMBOL(flush_tlb_range); 3261da177e4SLinus Torvalds 3271da177e4SLinus Torvalds void __devinit 3281da177e4SLinus Torvalds ia64_tlb_init (void) 3291da177e4SLinus Torvalds { 330256a7e09SJes Sorensen ia64_ptce_info_t uninitialized_var(ptce_info); /* GCC be quiet */ 331e088a4adSMatthew Wilcox u64 tr_pgbits; 3321da177e4SLinus Torvalds long status; 33396651896SXiantao Zhang pal_vm_info_1_u_t vm_info_1; 33496651896SXiantao Zhang pal_vm_info_2_u_t vm_info_2; 33596651896SXiantao Zhang int cpu = smp_processor_id(); 3361da177e4SLinus Torvalds 3371da177e4SLinus Torvalds if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) { 3381da177e4SLinus Torvalds printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld; " 3391da177e4SLinus Torvalds "defaulting to architected purge page-sizes.\n", status); 3401da177e4SLinus Torvalds purge.mask = 0x115557000UL; 3411da177e4SLinus Torvalds } 3421da177e4SLinus Torvalds purge.max_bits = ia64_fls(purge.mask); 3431da177e4SLinus Torvalds 3441da177e4SLinus Torvalds ia64_get_ptce(&ptce_info); 3451da177e4SLinus Torvalds local_cpu_data->ptce_base = ptce_info.base; 3461da177e4SLinus Torvalds local_cpu_data->ptce_count[0] = ptce_info.count[0]; 3471da177e4SLinus Torvalds local_cpu_data->ptce_count[1] = ptce_info.count[1]; 3481da177e4SLinus Torvalds local_cpu_data->ptce_stride[0] = ptce_info.stride[0]; 3491da177e4SLinus Torvalds local_cpu_data->ptce_stride[1] = ptce_info.stride[1]; 3501da177e4SLinus Torvalds 3511da177e4SLinus Torvalds local_flush_tlb_all(); /* nuke left overs from bootstrapping... */ 35296651896SXiantao Zhang status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2); 35396651896SXiantao Zhang 35496651896SXiantao Zhang if (status) { 35596651896SXiantao Zhang printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status); 35696651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = 8; 35796651896SXiantao Zhang return; 3581da177e4SLinus Torvalds } 35996651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = vm_info_1.pal_vm_info_1_s.max_itr_entry+1; 36096651896SXiantao Zhang if (per_cpu(ia64_tr_num, cpu) > 36196651896SXiantao Zhang (vm_info_1.pal_vm_info_1_s.max_dtr_entry+1)) 36296651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = 36396651896SXiantao Zhang vm_info_1.pal_vm_info_1_s.max_dtr_entry+1; 36496651896SXiantao Zhang if (per_cpu(ia64_tr_num, cpu) > IA64_TR_ALLOC_MAX) { 365a9894a4aSTony Luck static int justonce = 1; 36696651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = IA64_TR_ALLOC_MAX; 367a9894a4aSTony Luck if (justonce) { 368a9894a4aSTony Luck justonce = 0; 369a9894a4aSTony Luck printk(KERN_DEBUG "TR register number exceeds " 370a9894a4aSTony Luck "IA64_TR_ALLOC_MAX!\n"); 371a9894a4aSTony Luck } 37296651896SXiantao Zhang } 37396651896SXiantao Zhang } 37496651896SXiantao Zhang 37596651896SXiantao Zhang /* 37696651896SXiantao Zhang * is_tr_overlap 37796651896SXiantao Zhang * 37896651896SXiantao Zhang * Check overlap with inserted TRs. 37996651896SXiantao Zhang */ 38096651896SXiantao Zhang static int is_tr_overlap(struct ia64_tr_entry *p, u64 va, u64 log_size) 38196651896SXiantao Zhang { 38296651896SXiantao Zhang u64 tr_log_size; 38396651896SXiantao Zhang u64 tr_end; 38496651896SXiantao Zhang u64 va_rr = ia64_get_rr(va); 38596651896SXiantao Zhang u64 va_rid = RR_TO_RID(va_rr); 38696651896SXiantao Zhang u64 va_end = va + (1<<log_size) - 1; 38796651896SXiantao Zhang 38896651896SXiantao Zhang if (va_rid != RR_TO_RID(p->rr)) 38996651896SXiantao Zhang return 0; 39096651896SXiantao Zhang tr_log_size = (p->itir & 0xff) >> 2; 39196651896SXiantao Zhang tr_end = p->ifa + (1<<tr_log_size) - 1; 39296651896SXiantao Zhang 39396651896SXiantao Zhang if (va > tr_end || p->ifa > va_end) 39496651896SXiantao Zhang return 0; 39596651896SXiantao Zhang return 1; 39696651896SXiantao Zhang 39796651896SXiantao Zhang } 39896651896SXiantao Zhang 39996651896SXiantao Zhang /* 40096651896SXiantao Zhang * ia64_insert_tr in virtual mode. Allocate a TR slot 40196651896SXiantao Zhang * 40296651896SXiantao Zhang * target_mask : 0x1 : itr, 0x2 : dtr, 0x3 : idtr 40396651896SXiantao Zhang * 40496651896SXiantao Zhang * va : virtual address. 40596651896SXiantao Zhang * pte : pte entries inserted. 40696651896SXiantao Zhang * log_size: range to be covered. 40796651896SXiantao Zhang * 40896651896SXiantao Zhang * Return value: <0 : error No. 40996651896SXiantao Zhang * 41096651896SXiantao Zhang * >=0 : slot number allocated for TR. 41196651896SXiantao Zhang * Must be called with preemption disabled. 41296651896SXiantao Zhang */ 41396651896SXiantao Zhang int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) 41496651896SXiantao Zhang { 41596651896SXiantao Zhang int i, r; 41696651896SXiantao Zhang unsigned long psr; 41796651896SXiantao Zhang struct ia64_tr_entry *p; 41896651896SXiantao Zhang int cpu = smp_processor_id(); 41996651896SXiantao Zhang 42096651896SXiantao Zhang r = -EINVAL; 42196651896SXiantao Zhang /*Check overlap with existing TR entries*/ 42296651896SXiantao Zhang if (target_mask & 0x1) { 42396651896SXiantao Zhang p = &__per_cpu_idtrs[cpu][0][0]; 42496651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); 42596651896SXiantao Zhang i++, p++) { 42696651896SXiantao Zhang if (p->pte & 0x1) 42796651896SXiantao Zhang if (is_tr_overlap(p, va, log_size)) { 42896651896SXiantao Zhang printk(KERN_DEBUG "Overlapped Entry" 42996651896SXiantao Zhang "Inserted for TR Reigster!!\n"); 43096651896SXiantao Zhang goto out; 43196651896SXiantao Zhang } 43296651896SXiantao Zhang } 43396651896SXiantao Zhang } 43496651896SXiantao Zhang if (target_mask & 0x2) { 43596651896SXiantao Zhang p = &__per_cpu_idtrs[cpu][1][0]; 43696651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); 43796651896SXiantao Zhang i++, p++) { 43896651896SXiantao Zhang if (p->pte & 0x1) 43996651896SXiantao Zhang if (is_tr_overlap(p, va, log_size)) { 44096651896SXiantao Zhang printk(KERN_DEBUG "Overlapped Entry" 44196651896SXiantao Zhang "Inserted for TR Reigster!!\n"); 44296651896SXiantao Zhang goto out; 44396651896SXiantao Zhang } 44496651896SXiantao Zhang } 44596651896SXiantao Zhang } 44696651896SXiantao Zhang 44796651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) { 44896651896SXiantao Zhang switch (target_mask & 0x3) { 44996651896SXiantao Zhang case 1: 45096651896SXiantao Zhang if (!(__per_cpu_idtrs[cpu][0][i].pte & 0x1)) 45196651896SXiantao Zhang goto found; 45296651896SXiantao Zhang continue; 45396651896SXiantao Zhang case 2: 45496651896SXiantao Zhang if (!(__per_cpu_idtrs[cpu][1][i].pte & 0x1)) 45596651896SXiantao Zhang goto found; 45696651896SXiantao Zhang continue; 45796651896SXiantao Zhang case 3: 45896651896SXiantao Zhang if (!(__per_cpu_idtrs[cpu][0][i].pte & 0x1) && 45996651896SXiantao Zhang !(__per_cpu_idtrs[cpu][1][i].pte & 0x1)) 46096651896SXiantao Zhang goto found; 46196651896SXiantao Zhang continue; 46296651896SXiantao Zhang default: 46396651896SXiantao Zhang r = -EINVAL; 46496651896SXiantao Zhang goto out; 46596651896SXiantao Zhang } 46696651896SXiantao Zhang } 46796651896SXiantao Zhang found: 46896651896SXiantao Zhang if (i >= per_cpu(ia64_tr_num, cpu)) 46996651896SXiantao Zhang return -EBUSY; 47096651896SXiantao Zhang 47196651896SXiantao Zhang /*Record tr info for mca hander use!*/ 47296651896SXiantao Zhang if (i > per_cpu(ia64_tr_used, cpu)) 47396651896SXiantao Zhang per_cpu(ia64_tr_used, cpu) = i; 47496651896SXiantao Zhang 47596651896SXiantao Zhang psr = ia64_clear_ic(); 47696651896SXiantao Zhang if (target_mask & 0x1) { 47796651896SXiantao Zhang ia64_itr(0x1, i, va, pte, log_size); 47896651896SXiantao Zhang ia64_srlz_i(); 47996651896SXiantao Zhang p = &__per_cpu_idtrs[cpu][0][i]; 48096651896SXiantao Zhang p->ifa = va; 48196651896SXiantao Zhang p->pte = pte; 48296651896SXiantao Zhang p->itir = log_size << 2; 48396651896SXiantao Zhang p->rr = ia64_get_rr(va); 48496651896SXiantao Zhang } 48596651896SXiantao Zhang if (target_mask & 0x2) { 48696651896SXiantao Zhang ia64_itr(0x2, i, va, pte, log_size); 48796651896SXiantao Zhang ia64_srlz_i(); 48896651896SXiantao Zhang p = &__per_cpu_idtrs[cpu][1][i]; 48996651896SXiantao Zhang p->ifa = va; 49096651896SXiantao Zhang p->pte = pte; 49196651896SXiantao Zhang p->itir = log_size << 2; 49296651896SXiantao Zhang p->rr = ia64_get_rr(va); 49396651896SXiantao Zhang } 49496651896SXiantao Zhang ia64_set_psr(psr); 49596651896SXiantao Zhang r = i; 49696651896SXiantao Zhang out: 49796651896SXiantao Zhang return r; 49896651896SXiantao Zhang } 49996651896SXiantao Zhang EXPORT_SYMBOL_GPL(ia64_itr_entry); 50096651896SXiantao Zhang 50196651896SXiantao Zhang /* 50296651896SXiantao Zhang * ia64_purge_tr 50396651896SXiantao Zhang * 50496651896SXiantao Zhang * target_mask: 0x1: purge itr, 0x2 : purge dtr, 0x3 purge idtr. 50596651896SXiantao Zhang * slot: slot number to be freed. 50696651896SXiantao Zhang * 50796651896SXiantao Zhang * Must be called with preemption disabled. 50896651896SXiantao Zhang */ 50996651896SXiantao Zhang void ia64_ptr_entry(u64 target_mask, int slot) 51096651896SXiantao Zhang { 51196651896SXiantao Zhang int cpu = smp_processor_id(); 51296651896SXiantao Zhang int i; 51396651896SXiantao Zhang struct ia64_tr_entry *p; 51496651896SXiantao Zhang 51596651896SXiantao Zhang if (slot < IA64_TR_ALLOC_BASE || slot >= per_cpu(ia64_tr_num, cpu)) 51696651896SXiantao Zhang return; 51796651896SXiantao Zhang 51896651896SXiantao Zhang if (target_mask & 0x1) { 51996651896SXiantao Zhang p = &__per_cpu_idtrs[cpu][0][slot]; 52096651896SXiantao Zhang if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { 52196651896SXiantao Zhang p->pte = 0; 52296651896SXiantao Zhang ia64_ptr(0x1, p->ifa, p->itir>>2); 52396651896SXiantao Zhang ia64_srlz_i(); 52496651896SXiantao Zhang } 52596651896SXiantao Zhang } 52696651896SXiantao Zhang 52796651896SXiantao Zhang if (target_mask & 0x2) { 52896651896SXiantao Zhang p = &__per_cpu_idtrs[cpu][1][slot]; 52996651896SXiantao Zhang if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { 53096651896SXiantao Zhang p->pte = 0; 53196651896SXiantao Zhang ia64_ptr(0x2, p->ifa, p->itir>>2); 53296651896SXiantao Zhang ia64_srlz_i(); 53396651896SXiantao Zhang } 53496651896SXiantao Zhang } 53596651896SXiantao Zhang 53696651896SXiantao Zhang for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) { 53796651896SXiantao Zhang if ((__per_cpu_idtrs[cpu][0][i].pte & 0x1) || 53896651896SXiantao Zhang (__per_cpu_idtrs[cpu][1][i].pte & 0x1)) 53996651896SXiantao Zhang break; 54096651896SXiantao Zhang } 54196651896SXiantao Zhang per_cpu(ia64_tr_used, cpu) = i; 54296651896SXiantao Zhang } 54396651896SXiantao Zhang EXPORT_SYMBOL_GPL(ia64_ptr_entry); 544