11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * TLB support routines. 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co 51da177e4SLinus Torvalds * David Mosberger-Tang <davidm@hpl.hp.com> 61da177e4SLinus Torvalds * 71da177e4SLinus Torvalds * 08/02/00 A. Mallick <asit.k.mallick@intel.com> 81da177e4SLinus Torvalds * Modified RID allocation for SMP 91da177e4SLinus Torvalds * Goutham Rao <goutham.rao@intel.com> 101da177e4SLinus Torvalds * IPI based ptc implementation and A-step IPI implementation. 11dcc17d1bSPeter Keilty * Rohit Seth <rohit.seth@intel.com> 12dcc17d1bSPeter Keilty * Ken Chen <kenneth.w.chen@intel.com> 13aec103bfSde Dinechin, Christophe (Integrity VM) * Christophe de Dinechin <ddd@hp.com>: Avoid ptc.e on memory allocation 142046b94eSFenghua Yu * Copyright (C) 2007 Intel Corp 152046b94eSFenghua Yu * Fenghua Yu <fenghua.yu@intel.com> 162046b94eSFenghua Yu * Add multiple ptc.g/ptc.ga instruction support in global tlb purge. 171da177e4SLinus Torvalds */ 181da177e4SLinus Torvalds #include <linux/module.h> 191da177e4SLinus Torvalds #include <linux/init.h> 201da177e4SLinus Torvalds #include <linux/kernel.h> 211da177e4SLinus Torvalds #include <linux/sched.h> 221da177e4SLinus Torvalds #include <linux/smp.h> 231da177e4SLinus Torvalds #include <linux/mm.h> 24dcc17d1bSPeter Keilty #include <linux/bootmem.h> 255a0e3ad6STejun Heo #include <linux/slab.h> 261da177e4SLinus Torvalds 271da177e4SLinus Torvalds #include <asm/delay.h> 281da177e4SLinus Torvalds #include <asm/mmu_context.h> 291da177e4SLinus Torvalds #include <asm/pgalloc.h> 301da177e4SLinus Torvalds #include <asm/pal.h> 311da177e4SLinus Torvalds #include <asm/tlbflush.h> 32dcc17d1bSPeter Keilty #include <asm/dma.h> 3396651896SXiantao Zhang #include <asm/processor.h> 342046b94eSFenghua Yu #include <asm/sal.h> 3596651896SXiantao Zhang #include <asm/tlb.h> 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds static struct { 38e088a4adSMatthew Wilcox u64 mask; /* mask of supported purge page-sizes */ 3958cd9082SChen, Kenneth W unsigned long max_bits; /* log2 of largest supported purge page-size */ 401da177e4SLinus Torvalds } purge; 411da177e4SLinus Torvalds 421da177e4SLinus Torvalds struct ia64_ctx ia64_ctx = { 438737d595SMilind Arun Choudhary .lock = __SPIN_LOCK_UNLOCKED(ia64_ctx.lock), 441da177e4SLinus Torvalds .next = 1, 451da177e4SLinus Torvalds .max_ctx = ~0U 461da177e4SLinus Torvalds }; 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds DEFINE_PER_CPU(u8, ia64_need_tlb_flush); 4996651896SXiantao Zhang DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/ 5096651896SXiantao Zhang DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/ 5196651896SXiantao Zhang 526c57a332STony Luck struct ia64_tr_entry *ia64_idtrs[NR_CPUS]; 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds /* 55dcc17d1bSPeter Keilty * Initializes the ia64_ctx.bitmap array based on max_ctx+1. 56dcc17d1bSPeter Keilty * Called after cpu_init() has setup ia64_ctx.max_ctx based on 57dcc17d1bSPeter Keilty * maximum RID that is supported by boot CPU. 58dcc17d1bSPeter Keilty */ 59dcc17d1bSPeter Keilty void __init 60dcc17d1bSPeter Keilty mmu_context_init (void) 61dcc17d1bSPeter Keilty { 62dcc17d1bSPeter Keilty ia64_ctx.bitmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3); 63dcc17d1bSPeter Keilty ia64_ctx.flushmap = alloc_bootmem((ia64_ctx.max_ctx+1)>>3); 64dcc17d1bSPeter Keilty } 65dcc17d1bSPeter Keilty 66dcc17d1bSPeter Keilty /* 671da177e4SLinus Torvalds * Acquire the ia64_ctx.lock before calling this function! 681da177e4SLinus Torvalds */ 691da177e4SLinus Torvalds void 701da177e4SLinus Torvalds wrap_mmu_context (struct mm_struct *mm) 711da177e4SLinus Torvalds { 7258cd9082SChen, Kenneth W int i, cpu; 73dcc17d1bSPeter Keilty unsigned long flush_bit; 741da177e4SLinus Torvalds 75dcc17d1bSPeter Keilty for (i=0; i <= ia64_ctx.max_ctx / BITS_PER_LONG; i++) { 76dcc17d1bSPeter Keilty flush_bit = xchg(&ia64_ctx.flushmap[i], 0); 77dcc17d1bSPeter Keilty ia64_ctx.bitmap[i] ^= flush_bit; 78dcc17d1bSPeter Keilty } 791da177e4SLinus Torvalds 80dcc17d1bSPeter Keilty /* use offset at 300 to skip daemons */ 81dcc17d1bSPeter Keilty ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap, 82dcc17d1bSPeter Keilty ia64_ctx.max_ctx, 300); 83dcc17d1bSPeter Keilty ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap, 84dcc17d1bSPeter Keilty ia64_ctx.max_ctx, ia64_ctx.next); 851da177e4SLinus Torvalds 8658cd9082SChen, Kenneth W /* 8758cd9082SChen, Kenneth W * can't call flush_tlb_all() here because of race condition 8858cd9082SChen, Kenneth W * with O(1) scheduler [EF] 8958cd9082SChen, Kenneth W */ 9058cd9082SChen, Kenneth W cpu = get_cpu(); /* prevent preemption/migration */ 9158cd9082SChen, Kenneth W for_each_online_cpu(i) 92dc565b52Shawkes@sgi.com if (i != cpu) 931da177e4SLinus Torvalds per_cpu(ia64_need_tlb_flush, i) = 1; 941da177e4SLinus Torvalds put_cpu(); 951da177e4SLinus Torvalds local_flush_tlb_all(); 961da177e4SLinus Torvalds } 971da177e4SLinus Torvalds 982046b94eSFenghua Yu /* 992046b94eSFenghua Yu * Implement "spinaphores" ... like counting semaphores, but they 1002046b94eSFenghua Yu * spin instead of sleeping. If there are ever any other users for 1012046b94eSFenghua Yu * this primitive it can be moved up to a spinaphore.h header. 1022046b94eSFenghua Yu */ 1032046b94eSFenghua Yu struct spinaphore { 104883a3acfSTony Luck unsigned long ticket; 105883a3acfSTony Luck unsigned long serve; 1062046b94eSFenghua Yu }; 1072046b94eSFenghua Yu 1082046b94eSFenghua Yu static inline void spinaphore_init(struct spinaphore *ss, int val) 1092046b94eSFenghua Yu { 110883a3acfSTony Luck ss->ticket = 0; 111883a3acfSTony Luck ss->serve = val; 1122046b94eSFenghua Yu } 1132046b94eSFenghua Yu 1142046b94eSFenghua Yu static inline void down_spin(struct spinaphore *ss) 1152046b94eSFenghua Yu { 116883a3acfSTony Luck unsigned long t = ia64_fetchadd(1, &ss->ticket, acq), serve; 117883a3acfSTony Luck 118883a3acfSTony Luck if (time_before(t, ss->serve)) 119883a3acfSTony Luck return; 120883a3acfSTony Luck 121883a3acfSTony Luck ia64_invala(); 122883a3acfSTony Luck 123883a3acfSTony Luck for (;;) { 124b70f4e85STony Luck asm volatile ("ld8.c.nc %0=[%1]" : "=r"(serve) : "r"(&ss->serve) : "memory"); 125883a3acfSTony Luck if (time_before(t, serve)) 126883a3acfSTony Luck return; 1272046b94eSFenghua Yu cpu_relax(); 1282046b94eSFenghua Yu } 129883a3acfSTony Luck } 1302046b94eSFenghua Yu 1312046b94eSFenghua Yu static inline void up_spin(struct spinaphore *ss) 1322046b94eSFenghua Yu { 133883a3acfSTony Luck ia64_fetchadd(1, &ss->serve, rel); 1342046b94eSFenghua Yu } 1352046b94eSFenghua Yu 1362046b94eSFenghua Yu static struct spinaphore ptcg_sem; 1372046b94eSFenghua Yu static u16 nptcg = 1; 1382046b94eSFenghua Yu static int need_ptcg_sem = 1; 1392046b94eSFenghua Yu static int toolatetochangeptcgsem = 0; 1402046b94eSFenghua Yu 1412046b94eSFenghua Yu /* 142a6c75b86SFenghua Yu * Kernel parameter "nptcg=" overrides max number of concurrent global TLB 143a6c75b86SFenghua Yu * purges which is reported from either PAL or SAL PALO. 144a6c75b86SFenghua Yu * 145a6c75b86SFenghua Yu * We don't have sanity checking for nptcg value. It's the user's responsibility 146a6c75b86SFenghua Yu * for valid nptcg value on the platform. Otherwise, kernel may hang in some 147a6c75b86SFenghua Yu * cases. 148a6c75b86SFenghua Yu */ 149a6c75b86SFenghua Yu static int __init 150a6c75b86SFenghua Yu set_nptcg(char *str) 151a6c75b86SFenghua Yu { 152a6c75b86SFenghua Yu int value = 0; 153a6c75b86SFenghua Yu 154a6c75b86SFenghua Yu get_option(&str, &value); 155a6c75b86SFenghua Yu setup_ptcg_sem(value, NPTCG_FROM_KERNEL_PARAMETER); 156a6c75b86SFenghua Yu 157a6c75b86SFenghua Yu return 1; 158a6c75b86SFenghua Yu } 159a6c75b86SFenghua Yu 160a6c75b86SFenghua Yu __setup("nptcg=", set_nptcg); 161a6c75b86SFenghua Yu 162a6c75b86SFenghua Yu /* 1632046b94eSFenghua Yu * Maximum number of simultaneous ptc.g purges in the system can 1642046b94eSFenghua Yu * be defined by PAL_VM_SUMMARY (in which case we should take 1652046b94eSFenghua Yu * the smallest value for any cpu in the system) or by the PAL 1662046b94eSFenghua Yu * override table (in which case we should ignore the value from 1672046b94eSFenghua Yu * PAL_VM_SUMMARY). 1682046b94eSFenghua Yu * 169a6c75b86SFenghua Yu * Kernel parameter "nptcg=" overrides maximum number of simultanesous ptc.g 170a6c75b86SFenghua Yu * purges defined in either PAL_VM_SUMMARY or PAL override table. In this case, 171a6c75b86SFenghua Yu * we should ignore the value from either PAL_VM_SUMMARY or PAL override table. 172a6c75b86SFenghua Yu * 1732046b94eSFenghua Yu * Complicating the logic here is the fact that num_possible_cpus() 1742046b94eSFenghua Yu * isn't fully setup until we start bringing cpus online. 1752046b94eSFenghua Yu */ 1762046b94eSFenghua Yu void 177a6c75b86SFenghua Yu setup_ptcg_sem(int max_purges, int nptcg_from) 1782046b94eSFenghua Yu { 179a6c75b86SFenghua Yu static int kp_override; 180a6c75b86SFenghua Yu static int palo_override; 1812046b94eSFenghua Yu static int firstcpu = 1; 1822046b94eSFenghua Yu 1832046b94eSFenghua Yu if (toolatetochangeptcgsem) { 184e617fce6SHidetoshi Seto if (nptcg_from == NPTCG_FROM_PAL && max_purges == 0) 185e617fce6SHidetoshi Seto BUG_ON(1 < nptcg); 186e617fce6SHidetoshi Seto else 1872046b94eSFenghua Yu BUG_ON(max_purges < nptcg); 1882046b94eSFenghua Yu return; 1892046b94eSFenghua Yu } 1902046b94eSFenghua Yu 191a6c75b86SFenghua Yu if (nptcg_from == NPTCG_FROM_KERNEL_PARAMETER) { 192a6c75b86SFenghua Yu kp_override = 1; 193a6c75b86SFenghua Yu nptcg = max_purges; 194a6c75b86SFenghua Yu goto resetsema; 195a6c75b86SFenghua Yu } 196a6c75b86SFenghua Yu if (kp_override) { 197a6c75b86SFenghua Yu need_ptcg_sem = num_possible_cpus() > nptcg; 198a6c75b86SFenghua Yu return; 199a6c75b86SFenghua Yu } 200a6c75b86SFenghua Yu 201a6c75b86SFenghua Yu if (nptcg_from == NPTCG_FROM_PALO) { 202a6c75b86SFenghua Yu palo_override = 1; 2032046b94eSFenghua Yu 2042046b94eSFenghua Yu /* In PALO max_purges == 0 really means it! */ 2052046b94eSFenghua Yu if (max_purges == 0) 2062046b94eSFenghua Yu panic("Whoa! Platform does not support global TLB purges.\n"); 2072046b94eSFenghua Yu nptcg = max_purges; 2082046b94eSFenghua Yu if (nptcg == PALO_MAX_TLB_PURGES) { 2092046b94eSFenghua Yu need_ptcg_sem = 0; 2102046b94eSFenghua Yu return; 2112046b94eSFenghua Yu } 2122046b94eSFenghua Yu goto resetsema; 2132046b94eSFenghua Yu } 214a6c75b86SFenghua Yu if (palo_override) { 2152046b94eSFenghua Yu if (nptcg != PALO_MAX_TLB_PURGES) 2162046b94eSFenghua Yu need_ptcg_sem = (num_possible_cpus() > nptcg); 2172046b94eSFenghua Yu return; 2182046b94eSFenghua Yu } 2192046b94eSFenghua Yu 2202046b94eSFenghua Yu /* In PAL_VM_SUMMARY max_purges == 0 actually means 1 */ 2212046b94eSFenghua Yu if (max_purges == 0) max_purges = 1; 2222046b94eSFenghua Yu 2232046b94eSFenghua Yu if (firstcpu) { 2242046b94eSFenghua Yu nptcg = max_purges; 2252046b94eSFenghua Yu firstcpu = 0; 2262046b94eSFenghua Yu } 2272046b94eSFenghua Yu if (max_purges < nptcg) 2282046b94eSFenghua Yu nptcg = max_purges; 2292046b94eSFenghua Yu if (nptcg == PAL_MAX_PURGES) { 2302046b94eSFenghua Yu need_ptcg_sem = 0; 2312046b94eSFenghua Yu return; 2322046b94eSFenghua Yu } else 2332046b94eSFenghua Yu need_ptcg_sem = (num_possible_cpus() > nptcg); 2342046b94eSFenghua Yu 2352046b94eSFenghua Yu resetsema: 2362046b94eSFenghua Yu spinaphore_init(&ptcg_sem, max_purges); 2372046b94eSFenghua Yu } 2382046b94eSFenghua Yu 2391da177e4SLinus Torvalds void 24058cd9082SChen, Kenneth W ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, 24158cd9082SChen, Kenneth W unsigned long end, unsigned long nbits) 2421da177e4SLinus Torvalds { 243aec103bfSde Dinechin, Christophe (Integrity VM) struct mm_struct *active_mm = current->active_mm; 244aec103bfSde Dinechin, Christophe (Integrity VM) 2452046b94eSFenghua Yu toolatetochangeptcgsem = 1; 2462046b94eSFenghua Yu 247aec103bfSde Dinechin, Christophe (Integrity VM) if (mm != active_mm) { 248aec103bfSde Dinechin, Christophe (Integrity VM) /* Restore region IDs for mm */ 249aec103bfSde Dinechin, Christophe (Integrity VM) if (mm && active_mm) { 250aec103bfSde Dinechin, Christophe (Integrity VM) activate_context(mm); 251aec103bfSde Dinechin, Christophe (Integrity VM) } else { 252c1902aaeSDean Roe flush_tlb_all(); 253c1902aaeSDean Roe return; 254c1902aaeSDean Roe } 255aec103bfSde Dinechin, Christophe (Integrity VM) } 256c1902aaeSDean Roe 2572046b94eSFenghua Yu if (need_ptcg_sem) 2582046b94eSFenghua Yu down_spin(&ptcg_sem); 2592046b94eSFenghua Yu 2601da177e4SLinus Torvalds do { 2611da177e4SLinus Torvalds /* 2621da177e4SLinus Torvalds * Flush ALAT entries also. 2631da177e4SLinus Torvalds */ 2641da177e4SLinus Torvalds ia64_ptcga(start, (nbits << 2)); 2651da177e4SLinus Torvalds ia64_srlz_i(); 2661da177e4SLinus Torvalds start += (1UL << nbits); 2671da177e4SLinus Torvalds } while (start < end); 2682046b94eSFenghua Yu 2692046b94eSFenghua Yu if (need_ptcg_sem) 2702046b94eSFenghua Yu up_spin(&ptcg_sem); 271aec103bfSde Dinechin, Christophe (Integrity VM) 272aec103bfSde Dinechin, Christophe (Integrity VM) if (mm != active_mm) { 273aec103bfSde Dinechin, Christophe (Integrity VM) activate_context(active_mm); 274aec103bfSde Dinechin, Christophe (Integrity VM) } 2751da177e4SLinus Torvalds } 2761da177e4SLinus Torvalds 2771da177e4SLinus Torvalds void 2781da177e4SLinus Torvalds local_flush_tlb_all (void) 2791da177e4SLinus Torvalds { 2801da177e4SLinus Torvalds unsigned long i, j, flags, count0, count1, stride0, stride1, addr; 2811da177e4SLinus Torvalds 2821da177e4SLinus Torvalds addr = local_cpu_data->ptce_base; 2831da177e4SLinus Torvalds count0 = local_cpu_data->ptce_count[0]; 2841da177e4SLinus Torvalds count1 = local_cpu_data->ptce_count[1]; 2851da177e4SLinus Torvalds stride0 = local_cpu_data->ptce_stride[0]; 2861da177e4SLinus Torvalds stride1 = local_cpu_data->ptce_stride[1]; 2871da177e4SLinus Torvalds 2881da177e4SLinus Torvalds local_irq_save(flags); 2891da177e4SLinus Torvalds for (i = 0; i < count0; ++i) { 2901da177e4SLinus Torvalds for (j = 0; j < count1; ++j) { 2911da177e4SLinus Torvalds ia64_ptce(addr); 2921da177e4SLinus Torvalds addr += stride1; 2931da177e4SLinus Torvalds } 2941da177e4SLinus Torvalds addr += stride0; 2951da177e4SLinus Torvalds } 2961da177e4SLinus Torvalds local_irq_restore(flags); 2971da177e4SLinus Torvalds ia64_srlz_i(); /* srlz.i implies srlz.d */ 2981da177e4SLinus Torvalds } 2991da177e4SLinus Torvalds 3001da177e4SLinus Torvalds void 30158cd9082SChen, Kenneth W flush_tlb_range (struct vm_area_struct *vma, unsigned long start, 30258cd9082SChen, Kenneth W unsigned long end) 3031da177e4SLinus Torvalds { 3041da177e4SLinus Torvalds struct mm_struct *mm = vma->vm_mm; 3051da177e4SLinus Torvalds unsigned long size = end - start; 3061da177e4SLinus Torvalds unsigned long nbits; 3071da177e4SLinus Torvalds 308c1902aaeSDean Roe #ifndef CONFIG_SMP 3091da177e4SLinus Torvalds if (mm != current->active_mm) { 3101da177e4SLinus Torvalds mm->context = 0; 3111da177e4SLinus Torvalds return; 3121da177e4SLinus Torvalds } 313c1902aaeSDean Roe #endif 3141da177e4SLinus Torvalds 3151da177e4SLinus Torvalds nbits = ia64_fls(size + 0xfff); 31658cd9082SChen, Kenneth W while (unlikely (((1UL << nbits) & purge.mask) == 0) && 31758cd9082SChen, Kenneth W (nbits < purge.max_bits)) 3181da177e4SLinus Torvalds ++nbits; 3191da177e4SLinus Torvalds if (nbits > purge.max_bits) 3201da177e4SLinus Torvalds nbits = purge.max_bits; 3211da177e4SLinus Torvalds start &= ~((1UL << nbits) - 1); 3221da177e4SLinus Torvalds 323663b97f7SHugh Dickins preempt_disable(); 324ce9eed5aSChen, Kenneth W #ifdef CONFIG_SMP 3255d8c39f6SRusty Russell if (mm != current->active_mm || cpumask_weight(mm_cpumask(mm)) != 1) { 326ce9eed5aSChen, Kenneth W platform_global_tlb_purge(mm, start, end, nbits); 327ce9eed5aSChen, Kenneth W preempt_enable(); 328ce9eed5aSChen, Kenneth W return; 329ce9eed5aSChen, Kenneth W } 330ce9eed5aSChen, Kenneth W #endif 3311da177e4SLinus Torvalds do { 3321da177e4SLinus Torvalds ia64_ptcl(start, (nbits<<2)); 3331da177e4SLinus Torvalds start += (1UL << nbits); 3341da177e4SLinus Torvalds } while (start < end); 335663b97f7SHugh Dickins preempt_enable(); 3361da177e4SLinus Torvalds ia64_srlz_i(); /* srlz.i implies srlz.d */ 3371da177e4SLinus Torvalds } 3381da177e4SLinus Torvalds EXPORT_SYMBOL(flush_tlb_range); 3391da177e4SLinus Torvalds 3405b5e76e9SGreg Kroah-Hartman void ia64_tlb_init(void) 3411da177e4SLinus Torvalds { 342256a7e09SJes Sorensen ia64_ptce_info_t uninitialized_var(ptce_info); /* GCC be quiet */ 343e088a4adSMatthew Wilcox u64 tr_pgbits; 3441da177e4SLinus Torvalds long status; 34596651896SXiantao Zhang pal_vm_info_1_u_t vm_info_1; 34696651896SXiantao Zhang pal_vm_info_2_u_t vm_info_2; 34796651896SXiantao Zhang int cpu = smp_processor_id(); 3481da177e4SLinus Torvalds 3491da177e4SLinus Torvalds if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) { 3501da177e4SLinus Torvalds printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld; " 3511da177e4SLinus Torvalds "defaulting to architected purge page-sizes.\n", status); 3521da177e4SLinus Torvalds purge.mask = 0x115557000UL; 3531da177e4SLinus Torvalds } 3541da177e4SLinus Torvalds purge.max_bits = ia64_fls(purge.mask); 3551da177e4SLinus Torvalds 3561da177e4SLinus Torvalds ia64_get_ptce(&ptce_info); 3571da177e4SLinus Torvalds local_cpu_data->ptce_base = ptce_info.base; 3581da177e4SLinus Torvalds local_cpu_data->ptce_count[0] = ptce_info.count[0]; 3591da177e4SLinus Torvalds local_cpu_data->ptce_count[1] = ptce_info.count[1]; 3601da177e4SLinus Torvalds local_cpu_data->ptce_stride[0] = ptce_info.stride[0]; 3611da177e4SLinus Torvalds local_cpu_data->ptce_stride[1] = ptce_info.stride[1]; 3621da177e4SLinus Torvalds 3631da177e4SLinus Torvalds local_flush_tlb_all(); /* nuke left overs from bootstrapping... */ 36496651896SXiantao Zhang status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2); 36596651896SXiantao Zhang 36696651896SXiantao Zhang if (status) { 36796651896SXiantao Zhang printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status); 36896651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = 8; 36996651896SXiantao Zhang return; 3701da177e4SLinus Torvalds } 37196651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = vm_info_1.pal_vm_info_1_s.max_itr_entry+1; 37296651896SXiantao Zhang if (per_cpu(ia64_tr_num, cpu) > 37396651896SXiantao Zhang (vm_info_1.pal_vm_info_1_s.max_dtr_entry+1)) 37496651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = 37596651896SXiantao Zhang vm_info_1.pal_vm_info_1_s.max_dtr_entry+1; 37696651896SXiantao Zhang if (per_cpu(ia64_tr_num, cpu) > IA64_TR_ALLOC_MAX) { 377a9894a4aSTony Luck static int justonce = 1; 37896651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = IA64_TR_ALLOC_MAX; 379a9894a4aSTony Luck if (justonce) { 380a9894a4aSTony Luck justonce = 0; 381a9894a4aSTony Luck printk(KERN_DEBUG "TR register number exceeds " 382a9894a4aSTony Luck "IA64_TR_ALLOC_MAX!\n"); 383a9894a4aSTony Luck } 38496651896SXiantao Zhang } 38596651896SXiantao Zhang } 38696651896SXiantao Zhang 38796651896SXiantao Zhang /* 38896651896SXiantao Zhang * is_tr_overlap 38996651896SXiantao Zhang * 39096651896SXiantao Zhang * Check overlap with inserted TRs. 39196651896SXiantao Zhang */ 39296651896SXiantao Zhang static int is_tr_overlap(struct ia64_tr_entry *p, u64 va, u64 log_size) 39396651896SXiantao Zhang { 39496651896SXiantao Zhang u64 tr_log_size; 39596651896SXiantao Zhang u64 tr_end; 39696651896SXiantao Zhang u64 va_rr = ia64_get_rr(va); 39796651896SXiantao Zhang u64 va_rid = RR_TO_RID(va_rr); 39896651896SXiantao Zhang u64 va_end = va + (1<<log_size) - 1; 39996651896SXiantao Zhang 40096651896SXiantao Zhang if (va_rid != RR_TO_RID(p->rr)) 40196651896SXiantao Zhang return 0; 40296651896SXiantao Zhang tr_log_size = (p->itir & 0xff) >> 2; 40396651896SXiantao Zhang tr_end = p->ifa + (1<<tr_log_size) - 1; 40496651896SXiantao Zhang 40596651896SXiantao Zhang if (va > tr_end || p->ifa > va_end) 40696651896SXiantao Zhang return 0; 40796651896SXiantao Zhang return 1; 40896651896SXiantao Zhang 40996651896SXiantao Zhang } 41096651896SXiantao Zhang 41196651896SXiantao Zhang /* 41296651896SXiantao Zhang * ia64_insert_tr in virtual mode. Allocate a TR slot 41396651896SXiantao Zhang * 41496651896SXiantao Zhang * target_mask : 0x1 : itr, 0x2 : dtr, 0x3 : idtr 41596651896SXiantao Zhang * 41696651896SXiantao Zhang * va : virtual address. 41796651896SXiantao Zhang * pte : pte entries inserted. 41896651896SXiantao Zhang * log_size: range to be covered. 41996651896SXiantao Zhang * 42096651896SXiantao Zhang * Return value: <0 : error No. 42196651896SXiantao Zhang * 42296651896SXiantao Zhang * >=0 : slot number allocated for TR. 42396651896SXiantao Zhang * Must be called with preemption disabled. 42496651896SXiantao Zhang */ 42596651896SXiantao Zhang int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) 42696651896SXiantao Zhang { 42796651896SXiantao Zhang int i, r; 42896651896SXiantao Zhang unsigned long psr; 42996651896SXiantao Zhang struct ia64_tr_entry *p; 43096651896SXiantao Zhang int cpu = smp_processor_id(); 43196651896SXiantao Zhang 4326c57a332STony Luck if (!ia64_idtrs[cpu]) { 4336c57a332STony Luck ia64_idtrs[cpu] = kmalloc(2 * IA64_TR_ALLOC_MAX * 4346c57a332STony Luck sizeof (struct ia64_tr_entry), GFP_KERNEL); 4356c57a332STony Luck if (!ia64_idtrs[cpu]) 4366c57a332STony Luck return -ENOMEM; 4376c57a332STony Luck } 43896651896SXiantao Zhang r = -EINVAL; 43996651896SXiantao Zhang /*Check overlap with existing TR entries*/ 44096651896SXiantao Zhang if (target_mask & 0x1) { 4416c57a332STony Luck p = ia64_idtrs[cpu]; 44296651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); 44396651896SXiantao Zhang i++, p++) { 44496651896SXiantao Zhang if (p->pte & 0x1) 44596651896SXiantao Zhang if (is_tr_overlap(p, va, log_size)) { 44696651896SXiantao Zhang printk(KERN_DEBUG "Overlapped Entry" 4475e49e399SNik Nyby "Inserted for TR Register!!\n"); 44896651896SXiantao Zhang goto out; 44996651896SXiantao Zhang } 45096651896SXiantao Zhang } 45196651896SXiantao Zhang } 45296651896SXiantao Zhang if (target_mask & 0x2) { 4536c57a332STony Luck p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX; 45496651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); 45596651896SXiantao Zhang i++, p++) { 45696651896SXiantao Zhang if (p->pte & 0x1) 45796651896SXiantao Zhang if (is_tr_overlap(p, va, log_size)) { 45896651896SXiantao Zhang printk(KERN_DEBUG "Overlapped Entry" 4595e49e399SNik Nyby "Inserted for TR Register!!\n"); 46096651896SXiantao Zhang goto out; 46196651896SXiantao Zhang } 46296651896SXiantao Zhang } 46396651896SXiantao Zhang } 46496651896SXiantao Zhang 46596651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) { 46696651896SXiantao Zhang switch (target_mask & 0x3) { 46796651896SXiantao Zhang case 1: 4686c57a332STony Luck if (!((ia64_idtrs[cpu] + i)->pte & 0x1)) 46996651896SXiantao Zhang goto found; 47096651896SXiantao Zhang continue; 47196651896SXiantao Zhang case 2: 4726c57a332STony Luck if (!((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) 47396651896SXiantao Zhang goto found; 47496651896SXiantao Zhang continue; 47596651896SXiantao Zhang case 3: 4766c57a332STony Luck if (!((ia64_idtrs[cpu] + i)->pte & 0x1) && 4776c57a332STony Luck !((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) 47896651896SXiantao Zhang goto found; 47996651896SXiantao Zhang continue; 48096651896SXiantao Zhang default: 48196651896SXiantao Zhang r = -EINVAL; 48296651896SXiantao Zhang goto out; 48396651896SXiantao Zhang } 48496651896SXiantao Zhang } 48596651896SXiantao Zhang found: 48696651896SXiantao Zhang if (i >= per_cpu(ia64_tr_num, cpu)) 48796651896SXiantao Zhang return -EBUSY; 48896651896SXiantao Zhang 48996651896SXiantao Zhang /*Record tr info for mca hander use!*/ 49096651896SXiantao Zhang if (i > per_cpu(ia64_tr_used, cpu)) 49196651896SXiantao Zhang per_cpu(ia64_tr_used, cpu) = i; 49296651896SXiantao Zhang 49396651896SXiantao Zhang psr = ia64_clear_ic(); 49496651896SXiantao Zhang if (target_mask & 0x1) { 49596651896SXiantao Zhang ia64_itr(0x1, i, va, pte, log_size); 49696651896SXiantao Zhang ia64_srlz_i(); 4976c57a332STony Luck p = ia64_idtrs[cpu] + i; 49896651896SXiantao Zhang p->ifa = va; 49996651896SXiantao Zhang p->pte = pte; 50096651896SXiantao Zhang p->itir = log_size << 2; 50196651896SXiantao Zhang p->rr = ia64_get_rr(va); 50296651896SXiantao Zhang } 50396651896SXiantao Zhang if (target_mask & 0x2) { 50496651896SXiantao Zhang ia64_itr(0x2, i, va, pte, log_size); 50596651896SXiantao Zhang ia64_srlz_i(); 5066c57a332STony Luck p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i; 50796651896SXiantao Zhang p->ifa = va; 50896651896SXiantao Zhang p->pte = pte; 50996651896SXiantao Zhang p->itir = log_size << 2; 51096651896SXiantao Zhang p->rr = ia64_get_rr(va); 51196651896SXiantao Zhang } 51296651896SXiantao Zhang ia64_set_psr(psr); 51396651896SXiantao Zhang r = i; 51496651896SXiantao Zhang out: 51596651896SXiantao Zhang return r; 51696651896SXiantao Zhang } 51796651896SXiantao Zhang EXPORT_SYMBOL_GPL(ia64_itr_entry); 51896651896SXiantao Zhang 51996651896SXiantao Zhang /* 52096651896SXiantao Zhang * ia64_purge_tr 52196651896SXiantao Zhang * 52296651896SXiantao Zhang * target_mask: 0x1: purge itr, 0x2 : purge dtr, 0x3 purge idtr. 52396651896SXiantao Zhang * slot: slot number to be freed. 52496651896SXiantao Zhang * 52596651896SXiantao Zhang * Must be called with preemption disabled. 52696651896SXiantao Zhang */ 52796651896SXiantao Zhang void ia64_ptr_entry(u64 target_mask, int slot) 52896651896SXiantao Zhang { 52996651896SXiantao Zhang int cpu = smp_processor_id(); 53096651896SXiantao Zhang int i; 53196651896SXiantao Zhang struct ia64_tr_entry *p; 53296651896SXiantao Zhang 53396651896SXiantao Zhang if (slot < IA64_TR_ALLOC_BASE || slot >= per_cpu(ia64_tr_num, cpu)) 53496651896SXiantao Zhang return; 53596651896SXiantao Zhang 53696651896SXiantao Zhang if (target_mask & 0x1) { 5376c57a332STony Luck p = ia64_idtrs[cpu] + slot; 53896651896SXiantao Zhang if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { 53996651896SXiantao Zhang p->pte = 0; 54096651896SXiantao Zhang ia64_ptr(0x1, p->ifa, p->itir>>2); 54196651896SXiantao Zhang ia64_srlz_i(); 54296651896SXiantao Zhang } 54396651896SXiantao Zhang } 54496651896SXiantao Zhang 54596651896SXiantao Zhang if (target_mask & 0x2) { 5466c57a332STony Luck p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + slot; 54796651896SXiantao Zhang if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { 54896651896SXiantao Zhang p->pte = 0; 54996651896SXiantao Zhang ia64_ptr(0x2, p->ifa, p->itir>>2); 55096651896SXiantao Zhang ia64_srlz_i(); 55196651896SXiantao Zhang } 55296651896SXiantao Zhang } 55396651896SXiantao Zhang 55496651896SXiantao Zhang for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) { 5556c57a332STony Luck if (((ia64_idtrs[cpu] + i)->pte & 0x1) || 5566c57a332STony Luck ((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) 55796651896SXiantao Zhang break; 55896651896SXiantao Zhang } 55996651896SXiantao Zhang per_cpu(ia64_tr_used, cpu) = i; 56096651896SXiantao Zhang } 56196651896SXiantao Zhang EXPORT_SYMBOL_GPL(ia64_ptr_entry); 562