1457c8996SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
21da177e4SLinus Torvalds /*
31da177e4SLinus Torvalds * TLB support routines.
41da177e4SLinus Torvalds *
51da177e4SLinus Torvalds * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
61da177e4SLinus Torvalds * David Mosberger-Tang <davidm@hpl.hp.com>
71da177e4SLinus Torvalds *
81da177e4SLinus Torvalds * 08/02/00 A. Mallick <asit.k.mallick@intel.com>
91da177e4SLinus Torvalds * Modified RID allocation for SMP
101da177e4SLinus Torvalds * Goutham Rao <goutham.rao@intel.com>
111da177e4SLinus Torvalds * IPI based ptc implementation and A-step IPI implementation.
12dcc17d1bSPeter Keilty * Rohit Seth <rohit.seth@intel.com>
13dcc17d1bSPeter Keilty * Ken Chen <kenneth.w.chen@intel.com>
14aec103bfSde Dinechin, Christophe (Integrity VM) * Christophe de Dinechin <ddd@hp.com>: Avoid ptc.e on memory allocation
152046b94eSFenghua Yu * Copyright (C) 2007 Intel Corp
162046b94eSFenghua Yu * Fenghua Yu <fenghua.yu@intel.com>
172046b94eSFenghua Yu * Add multiple ptc.g/ptc.ga instruction support in global tlb purge.
181da177e4SLinus Torvalds */
191da177e4SLinus Torvalds #include <linux/module.h>
201da177e4SLinus Torvalds #include <linux/init.h>
211da177e4SLinus Torvalds #include <linux/kernel.h>
221da177e4SLinus Torvalds #include <linux/sched.h>
231da177e4SLinus Torvalds #include <linux/smp.h>
241da177e4SLinus Torvalds #include <linux/mm.h>
2557c8a661SMike Rapoport #include <linux/memblock.h>
265a0e3ad6STejun Heo #include <linux/slab.h>
271da177e4SLinus Torvalds
281da177e4SLinus Torvalds #include <asm/delay.h>
291da177e4SLinus Torvalds #include <asm/mmu_context.h>
301da177e4SLinus Torvalds #include <asm/pal.h>
311da177e4SLinus Torvalds #include <asm/tlbflush.h>
32dcc17d1bSPeter Keilty #include <asm/dma.h>
3396651896SXiantao Zhang #include <asm/processor.h>
342046b94eSFenghua Yu #include <asm/sal.h>
3596651896SXiantao Zhang #include <asm/tlb.h>
361da177e4SLinus Torvalds
371da177e4SLinus Torvalds static struct {
38e088a4adSMatthew Wilcox u64 mask; /* mask of supported purge page-sizes */
3958cd9082SChen, Kenneth W unsigned long max_bits; /* log2 of largest supported purge page-size */
401da177e4SLinus Torvalds } purge;
411da177e4SLinus Torvalds
421da177e4SLinus Torvalds struct ia64_ctx ia64_ctx = {
438737d595SMilind Arun Choudhary .lock = __SPIN_LOCK_UNLOCKED(ia64_ctx.lock),
441da177e4SLinus Torvalds .next = 1,
451da177e4SLinus Torvalds .max_ctx = ~0U
461da177e4SLinus Torvalds };
471da177e4SLinus Torvalds
481da177e4SLinus Torvalds DEFINE_PER_CPU(u8, ia64_need_tlb_flush);
4996651896SXiantao Zhang DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/
5096651896SXiantao Zhang DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/
5196651896SXiantao Zhang
526c57a332STony Luck struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
531da177e4SLinus Torvalds
541da177e4SLinus Torvalds /*
55dcc17d1bSPeter Keilty * Initializes the ia64_ctx.bitmap array based on max_ctx+1.
56dcc17d1bSPeter Keilty * Called after cpu_init() has setup ia64_ctx.max_ctx based on
57dcc17d1bSPeter Keilty * maximum RID that is supported by boot CPU.
58dcc17d1bSPeter Keilty */
59dcc17d1bSPeter Keilty void __init
mmu_context_init(void)60dcc17d1bSPeter Keilty mmu_context_init (void)
61dcc17d1bSPeter Keilty {
627e1c4e27SMike Rapoport ia64_ctx.bitmap = memblock_alloc((ia64_ctx.max_ctx + 1) >> 3,
637e1c4e27SMike Rapoport SMP_CACHE_BYTES);
64d80db5c1SMike Rapoport if (!ia64_ctx.bitmap)
65d80db5c1SMike Rapoport panic("%s: Failed to allocate %u bytes\n", __func__,
66d80db5c1SMike Rapoport (ia64_ctx.max_ctx + 1) >> 3);
677e1c4e27SMike Rapoport ia64_ctx.flushmap = memblock_alloc((ia64_ctx.max_ctx + 1) >> 3,
687e1c4e27SMike Rapoport SMP_CACHE_BYTES);
69d80db5c1SMike Rapoport if (!ia64_ctx.flushmap)
70d80db5c1SMike Rapoport panic("%s: Failed to allocate %u bytes\n", __func__,
71d80db5c1SMike Rapoport (ia64_ctx.max_ctx + 1) >> 3);
72dcc17d1bSPeter Keilty }
73dcc17d1bSPeter Keilty
74dcc17d1bSPeter Keilty /*
751da177e4SLinus Torvalds * Acquire the ia64_ctx.lock before calling this function!
761da177e4SLinus Torvalds */
771da177e4SLinus Torvalds void
wrap_mmu_context(struct mm_struct * mm)781da177e4SLinus Torvalds wrap_mmu_context (struct mm_struct *mm)
791da177e4SLinus Torvalds {
8058cd9082SChen, Kenneth W int i, cpu;
81dcc17d1bSPeter Keilty unsigned long flush_bit;
821da177e4SLinus Torvalds
83dcc17d1bSPeter Keilty for (i=0; i <= ia64_ctx.max_ctx / BITS_PER_LONG; i++) {
84dcc17d1bSPeter Keilty flush_bit = xchg(&ia64_ctx.flushmap[i], 0);
85dcc17d1bSPeter Keilty ia64_ctx.bitmap[i] ^= flush_bit;
86dcc17d1bSPeter Keilty }
871da177e4SLinus Torvalds
88dcc17d1bSPeter Keilty /* use offset at 300 to skip daemons */
89dcc17d1bSPeter Keilty ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap,
90dcc17d1bSPeter Keilty ia64_ctx.max_ctx, 300);
91dcc17d1bSPeter Keilty ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap,
92dcc17d1bSPeter Keilty ia64_ctx.max_ctx, ia64_ctx.next);
931da177e4SLinus Torvalds
9458cd9082SChen, Kenneth W /*
9558cd9082SChen, Kenneth W * can't call flush_tlb_all() here because of race condition
9658cd9082SChen, Kenneth W * with O(1) scheduler [EF]
9758cd9082SChen, Kenneth W */
9858cd9082SChen, Kenneth W cpu = get_cpu(); /* prevent preemption/migration */
9958cd9082SChen, Kenneth W for_each_online_cpu(i)
100dc565b52Shawkes@sgi.com if (i != cpu)
1011da177e4SLinus Torvalds per_cpu(ia64_need_tlb_flush, i) = 1;
1021da177e4SLinus Torvalds put_cpu();
1031da177e4SLinus Torvalds local_flush_tlb_all();
1041da177e4SLinus Torvalds }
1051da177e4SLinus Torvalds
1062046b94eSFenghua Yu /*
1072046b94eSFenghua Yu * Implement "spinaphores" ... like counting semaphores, but they
1082046b94eSFenghua Yu * spin instead of sleeping. If there are ever any other users for
1092046b94eSFenghua Yu * this primitive it can be moved up to a spinaphore.h header.
1102046b94eSFenghua Yu */
1112046b94eSFenghua Yu struct spinaphore {
112883a3acfSTony Luck unsigned long ticket;
113883a3acfSTony Luck unsigned long serve;
1142046b94eSFenghua Yu };
1152046b94eSFenghua Yu
spinaphore_init(struct spinaphore * ss,int val)1162046b94eSFenghua Yu static inline void spinaphore_init(struct spinaphore *ss, int val)
1172046b94eSFenghua Yu {
118883a3acfSTony Luck ss->ticket = 0;
119883a3acfSTony Luck ss->serve = val;
1202046b94eSFenghua Yu }
1212046b94eSFenghua Yu
down_spin(struct spinaphore * ss)1222046b94eSFenghua Yu static inline void down_spin(struct spinaphore *ss)
1232046b94eSFenghua Yu {
124883a3acfSTony Luck unsigned long t = ia64_fetchadd(1, &ss->ticket, acq), serve;
125883a3acfSTony Luck
126883a3acfSTony Luck if (time_before(t, ss->serve))
127883a3acfSTony Luck return;
128883a3acfSTony Luck
129883a3acfSTony Luck ia64_invala();
130883a3acfSTony Luck
131883a3acfSTony Luck for (;;) {
132b70f4e85STony Luck asm volatile ("ld8.c.nc %0=[%1]" : "=r"(serve) : "r"(&ss->serve) : "memory");
133883a3acfSTony Luck if (time_before(t, serve))
134883a3acfSTony Luck return;
1352046b94eSFenghua Yu cpu_relax();
1362046b94eSFenghua Yu }
137883a3acfSTony Luck }
1382046b94eSFenghua Yu
up_spin(struct spinaphore * ss)1392046b94eSFenghua Yu static inline void up_spin(struct spinaphore *ss)
1402046b94eSFenghua Yu {
141883a3acfSTony Luck ia64_fetchadd(1, &ss->serve, rel);
1422046b94eSFenghua Yu }
1432046b94eSFenghua Yu
1442046b94eSFenghua Yu static struct spinaphore ptcg_sem;
1452046b94eSFenghua Yu static u16 nptcg = 1;
1462046b94eSFenghua Yu static int need_ptcg_sem = 1;
1472046b94eSFenghua Yu static int toolatetochangeptcgsem = 0;
1482046b94eSFenghua Yu
1492046b94eSFenghua Yu /*
150a6c75b86SFenghua Yu * Kernel parameter "nptcg=" overrides max number of concurrent global TLB
151a6c75b86SFenghua Yu * purges which is reported from either PAL or SAL PALO.
152a6c75b86SFenghua Yu *
153a6c75b86SFenghua Yu * We don't have sanity checking for nptcg value. It's the user's responsibility
154a6c75b86SFenghua Yu * for valid nptcg value on the platform. Otherwise, kernel may hang in some
155a6c75b86SFenghua Yu * cases.
156a6c75b86SFenghua Yu */
157a6c75b86SFenghua Yu static int __init
set_nptcg(char * str)158a6c75b86SFenghua Yu set_nptcg(char *str)
159a6c75b86SFenghua Yu {
160a6c75b86SFenghua Yu int value = 0;
161a6c75b86SFenghua Yu
162a6c75b86SFenghua Yu get_option(&str, &value);
163a6c75b86SFenghua Yu setup_ptcg_sem(value, NPTCG_FROM_KERNEL_PARAMETER);
164a6c75b86SFenghua Yu
165a6c75b86SFenghua Yu return 1;
166a6c75b86SFenghua Yu }
167a6c75b86SFenghua Yu
168a6c75b86SFenghua Yu __setup("nptcg=", set_nptcg);
169a6c75b86SFenghua Yu
170a6c75b86SFenghua Yu /*
1712046b94eSFenghua Yu * Maximum number of simultaneous ptc.g purges in the system can
1722046b94eSFenghua Yu * be defined by PAL_VM_SUMMARY (in which case we should take
1732046b94eSFenghua Yu * the smallest value for any cpu in the system) or by the PAL
1742046b94eSFenghua Yu * override table (in which case we should ignore the value from
1752046b94eSFenghua Yu * PAL_VM_SUMMARY).
1762046b94eSFenghua Yu *
177*0af96a02SJulia Lawall * Kernel parameter "nptcg=" overrides maximum number of simultaneous ptc.g
178a6c75b86SFenghua Yu * purges defined in either PAL_VM_SUMMARY or PAL override table. In this case,
179a6c75b86SFenghua Yu * we should ignore the value from either PAL_VM_SUMMARY or PAL override table.
180a6c75b86SFenghua Yu *
1812046b94eSFenghua Yu * Complicating the logic here is the fact that num_possible_cpus()
1822046b94eSFenghua Yu * isn't fully setup until we start bringing cpus online.
1832046b94eSFenghua Yu */
1842046b94eSFenghua Yu void
setup_ptcg_sem(int max_purges,int nptcg_from)185a6c75b86SFenghua Yu setup_ptcg_sem(int max_purges, int nptcg_from)
1862046b94eSFenghua Yu {
187a6c75b86SFenghua Yu static int kp_override;
188a6c75b86SFenghua Yu static int palo_override;
1892046b94eSFenghua Yu static int firstcpu = 1;
1902046b94eSFenghua Yu
1912046b94eSFenghua Yu if (toolatetochangeptcgsem) {
192e617fce6SHidetoshi Seto if (nptcg_from == NPTCG_FROM_PAL && max_purges == 0)
193e617fce6SHidetoshi Seto BUG_ON(1 < nptcg);
194e617fce6SHidetoshi Seto else
1952046b94eSFenghua Yu BUG_ON(max_purges < nptcg);
1962046b94eSFenghua Yu return;
1972046b94eSFenghua Yu }
1982046b94eSFenghua Yu
199a6c75b86SFenghua Yu if (nptcg_from == NPTCG_FROM_KERNEL_PARAMETER) {
200a6c75b86SFenghua Yu kp_override = 1;
201a6c75b86SFenghua Yu nptcg = max_purges;
202a6c75b86SFenghua Yu goto resetsema;
203a6c75b86SFenghua Yu }
204a6c75b86SFenghua Yu if (kp_override) {
205a6c75b86SFenghua Yu need_ptcg_sem = num_possible_cpus() > nptcg;
206a6c75b86SFenghua Yu return;
207a6c75b86SFenghua Yu }
208a6c75b86SFenghua Yu
209a6c75b86SFenghua Yu if (nptcg_from == NPTCG_FROM_PALO) {
210a6c75b86SFenghua Yu palo_override = 1;
2112046b94eSFenghua Yu
2122046b94eSFenghua Yu /* In PALO max_purges == 0 really means it! */
2132046b94eSFenghua Yu if (max_purges == 0)
2142046b94eSFenghua Yu panic("Whoa! Platform does not support global TLB purges.\n");
2152046b94eSFenghua Yu nptcg = max_purges;
2162046b94eSFenghua Yu if (nptcg == PALO_MAX_TLB_PURGES) {
2172046b94eSFenghua Yu need_ptcg_sem = 0;
2182046b94eSFenghua Yu return;
2192046b94eSFenghua Yu }
2202046b94eSFenghua Yu goto resetsema;
2212046b94eSFenghua Yu }
222a6c75b86SFenghua Yu if (palo_override) {
2232046b94eSFenghua Yu if (nptcg != PALO_MAX_TLB_PURGES)
2242046b94eSFenghua Yu need_ptcg_sem = (num_possible_cpus() > nptcg);
2252046b94eSFenghua Yu return;
2262046b94eSFenghua Yu }
2272046b94eSFenghua Yu
2282046b94eSFenghua Yu /* In PAL_VM_SUMMARY max_purges == 0 actually means 1 */
2292046b94eSFenghua Yu if (max_purges == 0) max_purges = 1;
2302046b94eSFenghua Yu
2312046b94eSFenghua Yu if (firstcpu) {
2322046b94eSFenghua Yu nptcg = max_purges;
2332046b94eSFenghua Yu firstcpu = 0;
2342046b94eSFenghua Yu }
2352046b94eSFenghua Yu if (max_purges < nptcg)
2362046b94eSFenghua Yu nptcg = max_purges;
2372046b94eSFenghua Yu if (nptcg == PAL_MAX_PURGES) {
2382046b94eSFenghua Yu need_ptcg_sem = 0;
2392046b94eSFenghua Yu return;
2402046b94eSFenghua Yu } else
2412046b94eSFenghua Yu need_ptcg_sem = (num_possible_cpus() > nptcg);
2422046b94eSFenghua Yu
2432046b94eSFenghua Yu resetsema:
2442046b94eSFenghua Yu spinaphore_init(&ptcg_sem, max_purges);
2452046b94eSFenghua Yu }
2462046b94eSFenghua Yu
24705933aacSChristoph Hellwig #ifdef CONFIG_SMP
24805933aacSChristoph Hellwig static void
ia64_global_tlb_purge(struct mm_struct * mm,unsigned long start,unsigned long end,unsigned long nbits)24958cd9082SChen, Kenneth W ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start,
25058cd9082SChen, Kenneth W unsigned long end, unsigned long nbits)
2511da177e4SLinus Torvalds {
252aec103bfSde Dinechin, Christophe (Integrity VM) struct mm_struct *active_mm = current->active_mm;
253aec103bfSde Dinechin, Christophe (Integrity VM)
2542046b94eSFenghua Yu toolatetochangeptcgsem = 1;
2552046b94eSFenghua Yu
256aec103bfSde Dinechin, Christophe (Integrity VM) if (mm != active_mm) {
257aec103bfSde Dinechin, Christophe (Integrity VM) /* Restore region IDs for mm */
258aec103bfSde Dinechin, Christophe (Integrity VM) if (mm && active_mm) {
259aec103bfSde Dinechin, Christophe (Integrity VM) activate_context(mm);
260aec103bfSde Dinechin, Christophe (Integrity VM) } else {
261c1902aaeSDean Roe flush_tlb_all();
262c1902aaeSDean Roe return;
263c1902aaeSDean Roe }
264aec103bfSde Dinechin, Christophe (Integrity VM) }
265c1902aaeSDean Roe
2662046b94eSFenghua Yu if (need_ptcg_sem)
2672046b94eSFenghua Yu down_spin(&ptcg_sem);
2682046b94eSFenghua Yu
2691da177e4SLinus Torvalds do {
2701da177e4SLinus Torvalds /*
2711da177e4SLinus Torvalds * Flush ALAT entries also.
2721da177e4SLinus Torvalds */
2731da177e4SLinus Torvalds ia64_ptcga(start, (nbits << 2));
2741da177e4SLinus Torvalds ia64_srlz_i();
2751da177e4SLinus Torvalds start += (1UL << nbits);
2761da177e4SLinus Torvalds } while (start < end);
2772046b94eSFenghua Yu
2782046b94eSFenghua Yu if (need_ptcg_sem)
2792046b94eSFenghua Yu up_spin(&ptcg_sem);
280aec103bfSde Dinechin, Christophe (Integrity VM)
281aec103bfSde Dinechin, Christophe (Integrity VM) if (mm != active_mm) {
282aec103bfSde Dinechin, Christophe (Integrity VM) activate_context(active_mm);
283aec103bfSde Dinechin, Christophe (Integrity VM) }
2841da177e4SLinus Torvalds }
28505933aacSChristoph Hellwig #endif /* CONFIG_SMP */
2861da177e4SLinus Torvalds
2871da177e4SLinus Torvalds void
local_flush_tlb_all(void)2881da177e4SLinus Torvalds local_flush_tlb_all (void)
2891da177e4SLinus Torvalds {
2901da177e4SLinus Torvalds unsigned long i, j, flags, count0, count1, stride0, stride1, addr;
2911da177e4SLinus Torvalds
2921da177e4SLinus Torvalds addr = local_cpu_data->ptce_base;
2931da177e4SLinus Torvalds count0 = local_cpu_data->ptce_count[0];
2941da177e4SLinus Torvalds count1 = local_cpu_data->ptce_count[1];
2951da177e4SLinus Torvalds stride0 = local_cpu_data->ptce_stride[0];
2961da177e4SLinus Torvalds stride1 = local_cpu_data->ptce_stride[1];
2971da177e4SLinus Torvalds
2981da177e4SLinus Torvalds local_irq_save(flags);
2991da177e4SLinus Torvalds for (i = 0; i < count0; ++i) {
3001da177e4SLinus Torvalds for (j = 0; j < count1; ++j) {
3011da177e4SLinus Torvalds ia64_ptce(addr);
3021da177e4SLinus Torvalds addr += stride1;
3031da177e4SLinus Torvalds }
3041da177e4SLinus Torvalds addr += stride0;
3051da177e4SLinus Torvalds }
3061da177e4SLinus Torvalds local_irq_restore(flags);
3071da177e4SLinus Torvalds ia64_srlz_i(); /* srlz.i implies srlz.d */
3081da177e4SLinus Torvalds }
3091da177e4SLinus Torvalds
310e1547007SPeter Zijlstra static void
__flush_tlb_range(struct vm_area_struct * vma,unsigned long start,unsigned long end)311e1547007SPeter Zijlstra __flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
31258cd9082SChen, Kenneth W unsigned long end)
3131da177e4SLinus Torvalds {
3141da177e4SLinus Torvalds struct mm_struct *mm = vma->vm_mm;
3151da177e4SLinus Torvalds unsigned long size = end - start;
3161da177e4SLinus Torvalds unsigned long nbits;
3171da177e4SLinus Torvalds
318c1902aaeSDean Roe #ifndef CONFIG_SMP
3191da177e4SLinus Torvalds if (mm != current->active_mm) {
3201da177e4SLinus Torvalds mm->context = 0;
3211da177e4SLinus Torvalds return;
3221da177e4SLinus Torvalds }
323c1902aaeSDean Roe #endif
3241da177e4SLinus Torvalds
3251da177e4SLinus Torvalds nbits = ia64_fls(size + 0xfff);
32658cd9082SChen, Kenneth W while (unlikely (((1UL << nbits) & purge.mask) == 0) &&
32758cd9082SChen, Kenneth W (nbits < purge.max_bits))
3281da177e4SLinus Torvalds ++nbits;
3291da177e4SLinus Torvalds if (nbits > purge.max_bits)
3301da177e4SLinus Torvalds nbits = purge.max_bits;
3311da177e4SLinus Torvalds start &= ~((1UL << nbits) - 1);
3321da177e4SLinus Torvalds
333663b97f7SHugh Dickins preempt_disable();
334ce9eed5aSChen, Kenneth W #ifdef CONFIG_SMP
3355d8c39f6SRusty Russell if (mm != current->active_mm || cpumask_weight(mm_cpumask(mm)) != 1) {
33605933aacSChristoph Hellwig ia64_global_tlb_purge(mm, start, end, nbits);
337ce9eed5aSChen, Kenneth W preempt_enable();
338ce9eed5aSChen, Kenneth W return;
339ce9eed5aSChen, Kenneth W }
340ce9eed5aSChen, Kenneth W #endif
3411da177e4SLinus Torvalds do {
3421da177e4SLinus Torvalds ia64_ptcl(start, (nbits<<2));
3431da177e4SLinus Torvalds start += (1UL << nbits);
3441da177e4SLinus Torvalds } while (start < end);
345663b97f7SHugh Dickins preempt_enable();
3461da177e4SLinus Torvalds ia64_srlz_i(); /* srlz.i implies srlz.d */
3471da177e4SLinus Torvalds }
348e1547007SPeter Zijlstra
flush_tlb_range(struct vm_area_struct * vma,unsigned long start,unsigned long end)349e1547007SPeter Zijlstra void flush_tlb_range(struct vm_area_struct *vma,
350e1547007SPeter Zijlstra unsigned long start, unsigned long end)
351e1547007SPeter Zijlstra {
352e1547007SPeter Zijlstra if (unlikely(end - start >= 1024*1024*1024*1024UL
353e1547007SPeter Zijlstra || REGION_NUMBER(start) != REGION_NUMBER(end - 1))) {
354e1547007SPeter Zijlstra /*
355e1547007SPeter Zijlstra * If we flush more than a tera-byte or across regions, we're
356e1547007SPeter Zijlstra * probably better off just flushing the entire TLB(s). This
357e1547007SPeter Zijlstra * should be very rare and is not worth optimizing for.
358e1547007SPeter Zijlstra */
359e1547007SPeter Zijlstra flush_tlb_all();
360e1547007SPeter Zijlstra } else {
361e1547007SPeter Zijlstra /* flush the address range from the tlb */
362e1547007SPeter Zijlstra __flush_tlb_range(vma, start, end);
363e1547007SPeter Zijlstra /* flush the virt. page-table area mapping the addr range */
364e1547007SPeter Zijlstra __flush_tlb_range(vma, ia64_thash(start), ia64_thash(end));
365e1547007SPeter Zijlstra }
366e1547007SPeter Zijlstra }
3671da177e4SLinus Torvalds EXPORT_SYMBOL(flush_tlb_range);
3681da177e4SLinus Torvalds
ia64_tlb_init(void)3695b5e76e9SGreg Kroah-Hartman void ia64_tlb_init(void)
3701da177e4SLinus Torvalds {
3713f649ab7SKees Cook ia64_ptce_info_t ptce_info;
372e088a4adSMatthew Wilcox u64 tr_pgbits;
3731da177e4SLinus Torvalds long status;
37496651896SXiantao Zhang pal_vm_info_1_u_t vm_info_1;
37596651896SXiantao Zhang pal_vm_info_2_u_t vm_info_2;
37696651896SXiantao Zhang int cpu = smp_processor_id();
3771da177e4SLinus Torvalds
3781da177e4SLinus Torvalds if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) {
3791da177e4SLinus Torvalds printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld; "
3801da177e4SLinus Torvalds "defaulting to architected purge page-sizes.\n", status);
3811da177e4SLinus Torvalds purge.mask = 0x115557000UL;
3821da177e4SLinus Torvalds }
3831da177e4SLinus Torvalds purge.max_bits = ia64_fls(purge.mask);
3841da177e4SLinus Torvalds
3851da177e4SLinus Torvalds ia64_get_ptce(&ptce_info);
3861da177e4SLinus Torvalds local_cpu_data->ptce_base = ptce_info.base;
3871da177e4SLinus Torvalds local_cpu_data->ptce_count[0] = ptce_info.count[0];
3881da177e4SLinus Torvalds local_cpu_data->ptce_count[1] = ptce_info.count[1];
3891da177e4SLinus Torvalds local_cpu_data->ptce_stride[0] = ptce_info.stride[0];
3901da177e4SLinus Torvalds local_cpu_data->ptce_stride[1] = ptce_info.stride[1];
3911da177e4SLinus Torvalds
3921da177e4SLinus Torvalds local_flush_tlb_all(); /* nuke left overs from bootstrapping... */
39396651896SXiantao Zhang status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2);
39496651896SXiantao Zhang
39596651896SXiantao Zhang if (status) {
39696651896SXiantao Zhang printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status);
39796651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = 8;
39896651896SXiantao Zhang return;
3991da177e4SLinus Torvalds }
40096651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = vm_info_1.pal_vm_info_1_s.max_itr_entry+1;
40196651896SXiantao Zhang if (per_cpu(ia64_tr_num, cpu) >
40296651896SXiantao Zhang (vm_info_1.pal_vm_info_1_s.max_dtr_entry+1))
40396651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) =
40496651896SXiantao Zhang vm_info_1.pal_vm_info_1_s.max_dtr_entry+1;
40596651896SXiantao Zhang if (per_cpu(ia64_tr_num, cpu) > IA64_TR_ALLOC_MAX) {
406a9894a4aSTony Luck static int justonce = 1;
40796651896SXiantao Zhang per_cpu(ia64_tr_num, cpu) = IA64_TR_ALLOC_MAX;
408a9894a4aSTony Luck if (justonce) {
409a9894a4aSTony Luck justonce = 0;
410a9894a4aSTony Luck printk(KERN_DEBUG "TR register number exceeds "
411a9894a4aSTony Luck "IA64_TR_ALLOC_MAX!\n");
412a9894a4aSTony Luck }
41396651896SXiantao Zhang }
41496651896SXiantao Zhang }
41596651896SXiantao Zhang
41696651896SXiantao Zhang /*
41796651896SXiantao Zhang * is_tr_overlap
41896651896SXiantao Zhang *
41996651896SXiantao Zhang * Check overlap with inserted TRs.
42096651896SXiantao Zhang */
is_tr_overlap(struct ia64_tr_entry * p,u64 va,u64 log_size)42196651896SXiantao Zhang static int is_tr_overlap(struct ia64_tr_entry *p, u64 va, u64 log_size)
42296651896SXiantao Zhang {
42396651896SXiantao Zhang u64 tr_log_size;
42496651896SXiantao Zhang u64 tr_end;
42596651896SXiantao Zhang u64 va_rr = ia64_get_rr(va);
42696651896SXiantao Zhang u64 va_rid = RR_TO_RID(va_rr);
42796651896SXiantao Zhang u64 va_end = va + (1<<log_size) - 1;
42896651896SXiantao Zhang
42996651896SXiantao Zhang if (va_rid != RR_TO_RID(p->rr))
43096651896SXiantao Zhang return 0;
43196651896SXiantao Zhang tr_log_size = (p->itir & 0xff) >> 2;
43296651896SXiantao Zhang tr_end = p->ifa + (1<<tr_log_size) - 1;
43396651896SXiantao Zhang
43496651896SXiantao Zhang if (va > tr_end || p->ifa > va_end)
43596651896SXiantao Zhang return 0;
43696651896SXiantao Zhang return 1;
43796651896SXiantao Zhang
43896651896SXiantao Zhang }
43996651896SXiantao Zhang
44096651896SXiantao Zhang /*
44196651896SXiantao Zhang * ia64_insert_tr in virtual mode. Allocate a TR slot
44296651896SXiantao Zhang *
44396651896SXiantao Zhang * target_mask : 0x1 : itr, 0x2 : dtr, 0x3 : idtr
44496651896SXiantao Zhang *
44596651896SXiantao Zhang * va : virtual address.
44696651896SXiantao Zhang * pte : pte entries inserted.
44796651896SXiantao Zhang * log_size: range to be covered.
44896651896SXiantao Zhang *
44996651896SXiantao Zhang * Return value: <0 : error No.
45096651896SXiantao Zhang *
45196651896SXiantao Zhang * >=0 : slot number allocated for TR.
45296651896SXiantao Zhang * Must be called with preemption disabled.
45396651896SXiantao Zhang */
ia64_itr_entry(u64 target_mask,u64 va,u64 pte,u64 log_size)45496651896SXiantao Zhang int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size)
45596651896SXiantao Zhang {
45696651896SXiantao Zhang int i, r;
45796651896SXiantao Zhang unsigned long psr;
45896651896SXiantao Zhang struct ia64_tr_entry *p;
45996651896SXiantao Zhang int cpu = smp_processor_id();
46096651896SXiantao Zhang
4616c57a332STony Luck if (!ia64_idtrs[cpu]) {
4626da2ec56SKees Cook ia64_idtrs[cpu] = kmalloc_array(2 * IA64_TR_ALLOC_MAX,
4636da2ec56SKees Cook sizeof(struct ia64_tr_entry),
4646da2ec56SKees Cook GFP_KERNEL);
4656c57a332STony Luck if (!ia64_idtrs[cpu])
4666c57a332STony Luck return -ENOMEM;
4676c57a332STony Luck }
46896651896SXiantao Zhang r = -EINVAL;
46996651896SXiantao Zhang /*Check overlap with existing TR entries*/
47096651896SXiantao Zhang if (target_mask & 0x1) {
4716c57a332STony Luck p = ia64_idtrs[cpu];
47296651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu);
47396651896SXiantao Zhang i++, p++) {
47496651896SXiantao Zhang if (p->pte & 0x1)
47596651896SXiantao Zhang if (is_tr_overlap(p, va, log_size)) {
47696651896SXiantao Zhang printk(KERN_DEBUG "Overlapped Entry"
4775e49e399SNik Nyby "Inserted for TR Register!!\n");
47896651896SXiantao Zhang goto out;
47996651896SXiantao Zhang }
48096651896SXiantao Zhang }
48196651896SXiantao Zhang }
48296651896SXiantao Zhang if (target_mask & 0x2) {
4836c57a332STony Luck p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX;
48496651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu);
48596651896SXiantao Zhang i++, p++) {
48696651896SXiantao Zhang if (p->pte & 0x1)
48796651896SXiantao Zhang if (is_tr_overlap(p, va, log_size)) {
48896651896SXiantao Zhang printk(KERN_DEBUG "Overlapped Entry"
4895e49e399SNik Nyby "Inserted for TR Register!!\n");
49096651896SXiantao Zhang goto out;
49196651896SXiantao Zhang }
49296651896SXiantao Zhang }
49396651896SXiantao Zhang }
49496651896SXiantao Zhang
49596651896SXiantao Zhang for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) {
49696651896SXiantao Zhang switch (target_mask & 0x3) {
49796651896SXiantao Zhang case 1:
4986c57a332STony Luck if (!((ia64_idtrs[cpu] + i)->pte & 0x1))
49996651896SXiantao Zhang goto found;
50096651896SXiantao Zhang continue;
50196651896SXiantao Zhang case 2:
5026c57a332STony Luck if (!((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1))
50396651896SXiantao Zhang goto found;
50496651896SXiantao Zhang continue;
50596651896SXiantao Zhang case 3:
5066c57a332STony Luck if (!((ia64_idtrs[cpu] + i)->pte & 0x1) &&
5076c57a332STony Luck !((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1))
50896651896SXiantao Zhang goto found;
50996651896SXiantao Zhang continue;
51096651896SXiantao Zhang default:
51196651896SXiantao Zhang r = -EINVAL;
51296651896SXiantao Zhang goto out;
51396651896SXiantao Zhang }
51496651896SXiantao Zhang }
51596651896SXiantao Zhang found:
51696651896SXiantao Zhang if (i >= per_cpu(ia64_tr_num, cpu))
51796651896SXiantao Zhang return -EBUSY;
51896651896SXiantao Zhang
519*0af96a02SJulia Lawall /*Record tr info for mca handler use!*/
52096651896SXiantao Zhang if (i > per_cpu(ia64_tr_used, cpu))
52196651896SXiantao Zhang per_cpu(ia64_tr_used, cpu) = i;
52296651896SXiantao Zhang
52396651896SXiantao Zhang psr = ia64_clear_ic();
52496651896SXiantao Zhang if (target_mask & 0x1) {
52596651896SXiantao Zhang ia64_itr(0x1, i, va, pte, log_size);
52696651896SXiantao Zhang ia64_srlz_i();
5276c57a332STony Luck p = ia64_idtrs[cpu] + i;
52896651896SXiantao Zhang p->ifa = va;
52996651896SXiantao Zhang p->pte = pte;
53096651896SXiantao Zhang p->itir = log_size << 2;
53196651896SXiantao Zhang p->rr = ia64_get_rr(va);
53296651896SXiantao Zhang }
53396651896SXiantao Zhang if (target_mask & 0x2) {
53496651896SXiantao Zhang ia64_itr(0x2, i, va, pte, log_size);
53596651896SXiantao Zhang ia64_srlz_i();
5366c57a332STony Luck p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i;
53796651896SXiantao Zhang p->ifa = va;
53896651896SXiantao Zhang p->pte = pte;
53996651896SXiantao Zhang p->itir = log_size << 2;
54096651896SXiantao Zhang p->rr = ia64_get_rr(va);
54196651896SXiantao Zhang }
54296651896SXiantao Zhang ia64_set_psr(psr);
54396651896SXiantao Zhang r = i;
54496651896SXiantao Zhang out:
54596651896SXiantao Zhang return r;
54696651896SXiantao Zhang }
54796651896SXiantao Zhang EXPORT_SYMBOL_GPL(ia64_itr_entry);
54896651896SXiantao Zhang
54996651896SXiantao Zhang /*
55096651896SXiantao Zhang * ia64_purge_tr
55196651896SXiantao Zhang *
55296651896SXiantao Zhang * target_mask: 0x1: purge itr, 0x2 : purge dtr, 0x3 purge idtr.
55396651896SXiantao Zhang * slot: slot number to be freed.
55496651896SXiantao Zhang *
55596651896SXiantao Zhang * Must be called with preemption disabled.
55696651896SXiantao Zhang */
ia64_ptr_entry(u64 target_mask,int slot)55796651896SXiantao Zhang void ia64_ptr_entry(u64 target_mask, int slot)
55896651896SXiantao Zhang {
55996651896SXiantao Zhang int cpu = smp_processor_id();
56096651896SXiantao Zhang int i;
56196651896SXiantao Zhang struct ia64_tr_entry *p;
56296651896SXiantao Zhang
56396651896SXiantao Zhang if (slot < IA64_TR_ALLOC_BASE || slot >= per_cpu(ia64_tr_num, cpu))
56496651896SXiantao Zhang return;
56596651896SXiantao Zhang
56696651896SXiantao Zhang if (target_mask & 0x1) {
5676c57a332STony Luck p = ia64_idtrs[cpu] + slot;
56896651896SXiantao Zhang if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) {
56996651896SXiantao Zhang p->pte = 0;
57096651896SXiantao Zhang ia64_ptr(0x1, p->ifa, p->itir>>2);
57196651896SXiantao Zhang ia64_srlz_i();
57296651896SXiantao Zhang }
57396651896SXiantao Zhang }
57496651896SXiantao Zhang
57596651896SXiantao Zhang if (target_mask & 0x2) {
5766c57a332STony Luck p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + slot;
57796651896SXiantao Zhang if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) {
57896651896SXiantao Zhang p->pte = 0;
57996651896SXiantao Zhang ia64_ptr(0x2, p->ifa, p->itir>>2);
58096651896SXiantao Zhang ia64_srlz_i();
58196651896SXiantao Zhang }
58296651896SXiantao Zhang }
58396651896SXiantao Zhang
58496651896SXiantao Zhang for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) {
5856c57a332STony Luck if (((ia64_idtrs[cpu] + i)->pte & 0x1) ||
5866c57a332STony Luck ((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1))
58796651896SXiantao Zhang break;
58896651896SXiantao Zhang }
58996651896SXiantao Zhang per_cpu(ia64_tr_used, cpu) = i;
59096651896SXiantao Zhang }
59196651896SXiantao Zhang EXPORT_SYMBOL_GPL(ia64_ptr_entry);
592