xref: /openbmc/linux/arch/ia64/mm/fault.c (revision 64c70b1c)
1 /*
2  * MMU fault handling support.
3  *
4  * Copyright (C) 1998-2002 Hewlett-Packard Co
5  *	David Mosberger-Tang <davidm@hpl.hp.com>
6  */
7 #include <linux/sched.h>
8 #include <linux/kernel.h>
9 #include <linux/mm.h>
10 #include <linux/interrupt.h>
11 #include <linux/kprobes.h>
12 #include <linux/kdebug.h>
13 
14 #include <asm/pgtable.h>
15 #include <asm/processor.h>
16 #include <asm/system.h>
17 #include <asm/uaccess.h>
18 
19 extern void die (char *, struct pt_regs *, long);
20 
21 #ifdef CONFIG_KPROBES
22 static inline int notify_page_fault(struct pt_regs *regs, int trap)
23 {
24 	int ret = 0;
25 
26 	if (!user_mode(regs)) {
27 		/* kprobe_running() needs smp_processor_id() */
28 		preempt_disable();
29 		if (kprobe_running() && kprobes_fault_handler(regs, trap))
30 			ret = 1;
31 		preempt_enable();
32 	}
33 
34 	return ret;
35 }
36 #else
37 static inline int notify_page_fault(struct pt_regs *regs, int trap)
38 {
39 	return 0;
40 }
41 #endif
42 
43 /*
44  * Return TRUE if ADDRESS points at a page in the kernel's mapped segment
45  * (inside region 5, on ia64) and that page is present.
46  */
47 static int
48 mapped_kernel_page_is_present (unsigned long address)
49 {
50 	pgd_t *pgd;
51 	pud_t *pud;
52 	pmd_t *pmd;
53 	pte_t *ptep, pte;
54 
55 	pgd = pgd_offset_k(address);
56 	if (pgd_none(*pgd) || pgd_bad(*pgd))
57 		return 0;
58 
59 	pud = pud_offset(pgd, address);
60 	if (pud_none(*pud) || pud_bad(*pud))
61 		return 0;
62 
63 	pmd = pmd_offset(pud, address);
64 	if (pmd_none(*pmd) || pmd_bad(*pmd))
65 		return 0;
66 
67 	ptep = pte_offset_kernel(pmd, address);
68 	if (!ptep)
69 		return 0;
70 
71 	pte = *ptep;
72 	return pte_present(pte);
73 }
74 
75 void __kprobes
76 ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *regs)
77 {
78 	int signal = SIGSEGV, code = SEGV_MAPERR;
79 	struct vm_area_struct *vma, *prev_vma;
80 	struct mm_struct *mm = current->mm;
81 	struct siginfo si;
82 	unsigned long mask;
83 
84 	/* mmap_sem is performance critical.... */
85 	prefetchw(&mm->mmap_sem);
86 
87 	/*
88 	 * If we're in an interrupt or have no user context, we must not take the fault..
89 	 */
90 	if (in_atomic() || !mm)
91 		goto no_context;
92 
93 #ifdef CONFIG_VIRTUAL_MEM_MAP
94 	/*
95 	 * If fault is in region 5 and we are in the kernel, we may already
96 	 * have the mmap_sem (pfn_valid macro is called during mmap). There
97 	 * is no vma for region 5 addr's anyway, so skip getting the semaphore
98 	 * and go directly to the exception handling code.
99 	 */
100 
101 	if ((REGION_NUMBER(address) == 5) && !user_mode(regs))
102 		goto bad_area_no_up;
103 #endif
104 
105 	/*
106 	 * This is to handle the kprobes on user space access instructions
107 	 */
108 	if (notify_page_fault(regs, TRAP_BRKPT))
109 		return;
110 
111 	down_read(&mm->mmap_sem);
112 
113 	vma = find_vma_prev(mm, address, &prev_vma);
114 	if (!vma)
115 		goto bad_area;
116 
117 	/* find_vma_prev() returns vma such that address < vma->vm_end or NULL */
118 	if (address < vma->vm_start)
119 		goto check_expansion;
120 
121   good_area:
122 	code = SEGV_ACCERR;
123 
124 	/* OK, we've got a good vm_area for this memory area.  Check the access permissions: */
125 
126 #	define VM_READ_BIT	0
127 #	define VM_WRITE_BIT	1
128 #	define VM_EXEC_BIT	2
129 
130 #	if (((1 << VM_READ_BIT) != VM_READ || (1 << VM_WRITE_BIT) != VM_WRITE) \
131 	    || (1 << VM_EXEC_BIT) != VM_EXEC)
132 #		error File is out of sync with <linux/mm.h>.  Please update.
133 #	endif
134 
135 	if (((isr >> IA64_ISR_R_BIT) & 1UL) && (!(vma->vm_flags & (VM_READ | VM_WRITE))))
136 		goto bad_area;
137 
138 	mask = (  (((isr >> IA64_ISR_X_BIT) & 1UL) << VM_EXEC_BIT)
139 		| (((isr >> IA64_ISR_W_BIT) & 1UL) << VM_WRITE_BIT));
140 
141 	if ((vma->vm_flags & mask) != mask)
142 		goto bad_area;
143 
144   survive:
145 	/*
146 	 * If for any reason at all we couldn't handle the fault, make
147 	 * sure we exit gracefully rather than endlessly redo the
148 	 * fault.
149 	 */
150 	switch (handle_mm_fault(mm, vma, address, (mask & VM_WRITE) != 0)) {
151 	      case VM_FAULT_MINOR:
152 		++current->min_flt;
153 		break;
154 	      case VM_FAULT_MAJOR:
155 		++current->maj_flt;
156 		break;
157 	      case VM_FAULT_SIGBUS:
158 		/*
159 		 * We ran out of memory, or some other thing happened
160 		 * to us that made us unable to handle the page fault
161 		 * gracefully.
162 		 */
163 		signal = SIGBUS;
164 		goto bad_area;
165 	      case VM_FAULT_OOM:
166 		goto out_of_memory;
167 	      default:
168 		BUG();
169 	}
170 	up_read(&mm->mmap_sem);
171 	return;
172 
173   check_expansion:
174 	if (!(prev_vma && (prev_vma->vm_flags & VM_GROWSUP) && (address == prev_vma->vm_end))) {
175 		if (!(vma->vm_flags & VM_GROWSDOWN))
176 			goto bad_area;
177 		if (REGION_NUMBER(address) != REGION_NUMBER(vma->vm_start)
178 		    || REGION_OFFSET(address) >= RGN_MAP_LIMIT)
179 			goto bad_area;
180 		if (expand_stack(vma, address))
181 			goto bad_area;
182 	} else {
183 		vma = prev_vma;
184 		if (REGION_NUMBER(address) != REGION_NUMBER(vma->vm_start)
185 		    || REGION_OFFSET(address) >= RGN_MAP_LIMIT)
186 			goto bad_area;
187 		/*
188 		 * Since the register backing store is accessed sequentially,
189 		 * we disallow growing it by more than a page at a time.
190 		 */
191 		if (address > vma->vm_end + PAGE_SIZE - sizeof(long))
192 			goto bad_area;
193 		if (expand_upwards(vma, address))
194 			goto bad_area;
195 	}
196 	goto good_area;
197 
198   bad_area:
199 	up_read(&mm->mmap_sem);
200 #ifdef CONFIG_VIRTUAL_MEM_MAP
201   bad_area_no_up:
202 #endif
203 	if ((isr & IA64_ISR_SP)
204 	    || ((isr & IA64_ISR_NA) && (isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH))
205 	{
206 		/*
207 		 * This fault was due to a speculative load or lfetch.fault, set the "ed"
208 		 * bit in the psr to ensure forward progress.  (Target register will get a
209 		 * NaT for ld.s, lfetch will be canceled.)
210 		 */
211 		ia64_psr(regs)->ed = 1;
212 		return;
213 	}
214 	if (user_mode(regs)) {
215 		si.si_signo = signal;
216 		si.si_errno = 0;
217 		si.si_code = code;
218 		si.si_addr = (void __user *) address;
219 		si.si_isr = isr;
220 		si.si_flags = __ISR_VALID;
221 		force_sig_info(signal, &si, current);
222 		return;
223 	}
224 
225   no_context:
226 	if ((isr & IA64_ISR_SP)
227 	    || ((isr & IA64_ISR_NA) && (isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH))
228 	{
229 		/*
230 		 * This fault was due to a speculative load or lfetch.fault, set the "ed"
231 		 * bit in the psr to ensure forward progress.  (Target register will get a
232 		 * NaT for ld.s, lfetch will be canceled.)
233 		 */
234 		ia64_psr(regs)->ed = 1;
235 		return;
236 	}
237 
238 	/*
239 	 * Since we have no vma's for region 5, we might get here even if the address is
240 	 * valid, due to the VHPT walker inserting a non present translation that becomes
241 	 * stale. If that happens, the non present fault handler already purged the stale
242 	 * translation, which fixed the problem. So, we check to see if the translation is
243 	 * valid, and return if it is.
244 	 */
245 	if (REGION_NUMBER(address) == 5 && mapped_kernel_page_is_present(address))
246 		return;
247 
248 	if (ia64_done_with_exception(regs))
249 		return;
250 
251 	/*
252 	 * Oops. The kernel tried to access some bad page. We'll have to terminate things
253 	 * with extreme prejudice.
254 	 */
255 	bust_spinlocks(1);
256 
257 	if (address < PAGE_SIZE)
258 		printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference (address %016lx)\n", address);
259 	else
260 		printk(KERN_ALERT "Unable to handle kernel paging request at "
261 		       "virtual address %016lx\n", address);
262 	die("Oops", regs, isr);
263 	bust_spinlocks(0);
264 	do_exit(SIGKILL);
265 	return;
266 
267   out_of_memory:
268 	up_read(&mm->mmap_sem);
269 	if (is_init(current)) {
270 		yield();
271 		down_read(&mm->mmap_sem);
272 		goto survive;
273 	}
274 	printk(KERN_CRIT "VM: killing process %s\n", current->comm);
275 	if (user_mode(regs))
276 		do_exit(SIGKILL);
277 	goto no_context;
278 }
279