xref: /openbmc/linux/arch/ia64/kernel/traps.c (revision 4f6cce39)
1 /*
2  * Architecture-specific trap handling.
3  *
4  * Copyright (C) 1998-2003 Hewlett-Packard Co
5  *	David Mosberger-Tang <davidm@hpl.hp.com>
6  *
7  * 05/12/00 grao <goutham.rao@intel.com> : added isr in siginfo for SIGFPE
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/sched/signal.h>
13 #include <linux/sched/debug.h>
14 #include <linux/tty.h>
15 #include <linux/vt_kern.h>		/* For unblank_screen() */
16 #include <linux/export.h>
17 #include <linux/extable.h>
18 #include <linux/hardirq.h>
19 #include <linux/kprobes.h>
20 #include <linux/delay.h>		/* for ssleep() */
21 #include <linux/kdebug.h>
22 #include <linux/uaccess.h>
23 
24 #include <asm/fpswa.h>
25 #include <asm/intrinsics.h>
26 #include <asm/processor.h>
27 #include <asm/exception.h>
28 #include <asm/setup.h>
29 
30 fpswa_interface_t *fpswa_interface;
31 EXPORT_SYMBOL(fpswa_interface);
32 
33 void __init
34 trap_init (void)
35 {
36 	if (ia64_boot_param->fpswa)
37 		/* FPSWA fixup: make the interface pointer a kernel virtual address: */
38 		fpswa_interface = __va(ia64_boot_param->fpswa);
39 }
40 
41 int
42 die (const char *str, struct pt_regs *regs, long err)
43 {
44 	static struct {
45 		spinlock_t lock;
46 		u32 lock_owner;
47 		int lock_owner_depth;
48 	} die = {
49 		.lock =	__SPIN_LOCK_UNLOCKED(die.lock),
50 		.lock_owner = -1,
51 		.lock_owner_depth = 0
52 	};
53 	static int die_counter;
54 	int cpu = get_cpu();
55 
56 	if (die.lock_owner != cpu) {
57 		console_verbose();
58 		spin_lock_irq(&die.lock);
59 		die.lock_owner = cpu;
60 		die.lock_owner_depth = 0;
61 		bust_spinlocks(1);
62 	}
63 	put_cpu();
64 
65 	if (++die.lock_owner_depth < 3) {
66 		printk("%s[%d]: %s %ld [%d]\n",
67 		current->comm, task_pid_nr(current), str, err, ++die_counter);
68 		if (notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV)
69 	            != NOTIFY_STOP)
70 			show_regs(regs);
71 		else
72 			regs = NULL;
73   	} else
74 		printk(KERN_ERR "Recursive die() failure, output suppressed\n");
75 
76 	bust_spinlocks(0);
77 	die.lock_owner = -1;
78 	add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
79 	spin_unlock_irq(&die.lock);
80 
81 	if (!regs)
82 		return 1;
83 
84 	if (panic_on_oops)
85 		panic("Fatal exception");
86 
87   	do_exit(SIGSEGV);
88 	return 0;
89 }
90 
91 int
92 die_if_kernel (char *str, struct pt_regs *regs, long err)
93 {
94 	if (!user_mode(regs))
95 		return die(str, regs, err);
96 	return 0;
97 }
98 
99 void
100 __kprobes ia64_bad_break (unsigned long break_num, struct pt_regs *regs)
101 {
102 	siginfo_t siginfo;
103 	int sig, code;
104 
105 	/* SIGILL, SIGFPE, SIGSEGV, and SIGBUS want these field initialized: */
106 	siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
107 	siginfo.si_imm = break_num;
108 	siginfo.si_flags = 0;		/* clear __ISR_VALID */
109 	siginfo.si_isr = 0;
110 
111 	switch (break_num) {
112 	      case 0: /* unknown error (used by GCC for __builtin_abort()) */
113 		if (notify_die(DIE_BREAK, "break 0", regs, break_num, TRAP_BRKPT, SIGTRAP)
114 			       	== NOTIFY_STOP)
115 			return;
116 		if (die_if_kernel("bugcheck!", regs, break_num))
117 			return;
118 		sig = SIGILL; code = ILL_ILLOPC;
119 		break;
120 
121 	      case 1: /* integer divide by zero */
122 		sig = SIGFPE; code = FPE_INTDIV;
123 		break;
124 
125 	      case 2: /* integer overflow */
126 		sig = SIGFPE; code = FPE_INTOVF;
127 		break;
128 
129 	      case 3: /* range check/bounds check */
130 		sig = SIGFPE; code = FPE_FLTSUB;
131 		break;
132 
133 	      case 4: /* null pointer dereference */
134 		sig = SIGSEGV; code = SEGV_MAPERR;
135 		break;
136 
137 	      case 5: /* misaligned data */
138 		sig = SIGSEGV; code = BUS_ADRALN;
139 		break;
140 
141 	      case 6: /* decimal overflow */
142 		sig = SIGFPE; code = __FPE_DECOVF;
143 		break;
144 
145 	      case 7: /* decimal divide by zero */
146 		sig = SIGFPE; code = __FPE_DECDIV;
147 		break;
148 
149 	      case 8: /* packed decimal error */
150 		sig = SIGFPE; code = __FPE_DECERR;
151 		break;
152 
153 	      case 9: /* invalid ASCII digit */
154 		sig = SIGFPE; code = __FPE_INVASC;
155 		break;
156 
157 	      case 10: /* invalid decimal digit */
158 		sig = SIGFPE; code = __FPE_INVDEC;
159 		break;
160 
161 	      case 11: /* paragraph stack overflow */
162 		sig = SIGSEGV; code = __SEGV_PSTKOVF;
163 		break;
164 
165 	      case 0x3f000 ... 0x3ffff:	/* bundle-update in progress */
166 		sig = SIGILL; code = __ILL_BNDMOD;
167 		break;
168 
169 	      default:
170 		if ((break_num < 0x40000 || break_num > 0x100000)
171 		    && die_if_kernel("Bad break", regs, break_num))
172 			return;
173 
174 		if (break_num < 0x80000) {
175 			sig = SIGILL; code = __ILL_BREAK;
176 		} else {
177 			if (notify_die(DIE_BREAK, "bad break", regs, break_num, TRAP_BRKPT, SIGTRAP)
178 					== NOTIFY_STOP)
179 				return;
180 			sig = SIGTRAP; code = TRAP_BRKPT;
181 		}
182 	}
183 	siginfo.si_signo = sig;
184 	siginfo.si_errno = 0;
185 	siginfo.si_code = code;
186 	force_sig_info(sig, &siginfo, current);
187 }
188 
189 /*
190  * disabled_fph_fault() is called when a user-level process attempts to access f32..f127
191  * and it doesn't own the fp-high register partition.  When this happens, we save the
192  * current fph partition in the task_struct of the fpu-owner (if necessary) and then load
193  * the fp-high partition of the current task (if necessary).  Note that the kernel has
194  * access to fph by the time we get here, as the IVT's "Disabled FP-Register" handler takes
195  * care of clearing psr.dfh.
196  */
197 static inline void
198 disabled_fph_fault (struct pt_regs *regs)
199 {
200 	struct ia64_psr *psr = ia64_psr(regs);
201 
202 	/* first, grant user-level access to fph partition: */
203 	psr->dfh = 0;
204 
205 	/*
206 	 * Make sure that no other task gets in on this processor
207 	 * while we're claiming the FPU
208 	 */
209 	preempt_disable();
210 #ifndef CONFIG_SMP
211 	{
212 		struct task_struct *fpu_owner
213 			= (struct task_struct *)ia64_get_kr(IA64_KR_FPU_OWNER);
214 
215 		if (ia64_is_local_fpu_owner(current)) {
216 			preempt_enable_no_resched();
217 			return;
218 		}
219 
220 		if (fpu_owner)
221 			ia64_flush_fph(fpu_owner);
222 	}
223 #endif /* !CONFIG_SMP */
224 	ia64_set_local_fpu_owner(current);
225 	if ((current->thread.flags & IA64_THREAD_FPH_VALID) != 0) {
226 		__ia64_load_fpu(current->thread.fph);
227 		psr->mfh = 0;
228 	} else {
229 		__ia64_init_fpu();
230 		/*
231 		 * Set mfh because the state in thread.fph does not match the state in
232 		 * the fph partition.
233 		 */
234 		psr->mfh = 1;
235 	}
236 	preempt_enable_no_resched();
237 }
238 
239 static inline int
240 fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs,
241 	    struct pt_regs *regs)
242 {
243 	fp_state_t fp_state;
244 	fpswa_ret_t ret;
245 
246 	if (!fpswa_interface)
247 		return -1;
248 
249 	memset(&fp_state, 0, sizeof(fp_state_t));
250 
251 	/*
252 	 * compute fp_state.  only FP registers f6 - f11 are used by the
253 	 * kernel, so set those bits in the mask and set the low volatile
254 	 * pointer to point to these registers.
255 	 */
256 	fp_state.bitmask_low64 = 0xfc0;  /* bit6..bit11 */
257 
258 	fp_state.fp_state_low_volatile = (fp_state_low_volatile_t *) &regs->f6;
259 	/*
260 	 * unsigned long (*EFI_FPSWA) (
261 	 *      unsigned long    trap_type,
262 	 *	void             *Bundle,
263 	 *	unsigned long    *pipsr,
264 	 *	unsigned long    *pfsr,
265 	 *	unsigned long    *pisr,
266 	 *	unsigned long    *ppreds,
267 	 *	unsigned long    *pifs,
268 	 *	void             *fp_state);
269 	 */
270 	ret = (*fpswa_interface->fpswa)((unsigned long) fp_fault, bundle,
271 					(unsigned long *) ipsr, (unsigned long *) fpsr,
272 					(unsigned long *) isr, (unsigned long *) pr,
273 					(unsigned long *) ifs, &fp_state);
274 
275 	return ret.status;
276 }
277 
278 struct fpu_swa_msg {
279 	unsigned long count;
280 	unsigned long time;
281 };
282 static DEFINE_PER_CPU(struct fpu_swa_msg, cpulast);
283 DECLARE_PER_CPU(struct fpu_swa_msg, cpulast);
284 static struct fpu_swa_msg last __cacheline_aligned;
285 
286 
287 /*
288  * Handle floating-point assist faults and traps.
289  */
290 static int
291 handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)
292 {
293 	long exception, bundle[2];
294 	unsigned long fault_ip;
295 	struct siginfo siginfo;
296 
297 	fault_ip = regs->cr_iip;
298 	if (!fp_fault && (ia64_psr(regs)->ri == 0))
299 		fault_ip -= 16;
300 	if (copy_from_user(bundle, (void __user *) fault_ip, sizeof(bundle)))
301 		return -1;
302 
303 	if (!(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT))  {
304 		unsigned long count, current_jiffies = jiffies;
305 		struct fpu_swa_msg *cp = this_cpu_ptr(&cpulast);
306 
307 		if (unlikely(current_jiffies > cp->time))
308 			cp->count = 0;
309 		if (unlikely(cp->count < 5)) {
310 			cp->count++;
311 			cp->time = current_jiffies + 5 * HZ;
312 
313 			/* minimize races by grabbing a copy of count BEFORE checking last.time. */
314 			count = last.count;
315 			barrier();
316 
317 			/*
318 			 * Lower 4 bits are used as a count. Upper bits are a sequence
319 			 * number that is updated when count is reset. The cmpxchg will
320 			 * fail is seqno has changed. This minimizes mutiple cpus
321 			 * resetting the count.
322 			 */
323 			if (current_jiffies > last.time)
324 				(void) cmpxchg_acq(&last.count, count, 16 + (count & ~15));
325 
326 			/* used fetchadd to atomically update the count */
327 			if ((last.count & 15) < 5 && (ia64_fetchadd(1, &last.count, acq) & 15) < 5) {
328 				last.time = current_jiffies + 5 * HZ;
329 				printk(KERN_WARNING
330 		       			"%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
331 		       			current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr);
332 			}
333 		}
334 	}
335 
336 	exception = fp_emulate(fp_fault, bundle, &regs->cr_ipsr, &regs->ar_fpsr, &isr, &regs->pr,
337 			       &regs->cr_ifs, regs);
338 	if (fp_fault) {
339 		if (exception == 0) {
340 			/* emulation was successful */
341 			ia64_increment_ip(regs);
342 		} else if (exception == -1) {
343 			printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n");
344 			return -1;
345 		} else {
346 			/* is next instruction a trap? */
347 			if (exception & 2) {
348 				ia64_increment_ip(regs);
349 			}
350 			siginfo.si_signo = SIGFPE;
351 			siginfo.si_errno = 0;
352 			siginfo.si_code = __SI_FAULT;	/* default code */
353 			siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
354 			if (isr & 0x11) {
355 				siginfo.si_code = FPE_FLTINV;
356 			} else if (isr & 0x22) {
357 				/* denormal operand gets the same si_code as underflow
358 				* see arch/i386/kernel/traps.c:math_error()  */
359 				siginfo.si_code = FPE_FLTUND;
360 			} else if (isr & 0x44) {
361 				siginfo.si_code = FPE_FLTDIV;
362 			}
363 			siginfo.si_isr = isr;
364 			siginfo.si_flags = __ISR_VALID;
365 			siginfo.si_imm = 0;
366 			force_sig_info(SIGFPE, &siginfo, current);
367 		}
368 	} else {
369 		if (exception == -1) {
370 			printk(KERN_ERR "handle_fpu_swa: fp_emulate() returned -1\n");
371 			return -1;
372 		} else if (exception != 0) {
373 			/* raise exception */
374 			siginfo.si_signo = SIGFPE;
375 			siginfo.si_errno = 0;
376 			siginfo.si_code = __SI_FAULT;	/* default code */
377 			siginfo.si_addr = (void __user *) (regs->cr_iip + ia64_psr(regs)->ri);
378 			if (isr & 0x880) {
379 				siginfo.si_code = FPE_FLTOVF;
380 			} else if (isr & 0x1100) {
381 				siginfo.si_code = FPE_FLTUND;
382 			} else if (isr & 0x2200) {
383 				siginfo.si_code = FPE_FLTRES;
384 			}
385 			siginfo.si_isr = isr;
386 			siginfo.si_flags = __ISR_VALID;
387 			siginfo.si_imm = 0;
388 			force_sig_info(SIGFPE, &siginfo, current);
389 		}
390 	}
391 	return 0;
392 }
393 
394 struct illegal_op_return {
395 	unsigned long fkt, arg1, arg2, arg3;
396 };
397 
398 struct illegal_op_return
399 ia64_illegal_op_fault (unsigned long ec, long arg1, long arg2, long arg3,
400 		       long arg4, long arg5, long arg6, long arg7,
401 		       struct pt_regs regs)
402 {
403 	struct illegal_op_return rv;
404 	struct siginfo si;
405 	char buf[128];
406 
407 #ifdef CONFIG_IA64_BRL_EMU
408 	{
409 		extern struct illegal_op_return ia64_emulate_brl (struct pt_regs *, unsigned long);
410 
411 		rv = ia64_emulate_brl(&regs, ec);
412 		if (rv.fkt != (unsigned long) -1)
413 			return rv;
414 	}
415 #endif
416 
417 	sprintf(buf, "IA-64 Illegal operation fault");
418 	rv.fkt = 0;
419 	if (die_if_kernel(buf, &regs, 0))
420 		return rv;
421 
422 	memset(&si, 0, sizeof(si));
423 	si.si_signo = SIGILL;
424 	si.si_code = ILL_ILLOPC;
425 	si.si_addr = (void __user *) (regs.cr_iip + ia64_psr(&regs)->ri);
426 	force_sig_info(SIGILL, &si, current);
427 	return rv;
428 }
429 
430 void __kprobes
431 ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,
432 	    unsigned long iim, unsigned long itir, long arg5, long arg6,
433 	    long arg7, struct pt_regs regs)
434 {
435 	unsigned long code, error = isr, iip;
436 	struct siginfo siginfo;
437 	char buf[128];
438 	int result, sig;
439 	static const char *reason[] = {
440 		"IA-64 Illegal Operation fault",
441 		"IA-64 Privileged Operation fault",
442 		"IA-64 Privileged Register fault",
443 		"IA-64 Reserved Register/Field fault",
444 		"Disabled Instruction Set Transition fault",
445 		"Unknown fault 5", "Unknown fault 6", "Unknown fault 7", "Illegal Hazard fault",
446 		"Unknown fault 9", "Unknown fault 10", "Unknown fault 11", "Unknown fault 12",
447 		"Unknown fault 13", "Unknown fault 14", "Unknown fault 15"
448 	};
449 
450 	if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {
451 		/*
452 		 * This fault was due to lfetch.fault, set "ed" bit in the psr to cancel
453 		 * the lfetch.
454 		 */
455 		ia64_psr(&regs)->ed = 1;
456 		return;
457 	}
458 
459 	iip = regs.cr_iip + ia64_psr(&regs)->ri;
460 
461 	switch (vector) {
462 	      case 24: /* General Exception */
463 		code = (isr >> 4) & 0xf;
464 		sprintf(buf, "General Exception: %s%s", reason[code],
465 			(code == 3) ? ((isr & (1UL << 37))
466 				       ? " (RSE access)" : " (data access)") : "");
467 		if (code == 8) {
468 # ifdef CONFIG_IA64_PRINT_HAZARDS
469 			printk("%s[%d]: possible hazard @ ip=%016lx (pr = %016lx)\n",
470 			       current->comm, task_pid_nr(current),
471 			       regs.cr_iip + ia64_psr(&regs)->ri, regs.pr);
472 # endif
473 			return;
474 		}
475 		break;
476 
477 	      case 25: /* Disabled FP-Register */
478 		if (isr & 2) {
479 			disabled_fph_fault(&regs);
480 			return;
481 		}
482 		sprintf(buf, "Disabled FPL fault---not supposed to happen!");
483 		break;
484 
485 	      case 26: /* NaT Consumption */
486 		if (user_mode(&regs)) {
487 			void __user *addr;
488 
489 			if (((isr >> 4) & 0xf) == 2) {
490 				/* NaT page consumption */
491 				sig = SIGSEGV;
492 				code = SEGV_ACCERR;
493 				addr = (void __user *) ifa;
494 			} else {
495 				/* register NaT consumption */
496 				sig = SIGILL;
497 				code = ILL_ILLOPN;
498 				addr = (void __user *) (regs.cr_iip
499 							+ ia64_psr(&regs)->ri);
500 			}
501 			siginfo.si_signo = sig;
502 			siginfo.si_code = code;
503 			siginfo.si_errno = 0;
504 			siginfo.si_addr = addr;
505 			siginfo.si_imm = vector;
506 			siginfo.si_flags = __ISR_VALID;
507 			siginfo.si_isr = isr;
508 			force_sig_info(sig, &siginfo, current);
509 			return;
510 		} else if (ia64_done_with_exception(&regs))
511 			return;
512 		sprintf(buf, "NaT consumption");
513 		break;
514 
515 	      case 31: /* Unsupported Data Reference */
516 		if (user_mode(&regs)) {
517 			siginfo.si_signo = SIGILL;
518 			siginfo.si_code = ILL_ILLOPN;
519 			siginfo.si_errno = 0;
520 			siginfo.si_addr = (void __user *) iip;
521 			siginfo.si_imm = vector;
522 			siginfo.si_flags = __ISR_VALID;
523 			siginfo.si_isr = isr;
524 			force_sig_info(SIGILL, &siginfo, current);
525 			return;
526 		}
527 		sprintf(buf, "Unsupported data reference");
528 		break;
529 
530 	      case 29: /* Debug */
531 	      case 35: /* Taken Branch Trap */
532 	      case 36: /* Single Step Trap */
533 		if (fsys_mode(current, &regs)) {
534 			extern char __kernel_syscall_via_break[];
535 			/*
536 			 * Got a trap in fsys-mode: Taken Branch Trap
537 			 * and Single Step trap need special handling;
538 			 * Debug trap is ignored (we disable it here
539 			 * and re-enable it in the lower-privilege trap).
540 			 */
541 			if (unlikely(vector == 29)) {
542 				set_thread_flag(TIF_DB_DISABLED);
543 				ia64_psr(&regs)->db = 0;
544 				ia64_psr(&regs)->lp = 1;
545 				return;
546 			}
547 			/* re-do the system call via break 0x100000: */
548 			regs.cr_iip = (unsigned long) __kernel_syscall_via_break;
549 			ia64_psr(&regs)->ri = 0;
550 			ia64_psr(&regs)->cpl = 3;
551 			return;
552 		}
553 		switch (vector) {
554 		      default:
555 		      case 29:
556 			siginfo.si_code = TRAP_HWBKPT;
557 #ifdef CONFIG_ITANIUM
558 			/*
559 			 * Erratum 10 (IFA may contain incorrect address) now has
560 			 * "NoFix" status.  There are no plans for fixing this.
561 			 */
562 			if (ia64_psr(&regs)->is == 0)
563 			  ifa = regs.cr_iip;
564 #endif
565 			break;
566 		      case 35: siginfo.si_code = TRAP_BRANCH; ifa = 0; break;
567 		      case 36: siginfo.si_code = TRAP_TRACE; ifa = 0; break;
568 		}
569 		if (notify_die(DIE_FAULT, "ia64_fault", &regs, vector, siginfo.si_code, SIGTRAP)
570 			       	== NOTIFY_STOP)
571 			return;
572 		siginfo.si_signo = SIGTRAP;
573 		siginfo.si_errno = 0;
574 		siginfo.si_addr  = (void __user *) ifa;
575 		siginfo.si_imm   = 0;
576 		siginfo.si_flags = __ISR_VALID;
577 		siginfo.si_isr   = isr;
578 		force_sig_info(SIGTRAP, &siginfo, current);
579 		return;
580 
581 	      case 32: /* fp fault */
582 	      case 33: /* fp trap */
583 		result = handle_fpu_swa((vector == 32) ? 1 : 0, &regs, isr);
584 		if ((result < 0) || (current->thread.flags & IA64_THREAD_FPEMU_SIGFPE)) {
585 			siginfo.si_signo = SIGFPE;
586 			siginfo.si_errno = 0;
587 			siginfo.si_code = FPE_FLTINV;
588 			siginfo.si_addr = (void __user *) iip;
589 			siginfo.si_flags = __ISR_VALID;
590 			siginfo.si_isr = isr;
591 			siginfo.si_imm = 0;
592 			force_sig_info(SIGFPE, &siginfo, current);
593 		}
594 		return;
595 
596 	      case 34:
597 		if (isr & 0x2) {
598 			/* Lower-Privilege Transfer Trap */
599 
600 			/* If we disabled debug traps during an fsyscall,
601 			 * re-enable them here.
602 			 */
603 			if (test_thread_flag(TIF_DB_DISABLED)) {
604 				clear_thread_flag(TIF_DB_DISABLED);
605 				ia64_psr(&regs)->db = 1;
606 			}
607 
608 			/*
609 			 * Just clear PSR.lp and then return immediately:
610 			 * all the interesting work (e.g., signal delivery)
611 			 * is done in the kernel exit path.
612 			 */
613 			ia64_psr(&regs)->lp = 0;
614 			return;
615 		} else {
616 			/* Unimplemented Instr. Address Trap */
617 			if (user_mode(&regs)) {
618 				siginfo.si_signo = SIGILL;
619 				siginfo.si_code = ILL_BADIADDR;
620 				siginfo.si_errno = 0;
621 				siginfo.si_flags = 0;
622 				siginfo.si_isr = 0;
623 				siginfo.si_imm = 0;
624 				siginfo.si_addr = (void __user *) iip;
625 				force_sig_info(SIGILL, &siginfo, current);
626 				return;
627 			}
628 			sprintf(buf, "Unimplemented Instruction Address fault");
629 		}
630 		break;
631 
632 	      case 45:
633 		printk(KERN_ERR "Unexpected IA-32 exception (Trap 45)\n");
634 		printk(KERN_ERR "  iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx\n",
635 		       iip, ifa, isr);
636 		force_sig(SIGSEGV, current);
637 		return;
638 
639 	      case 46:
640 		printk(KERN_ERR "Unexpected IA-32 intercept trap (Trap 46)\n");
641 		printk(KERN_ERR "  iip - 0x%lx, ifa - 0x%lx, isr - 0x%lx, iim - 0x%lx\n",
642 		       iip, ifa, isr, iim);
643 		force_sig(SIGSEGV, current);
644 		return;
645 
646 	      case 47:
647 		sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16);
648 		break;
649 
650 	      default:
651 		sprintf(buf, "Fault %lu", vector);
652 		break;
653 	}
654 	if (!die_if_kernel(buf, &regs, error))
655 		force_sig(SIGILL, current);
656 }
657