1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/ia64/kernel/time.c
4 *
5 * Copyright (C) 1998-2003 Hewlett-Packard Co
6 * Stephane Eranian <eranian@hpl.hp.com>
7 * David Mosberger <davidm@hpl.hp.com>
8 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
9 * Copyright (C) 1999-2000 VA Linux Systems
10 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
11 */
12
13 #include <linux/cpu.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/profile.h>
18 #include <linux/sched.h>
19 #include <linux/time.h>
20 #include <linux/nmi.h>
21 #include <linux/interrupt.h>
22 #include <linux/efi.h>
23 #include <linux/timex.h>
24 #include <linux/timekeeper_internal.h>
25 #include <linux/platform_device.h>
26 #include <linux/sched/cputime.h>
27
28 #include <asm/cputime.h>
29 #include <asm/delay.h>
30 #include <asm/efi.h>
31 #include <asm/hw_irq.h>
32 #include <asm/ptrace.h>
33 #include <asm/sal.h>
34 #include <asm/sections.h>
35
36 #include "fsyscall_gtod_data.h"
37 #include "irq.h"
38
39 static u64 itc_get_cycles(struct clocksource *cs);
40
41 struct fsyscall_gtod_data_t fsyscall_gtod_data;
42
43 struct itc_jitter_data_t itc_jitter_data;
44
45 volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
46
47 #ifdef CONFIG_IA64_DEBUG_IRQ
48
49 unsigned long last_cli_ip;
50 EXPORT_SYMBOL(last_cli_ip);
51
52 #endif
53
54 static struct clocksource clocksource_itc = {
55 .name = "itc",
56 .rating = 350,
57 .read = itc_get_cycles,
58 .mask = CLOCKSOURCE_MASK(64),
59 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
60 };
61 static struct clocksource *itc_clocksource;
62
63 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
64
65 #include <linux/kernel_stat.h>
66
67 extern u64 cycle_to_nsec(u64 cyc);
68
vtime_flush(struct task_struct * tsk)69 void vtime_flush(struct task_struct *tsk)
70 {
71 struct thread_info *ti = task_thread_info(tsk);
72 u64 delta;
73
74 if (ti->utime)
75 account_user_time(tsk, cycle_to_nsec(ti->utime));
76
77 if (ti->gtime)
78 account_guest_time(tsk, cycle_to_nsec(ti->gtime));
79
80 if (ti->idle_time)
81 account_idle_time(cycle_to_nsec(ti->idle_time));
82
83 if (ti->stime) {
84 delta = cycle_to_nsec(ti->stime);
85 account_system_index_time(tsk, delta, CPUTIME_SYSTEM);
86 }
87
88 if (ti->hardirq_time) {
89 delta = cycle_to_nsec(ti->hardirq_time);
90 account_system_index_time(tsk, delta, CPUTIME_IRQ);
91 }
92
93 if (ti->softirq_time) {
94 delta = cycle_to_nsec(ti->softirq_time);
95 account_system_index_time(tsk, delta, CPUTIME_SOFTIRQ);
96 }
97
98 ti->utime = 0;
99 ti->gtime = 0;
100 ti->idle_time = 0;
101 ti->stime = 0;
102 ti->hardirq_time = 0;
103 ti->softirq_time = 0;
104 }
105
106 /*
107 * Called from the context switch with interrupts disabled, to charge all
108 * accumulated times to the current process, and to prepare accounting on
109 * the next process.
110 */
arch_vtime_task_switch(struct task_struct * prev)111 void arch_vtime_task_switch(struct task_struct *prev)
112 {
113 struct thread_info *pi = task_thread_info(prev);
114 struct thread_info *ni = task_thread_info(current);
115
116 ni->ac_stamp = pi->ac_stamp;
117 ni->ac_stime = ni->ac_utime = 0;
118 }
119
120 /*
121 * Account time for a transition between system, hard irq or soft irq state.
122 * Note that this function is called with interrupts enabled.
123 */
vtime_delta(struct task_struct * tsk)124 static __u64 vtime_delta(struct task_struct *tsk)
125 {
126 struct thread_info *ti = task_thread_info(tsk);
127 __u64 now, delta_stime;
128
129 WARN_ON_ONCE(!irqs_disabled());
130
131 now = ia64_get_itc();
132 delta_stime = now - ti->ac_stamp;
133 ti->ac_stamp = now;
134
135 return delta_stime;
136 }
137
vtime_account_kernel(struct task_struct * tsk)138 void vtime_account_kernel(struct task_struct *tsk)
139 {
140 struct thread_info *ti = task_thread_info(tsk);
141 __u64 stime = vtime_delta(tsk);
142
143 if (tsk->flags & PF_VCPU)
144 ti->gtime += stime;
145 else
146 ti->stime += stime;
147 }
148 EXPORT_SYMBOL_GPL(vtime_account_kernel);
149
vtime_account_idle(struct task_struct * tsk)150 void vtime_account_idle(struct task_struct *tsk)
151 {
152 struct thread_info *ti = task_thread_info(tsk);
153
154 ti->idle_time += vtime_delta(tsk);
155 }
156
vtime_account_softirq(struct task_struct * tsk)157 void vtime_account_softirq(struct task_struct *tsk)
158 {
159 struct thread_info *ti = task_thread_info(tsk);
160
161 ti->softirq_time += vtime_delta(tsk);
162 }
163
vtime_account_hardirq(struct task_struct * tsk)164 void vtime_account_hardirq(struct task_struct *tsk)
165 {
166 struct thread_info *ti = task_thread_info(tsk);
167
168 ti->hardirq_time += vtime_delta(tsk);
169 }
170
171 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
172
173 static irqreturn_t
timer_interrupt(int irq,void * dev_id)174 timer_interrupt (int irq, void *dev_id)
175 {
176 unsigned long new_itm;
177
178 if (cpu_is_offline(smp_processor_id())) {
179 return IRQ_HANDLED;
180 }
181
182 new_itm = local_cpu_data->itm_next;
183
184 if (!time_after(ia64_get_itc(), new_itm))
185 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
186 ia64_get_itc(), new_itm);
187
188 while (1) {
189 new_itm += local_cpu_data->itm_delta;
190
191 legacy_timer_tick(smp_processor_id() == time_keeper_id);
192
193 local_cpu_data->itm_next = new_itm;
194
195 if (time_after(new_itm, ia64_get_itc()))
196 break;
197
198 /*
199 * Allow IPIs to interrupt the timer loop.
200 */
201 local_irq_enable();
202 local_irq_disable();
203 }
204
205 do {
206 /*
207 * If we're too close to the next clock tick for
208 * comfort, we increase the safety margin by
209 * intentionally dropping the next tick(s). We do NOT
210 * update itm.next because that would force us to call
211 * xtime_update() which in turn would let our clock run
212 * too fast (with the potentially devastating effect
213 * of losing monotony of time).
214 */
215 while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
216 new_itm += local_cpu_data->itm_delta;
217 ia64_set_itm(new_itm);
218 /* double check, in case we got hit by a (slow) PMI: */
219 } while (time_after_eq(ia64_get_itc(), new_itm));
220 return IRQ_HANDLED;
221 }
222
223 /*
224 * Encapsulate access to the itm structure for SMP.
225 */
226 void
ia64_cpu_local_tick(void)227 ia64_cpu_local_tick (void)
228 {
229 int cpu = smp_processor_id();
230 unsigned long shift = 0, delta;
231
232 /* arrange for the cycle counter to generate a timer interrupt: */
233 ia64_set_itv(IA64_TIMER_VECTOR);
234
235 delta = local_cpu_data->itm_delta;
236 /*
237 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
238 * same time:
239 */
240 if (cpu) {
241 unsigned long hi = 1UL << ia64_fls(cpu);
242 shift = (2*(cpu - hi) + 1) * delta/hi/2;
243 }
244 local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
245 ia64_set_itm(local_cpu_data->itm_next);
246 }
247
248 static int nojitter;
249
nojitter_setup(char * str)250 static int __init nojitter_setup(char *str)
251 {
252 nojitter = 1;
253 printk("Jitter checking for ITC timers disabled\n");
254 return 1;
255 }
256
257 __setup("nojitter", nojitter_setup);
258
259
ia64_init_itm(void)260 void ia64_init_itm(void)
261 {
262 unsigned long platform_base_freq, itc_freq;
263 struct pal_freq_ratio itc_ratio, proc_ratio;
264 long status, platform_base_drift, itc_drift;
265
266 /*
267 * According to SAL v2.6, we need to use a SAL call to determine the platform base
268 * frequency and then a PAL call to determine the frequency ratio between the ITC
269 * and the base frequency.
270 */
271 status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
272 &platform_base_freq, &platform_base_drift);
273 if (status != 0) {
274 printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
275 } else {
276 status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
277 if (status != 0)
278 printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
279 }
280 if (status != 0) {
281 /* invent "random" values */
282 printk(KERN_ERR
283 "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
284 platform_base_freq = 100000000;
285 platform_base_drift = -1; /* no drift info */
286 itc_ratio.num = 3;
287 itc_ratio.den = 1;
288 }
289 if (platform_base_freq < 40000000) {
290 printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
291 platform_base_freq);
292 platform_base_freq = 75000000;
293 platform_base_drift = -1;
294 }
295 if (!proc_ratio.den)
296 proc_ratio.den = 1; /* avoid division by zero */
297 if (!itc_ratio.den)
298 itc_ratio.den = 1; /* avoid division by zero */
299
300 itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
301
302 local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
303 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
304 "ITC freq=%lu.%03luMHz", smp_processor_id(),
305 platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
306 itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
307
308 if (platform_base_drift != -1) {
309 itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
310 printk("+/-%ldppm\n", itc_drift);
311 } else {
312 itc_drift = -1;
313 printk("\n");
314 }
315
316 local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
317 local_cpu_data->itc_freq = itc_freq;
318 local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
319 local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
320 + itc_freq/2)/itc_freq;
321
322 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
323 #ifdef CONFIG_SMP
324 /* On IA64 in an SMP configuration ITCs are never accurately synchronized.
325 * Jitter compensation requires a cmpxchg which may limit
326 * the scalability of the syscalls for retrieving time.
327 * The ITC synchronization is usually successful to within a few
328 * ITC ticks but this is not a sure thing. If you need to improve
329 * timer performance in SMP situations then boot the kernel with the
330 * "nojitter" option. However, doing so may result in time fluctuating (maybe
331 * even going backward) if the ITC offsets between the individual CPUs
332 * are too large.
333 */
334 if (!nojitter)
335 itc_jitter_data.itc_jitter = 1;
336 #endif
337 } else
338 /*
339 * ITC is drifty and we have not synchronized the ITCs in smpboot.c.
340 * ITC values may fluctuate significantly between processors.
341 * Clock should not be used for hrtimers. Mark itc as only
342 * useful for boot and testing.
343 *
344 * Note that jitter compensation is off! There is no point of
345 * synchronizing ITCs since they may be large differentials
346 * that change over time.
347 *
348 * The only way to fix this would be to repeatedly sync the
349 * ITCs. Until that time we have to avoid ITC.
350 */
351 clocksource_itc.rating = 50;
352
353 /* avoid softlock up message when cpu is unplug and plugged again. */
354 touch_softlockup_watchdog();
355
356 /* Setup the CPU local timer tick */
357 ia64_cpu_local_tick();
358
359 if (!itc_clocksource) {
360 clocksource_register_hz(&clocksource_itc,
361 local_cpu_data->itc_freq);
362 itc_clocksource = &clocksource_itc;
363 }
364 }
365
itc_get_cycles(struct clocksource * cs)366 static u64 itc_get_cycles(struct clocksource *cs)
367 {
368 unsigned long lcycle, now, ret;
369
370 if (!itc_jitter_data.itc_jitter)
371 return get_cycles();
372
373 lcycle = itc_jitter_data.itc_lastcycle;
374 now = get_cycles();
375 if (lcycle && time_after(lcycle, now))
376 return lcycle;
377
378 /*
379 * Keep track of the last timer value returned.
380 * In an SMP environment, you could lose out in contention of
381 * cmpxchg. If so, your cmpxchg returns new value which the
382 * winner of contention updated to. Use the new value instead.
383 */
384 ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
385 if (unlikely(ret != lcycle))
386 return ret;
387
388 return now;
389 }
390
read_persistent_clock64(struct timespec64 * ts)391 void read_persistent_clock64(struct timespec64 *ts)
392 {
393 efi_gettimeofday(ts);
394 }
395
396 void __init
time_init(void)397 time_init (void)
398 {
399 register_percpu_irq(IA64_TIMER_VECTOR, timer_interrupt, IRQF_IRQPOLL,
400 "timer");
401 ia64_init_itm();
402 }
403
404 /*
405 * Generic udelay assumes that if preemption is allowed and the thread
406 * migrates to another CPU, that the ITC values are synchronized across
407 * all CPUs.
408 */
409 static void
ia64_itc_udelay(unsigned long usecs)410 ia64_itc_udelay (unsigned long usecs)
411 {
412 unsigned long start = ia64_get_itc();
413 unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
414
415 while (time_before(ia64_get_itc(), end))
416 cpu_relax();
417 }
418
419 void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
420
421 void
udelay(unsigned long usecs)422 udelay (unsigned long usecs)
423 {
424 (*ia64_udelay)(usecs);
425 }
426 EXPORT_SYMBOL(udelay);
427
428 /* IA64 doesn't cache the timezone */
update_vsyscall_tz(void)429 void update_vsyscall_tz(void)
430 {
431 }
432
update_vsyscall(struct timekeeper * tk)433 void update_vsyscall(struct timekeeper *tk)
434 {
435 write_seqcount_begin(&fsyscall_gtod_data.seq);
436
437 /* copy vsyscall data */
438 fsyscall_gtod_data.clk_mask = tk->tkr_mono.mask;
439 fsyscall_gtod_data.clk_mult = tk->tkr_mono.mult;
440 fsyscall_gtod_data.clk_shift = tk->tkr_mono.shift;
441 fsyscall_gtod_data.clk_fsys_mmio = tk->tkr_mono.clock->archdata.fsys_mmio;
442 fsyscall_gtod_data.clk_cycle_last = tk->tkr_mono.cycle_last;
443
444 fsyscall_gtod_data.wall_time.sec = tk->xtime_sec;
445 fsyscall_gtod_data.wall_time.snsec = tk->tkr_mono.xtime_nsec;
446
447 fsyscall_gtod_data.monotonic_time.sec = tk->xtime_sec
448 + tk->wall_to_monotonic.tv_sec;
449 fsyscall_gtod_data.monotonic_time.snsec = tk->tkr_mono.xtime_nsec
450 + ((u64)tk->wall_to_monotonic.tv_nsec
451 << tk->tkr_mono.shift);
452
453 /* normalize */
454 while (fsyscall_gtod_data.monotonic_time.snsec >=
455 (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
456 fsyscall_gtod_data.monotonic_time.snsec -=
457 ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
458 fsyscall_gtod_data.monotonic_time.sec++;
459 }
460
461 write_seqcount_end(&fsyscall_gtod_data.seq);
462 }
463
464