1 /* 2 * SMP boot-related support 3 * 4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 5 * David Mosberger-Tang <davidm@hpl.hp.com> 6 * Copyright (C) 2001, 2004-2005 Intel Corp 7 * Rohit Seth <rohit.seth@intel.com> 8 * Suresh Siddha <suresh.b.siddha@intel.com> 9 * Gordon Jin <gordon.jin@intel.com> 10 * Ashok Raj <ashok.raj@intel.com> 11 * 12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. 13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. 14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. 15 * smp_boot_cpus()/smp_commence() is replaced by 16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). 17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support 18 * 04/12/26 Jin Gordon <gordon.jin@intel.com> 19 * 04/12/26 Rohit Seth <rohit.seth@intel.com> 20 * Add multi-threading and multi-core detection 21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com> 22 * Setup cpu_sibling_map and cpu_core_map 23 */ 24 25 #include <linux/module.h> 26 #include <linux/acpi.h> 27 #include <linux/bootmem.h> 28 #include <linux/cpu.h> 29 #include <linux/delay.h> 30 #include <linux/init.h> 31 #include <linux/interrupt.h> 32 #include <linux/irq.h> 33 #include <linux/kernel.h> 34 #include <linux/kernel_stat.h> 35 #include <linux/mm.h> 36 #include <linux/notifier.h> 37 #include <linux/smp.h> 38 #include <linux/spinlock.h> 39 #include <linux/efi.h> 40 #include <linux/percpu.h> 41 #include <linux/bitops.h> 42 43 #include <linux/atomic.h> 44 #include <asm/cache.h> 45 #include <asm/current.h> 46 #include <asm/delay.h> 47 #include <asm/io.h> 48 #include <asm/irq.h> 49 #include <asm/machvec.h> 50 #include <asm/mca.h> 51 #include <asm/page.h> 52 #include <asm/paravirt.h> 53 #include <asm/pgalloc.h> 54 #include <asm/pgtable.h> 55 #include <asm/processor.h> 56 #include <asm/ptrace.h> 57 #include <asm/sal.h> 58 #include <asm/tlbflush.h> 59 #include <asm/unistd.h> 60 #include <asm/sn/arch.h> 61 62 #define SMP_DEBUG 0 63 64 #if SMP_DEBUG 65 #define Dprintk(x...) printk(x) 66 #else 67 #define Dprintk(x...) 68 #endif 69 70 #ifdef CONFIG_HOTPLUG_CPU 71 #ifdef CONFIG_PERMIT_BSP_REMOVE 72 #define bsp_remove_ok 1 73 #else 74 #define bsp_remove_ok 0 75 #endif 76 77 /* 78 * Store all idle threads, this can be reused instead of creating 79 * a new thread. Also avoids complicated thread destroy functionality 80 * for idle threads. 81 */ 82 struct task_struct *idle_thread_array[NR_CPUS]; 83 84 /* 85 * Global array allocated for NR_CPUS at boot time 86 */ 87 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; 88 89 /* 90 * start_ap in head.S uses this to store current booting cpu 91 * info. 92 */ 93 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; 94 95 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); 96 97 #define get_idle_for_cpu(x) (idle_thread_array[(x)]) 98 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) 99 100 #else 101 102 #define get_idle_for_cpu(x) (NULL) 103 #define set_idle_for_cpu(x,p) 104 #define set_brendez_area(x) 105 #endif 106 107 108 /* 109 * ITC synchronization related stuff: 110 */ 111 #define MASTER (0) 112 #define SLAVE (SMP_CACHE_BYTES/8) 113 114 #define NUM_ROUNDS 64 /* magic value */ 115 #define NUM_ITERS 5 /* likewise */ 116 117 static DEFINE_SPINLOCK(itc_sync_lock); 118 static volatile unsigned long go[SLAVE + 1]; 119 120 #define DEBUG_ITC_SYNC 0 121 122 extern void start_ap (void); 123 extern unsigned long ia64_iobase; 124 125 struct task_struct *task_for_booting_cpu; 126 127 /* 128 * State for each CPU 129 */ 130 DEFINE_PER_CPU(int, cpu_state); 131 132 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 133 EXPORT_SYMBOL(cpu_core_map); 134 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); 135 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 136 137 int smp_num_siblings = 1; 138 139 /* which logical CPU number maps to which CPU (physical APIC ID) */ 140 volatile int ia64_cpu_to_sapicid[NR_CPUS]; 141 EXPORT_SYMBOL(ia64_cpu_to_sapicid); 142 143 static volatile cpumask_t cpu_callin_map; 144 145 struct smp_boot_data smp_boot_data __initdata; 146 147 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ 148 149 char __initdata no_int_routing; 150 151 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ 152 153 #ifdef CONFIG_FORCE_CPEI_RETARGET 154 #define CPEI_OVERRIDE_DEFAULT (1) 155 #else 156 #define CPEI_OVERRIDE_DEFAULT (0) 157 #endif 158 159 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT; 160 161 static int __init 162 cmdl_force_cpei(char *str) 163 { 164 int value=0; 165 166 get_option (&str, &value); 167 force_cpei_retarget = value; 168 169 return 1; 170 } 171 172 __setup("force_cpei=", cmdl_force_cpei); 173 174 static int __init 175 nointroute (char *str) 176 { 177 no_int_routing = 1; 178 printk ("no_int_routing on\n"); 179 return 1; 180 } 181 182 __setup("nointroute", nointroute); 183 184 static void fix_b0_for_bsp(void) 185 { 186 #ifdef CONFIG_HOTPLUG_CPU 187 int cpuid; 188 static int fix_bsp_b0 = 1; 189 190 cpuid = smp_processor_id(); 191 192 /* 193 * Cache the b0 value on the first AP that comes up 194 */ 195 if (!(fix_bsp_b0 && cpuid)) 196 return; 197 198 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0]; 199 printk ("Fixed BSP b0 value from CPU %d\n", cpuid); 200 201 fix_bsp_b0 = 0; 202 #endif 203 } 204 205 void 206 sync_master (void *arg) 207 { 208 unsigned long flags, i; 209 210 go[MASTER] = 0; 211 212 local_irq_save(flags); 213 { 214 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { 215 while (!go[MASTER]) 216 cpu_relax(); 217 go[MASTER] = 0; 218 go[SLAVE] = ia64_get_itc(); 219 } 220 } 221 local_irq_restore(flags); 222 } 223 224 /* 225 * Return the number of cycles by which our itc differs from the itc on the master 226 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, 227 * negative that it is behind. 228 */ 229 static inline long 230 get_delta (long *rt, long *master) 231 { 232 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; 233 unsigned long tcenter, t0, t1, tm; 234 long i; 235 236 for (i = 0; i < NUM_ITERS; ++i) { 237 t0 = ia64_get_itc(); 238 go[MASTER] = 1; 239 while (!(tm = go[SLAVE])) 240 cpu_relax(); 241 go[SLAVE] = 0; 242 t1 = ia64_get_itc(); 243 244 if (t1 - t0 < best_t1 - best_t0) 245 best_t0 = t0, best_t1 = t1, best_tm = tm; 246 } 247 248 *rt = best_t1 - best_t0; 249 *master = best_tm - best_t0; 250 251 /* average best_t0 and best_t1 without overflow: */ 252 tcenter = (best_t0/2 + best_t1/2); 253 if (best_t0 % 2 + best_t1 % 2 == 2) 254 ++tcenter; 255 return tcenter - best_tm; 256 } 257 258 /* 259 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU 260 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of 261 * unaccounted-for errors (such as getting a machine check in the middle of a calibration 262 * step). The basic idea is for the slave to ask the master what itc value it has and to 263 * read its own itc before and after the master responds. Each iteration gives us three 264 * timestamps: 265 * 266 * slave master 267 * 268 * t0 ---\ 269 * ---\ 270 * ---> 271 * tm 272 * /--- 273 * /--- 274 * t1 <--- 275 * 276 * 277 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 278 * and t1. If we achieve this, the clocks are synchronized provided the interconnect 279 * between the slave and the master is symmetric. Even if the interconnect were 280 * asymmetric, we would still know that the synchronization error is smaller than the 281 * roundtrip latency (t0 - t1). 282 * 283 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to 284 * within one or two cycles. However, we can only *guarantee* that the synchronization is 285 * accurate to within a round-trip time, which is typically in the range of several 286 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually 287 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better 288 * than half a micro second or so. 289 */ 290 void 291 ia64_sync_itc (unsigned int master) 292 { 293 long i, delta, adj, adjust_latency = 0, done = 0; 294 unsigned long flags, rt, master_time_stamp, bound; 295 #if DEBUG_ITC_SYNC 296 struct { 297 long rt; /* roundtrip time */ 298 long master; /* master's timestamp */ 299 long diff; /* difference between midpoint and master's timestamp */ 300 long lat; /* estimate of itc adjustment latency */ 301 } t[NUM_ROUNDS]; 302 #endif 303 304 /* 305 * Make sure local timer ticks are disabled while we sync. If 306 * they were enabled, we'd have to worry about nasty issues 307 * like setting the ITC ahead of (or a long time before) the 308 * next scheduled tick. 309 */ 310 BUG_ON((ia64_get_itv() & (1 << 16)) == 0); 311 312 go[MASTER] = 1; 313 314 if (smp_call_function_single(master, sync_master, NULL, 0) < 0) { 315 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); 316 return; 317 } 318 319 while (go[MASTER]) 320 cpu_relax(); /* wait for master to be ready */ 321 322 spin_lock_irqsave(&itc_sync_lock, flags); 323 { 324 for (i = 0; i < NUM_ROUNDS; ++i) { 325 delta = get_delta(&rt, &master_time_stamp); 326 if (delta == 0) { 327 done = 1; /* let's lock on to this... */ 328 bound = rt; 329 } 330 331 if (!done) { 332 if (i > 0) { 333 adjust_latency += -delta; 334 adj = -delta + adjust_latency/4; 335 } else 336 adj = -delta; 337 338 ia64_set_itc(ia64_get_itc() + adj); 339 } 340 #if DEBUG_ITC_SYNC 341 t[i].rt = rt; 342 t[i].master = master_time_stamp; 343 t[i].diff = delta; 344 t[i].lat = adjust_latency/4; 345 #endif 346 } 347 } 348 spin_unlock_irqrestore(&itc_sync_lock, flags); 349 350 #if DEBUG_ITC_SYNC 351 for (i = 0; i < NUM_ROUNDS; ++i) 352 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", 353 t[i].rt, t[i].master, t[i].diff, t[i].lat); 354 #endif 355 356 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " 357 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); 358 } 359 360 /* 361 * Ideally sets up per-cpu profiling hooks. Doesn't do much now... 362 */ 363 static inline void __devinit 364 smp_setup_percpu_timer (void) 365 { 366 } 367 368 static void __cpuinit 369 smp_callin (void) 370 { 371 int cpuid, phys_id, itc_master; 372 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo; 373 extern void ia64_init_itm(void); 374 extern volatile int time_keeper_id; 375 376 #ifdef CONFIG_PERFMON 377 extern void pfm_init_percpu(void); 378 #endif 379 380 cpuid = smp_processor_id(); 381 phys_id = hard_smp_processor_id(); 382 itc_master = time_keeper_id; 383 384 if (cpu_online(cpuid)) { 385 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", 386 phys_id, cpuid); 387 BUG(); 388 } 389 390 fix_b0_for_bsp(); 391 392 /* 393 * numa_node_id() works after this. 394 */ 395 set_numa_node(cpu_to_node_map[cpuid]); 396 set_numa_mem(local_memory_node(cpu_to_node_map[cpuid])); 397 398 ipi_call_lock_irq(); 399 spin_lock(&vector_lock); 400 /* Setup the per cpu irq handling data structures */ 401 __setup_vector_irq(cpuid); 402 notify_cpu_starting(cpuid); 403 set_cpu_online(cpuid, true); 404 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 405 spin_unlock(&vector_lock); 406 ipi_call_unlock_irq(); 407 408 smp_setup_percpu_timer(); 409 410 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ 411 412 #ifdef CONFIG_PERFMON 413 pfm_init_percpu(); 414 #endif 415 416 local_irq_enable(); 417 418 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { 419 /* 420 * Synchronize the ITC with the BP. Need to do this after irqs are 421 * enabled because ia64_sync_itc() calls smp_call_function_single(), which 422 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls 423 * local_bh_enable(), which bugs out if irqs are not enabled... 424 */ 425 Dprintk("Going to syncup ITC with ITC Master.\n"); 426 ia64_sync_itc(itc_master); 427 } 428 429 /* 430 * Get our bogomips. 431 */ 432 ia64_init_itm(); 433 434 /* 435 * Delay calibration can be skipped if new processor is identical to the 436 * previous processor. 437 */ 438 last_cpuinfo = cpu_data(cpuid - 1); 439 this_cpuinfo = local_cpu_data; 440 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq || 441 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq || 442 last_cpuinfo->features != this_cpuinfo->features || 443 last_cpuinfo->revision != this_cpuinfo->revision || 444 last_cpuinfo->family != this_cpuinfo->family || 445 last_cpuinfo->archrev != this_cpuinfo->archrev || 446 last_cpuinfo->model != this_cpuinfo->model) 447 calibrate_delay(); 448 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 449 450 /* 451 * Allow the master to continue. 452 */ 453 cpu_set(cpuid, cpu_callin_map); 454 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); 455 } 456 457 458 /* 459 * Activate a secondary processor. head.S calls this. 460 */ 461 int __cpuinit 462 start_secondary (void *unused) 463 { 464 /* Early console may use I/O ports */ 465 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); 466 #ifndef CONFIG_PRINTK_TIME 467 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); 468 #endif 469 efi_map_pal_code(); 470 cpu_init(); 471 preempt_disable(); 472 smp_callin(); 473 474 cpu_idle(); 475 return 0; 476 } 477 478 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) 479 { 480 return NULL; 481 } 482 483 struct create_idle { 484 struct work_struct work; 485 struct task_struct *idle; 486 struct completion done; 487 int cpu; 488 }; 489 490 void __cpuinit 491 do_fork_idle(struct work_struct *work) 492 { 493 struct create_idle *c_idle = 494 container_of(work, struct create_idle, work); 495 496 c_idle->idle = fork_idle(c_idle->cpu); 497 complete(&c_idle->done); 498 } 499 500 static int __cpuinit 501 do_boot_cpu (int sapicid, int cpu) 502 { 503 int timeout; 504 struct create_idle c_idle = { 505 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle), 506 .cpu = cpu, 507 .done = COMPLETION_INITIALIZER(c_idle.done), 508 }; 509 510 /* 511 * We can't use kernel_thread since we must avoid to 512 * reschedule the child. 513 */ 514 c_idle.idle = get_idle_for_cpu(cpu); 515 if (c_idle.idle) { 516 init_idle(c_idle.idle, cpu); 517 goto do_rest; 518 } 519 520 schedule_work(&c_idle.work); 521 wait_for_completion(&c_idle.done); 522 523 if (IS_ERR(c_idle.idle)) 524 panic("failed fork for CPU %d", cpu); 525 526 set_idle_for_cpu(cpu, c_idle.idle); 527 528 do_rest: 529 task_for_booting_cpu = c_idle.idle; 530 531 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); 532 533 set_brendez_area(cpu); 534 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); 535 536 /* 537 * Wait 10s total for the AP to start 538 */ 539 Dprintk("Waiting on callin_map ..."); 540 for (timeout = 0; timeout < 100000; timeout++) { 541 if (cpu_isset(cpu, cpu_callin_map)) 542 break; /* It has booted */ 543 udelay(100); 544 } 545 Dprintk("\n"); 546 547 if (!cpu_isset(cpu, cpu_callin_map)) { 548 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); 549 ia64_cpu_to_sapicid[cpu] = -1; 550 set_cpu_online(cpu, false); /* was set in smp_callin() */ 551 return -EINVAL; 552 } 553 return 0; 554 } 555 556 static int __init 557 decay (char *str) 558 { 559 int ticks; 560 get_option (&str, &ticks); 561 return 1; 562 } 563 564 __setup("decay=", decay); 565 566 /* 567 * Initialize the logical CPU number to SAPICID mapping 568 */ 569 void __init 570 smp_build_cpu_map (void) 571 { 572 int sapicid, cpu, i; 573 int boot_cpu_id = hard_smp_processor_id(); 574 575 for (cpu = 0; cpu < NR_CPUS; cpu++) { 576 ia64_cpu_to_sapicid[cpu] = -1; 577 } 578 579 ia64_cpu_to_sapicid[0] = boot_cpu_id; 580 init_cpu_present(cpumask_of(0)); 581 set_cpu_possible(0, true); 582 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { 583 sapicid = smp_boot_data.cpu_phys_id[i]; 584 if (sapicid == boot_cpu_id) 585 continue; 586 set_cpu_present(cpu, true); 587 set_cpu_possible(cpu, true); 588 ia64_cpu_to_sapicid[cpu] = sapicid; 589 cpu++; 590 } 591 } 592 593 /* 594 * Cycle through the APs sending Wakeup IPIs to boot each. 595 */ 596 void __init 597 smp_prepare_cpus (unsigned int max_cpus) 598 { 599 int boot_cpu_id = hard_smp_processor_id(); 600 601 /* 602 * Initialize the per-CPU profiling counter/multiplier 603 */ 604 605 smp_setup_percpu_timer(); 606 607 cpu_set(0, cpu_callin_map); 608 609 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 610 ia64_cpu_to_sapicid[0] = boot_cpu_id; 611 612 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); 613 614 current_thread_info()->cpu = 0; 615 616 /* 617 * If SMP should be disabled, then really disable it! 618 */ 619 if (!max_cpus) { 620 printk(KERN_INFO "SMP mode deactivated.\n"); 621 init_cpu_online(cpumask_of(0)); 622 init_cpu_present(cpumask_of(0)); 623 init_cpu_possible(cpumask_of(0)); 624 return; 625 } 626 } 627 628 void __devinit smp_prepare_boot_cpu(void) 629 { 630 set_cpu_online(smp_processor_id(), true); 631 cpu_set(smp_processor_id(), cpu_callin_map); 632 set_numa_node(cpu_to_node_map[smp_processor_id()]); 633 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 634 paravirt_post_smp_prepare_boot_cpu(); 635 } 636 637 #ifdef CONFIG_HOTPLUG_CPU 638 static inline void 639 clear_cpu_sibling_map(int cpu) 640 { 641 int i; 642 643 for_each_cpu_mask(i, per_cpu(cpu_sibling_map, cpu)) 644 cpu_clear(cpu, per_cpu(cpu_sibling_map, i)); 645 for_each_cpu_mask(i, cpu_core_map[cpu]) 646 cpu_clear(cpu, cpu_core_map[i]); 647 648 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE; 649 } 650 651 static void 652 remove_siblinginfo(int cpu) 653 { 654 int last = 0; 655 656 if (cpu_data(cpu)->threads_per_core == 1 && 657 cpu_data(cpu)->cores_per_socket == 1) { 658 cpu_clear(cpu, cpu_core_map[cpu]); 659 cpu_clear(cpu, per_cpu(cpu_sibling_map, cpu)); 660 return; 661 } 662 663 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0); 664 665 /* remove it from all sibling map's */ 666 clear_cpu_sibling_map(cpu); 667 } 668 669 extern void fixup_irqs(void); 670 671 int migrate_platform_irqs(unsigned int cpu) 672 { 673 int new_cpei_cpu; 674 struct irq_data *data = NULL; 675 const struct cpumask *mask; 676 int retval = 0; 677 678 /* 679 * dont permit CPEI target to removed. 680 */ 681 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) { 682 printk ("CPU (%d) is CPEI Target\n", cpu); 683 if (can_cpei_retarget()) { 684 /* 685 * Now re-target the CPEI to a different processor 686 */ 687 new_cpei_cpu = cpumask_any(cpu_online_mask); 688 mask = cpumask_of(new_cpei_cpu); 689 set_cpei_target_cpu(new_cpei_cpu); 690 data = irq_get_irq_data(ia64_cpe_irq); 691 /* 692 * Switch for now, immediately, we need to do fake intr 693 * as other interrupts, but need to study CPEI behaviour with 694 * polling before making changes. 695 */ 696 if (data && data->chip) { 697 data->chip->irq_disable(data); 698 data->chip->irq_set_affinity(data, mask, false); 699 data->chip->irq_enable(data); 700 printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu); 701 } 702 } 703 if (!data) { 704 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 705 retval = -EBUSY; 706 } 707 } 708 return retval; 709 } 710 711 /* must be called with cpucontrol mutex held */ 712 int __cpu_disable(void) 713 { 714 int cpu = smp_processor_id(); 715 716 /* 717 * dont permit boot processor for now 718 */ 719 if (cpu == 0 && !bsp_remove_ok) { 720 printk ("Your platform does not support removal of BSP\n"); 721 return (-EBUSY); 722 } 723 724 if (ia64_platform_is("sn2")) { 725 if (!sn_cpu_disable_allowed(cpu)) 726 return -EBUSY; 727 } 728 729 set_cpu_online(cpu, false); 730 731 if (migrate_platform_irqs(cpu)) { 732 set_cpu_online(cpu, true); 733 return -EBUSY; 734 } 735 736 remove_siblinginfo(cpu); 737 fixup_irqs(); 738 local_flush_tlb_all(); 739 cpu_clear(cpu, cpu_callin_map); 740 return 0; 741 } 742 743 void __cpu_die(unsigned int cpu) 744 { 745 unsigned int i; 746 747 for (i = 0; i < 100; i++) { 748 /* They ack this in play_dead by setting CPU_DEAD */ 749 if (per_cpu(cpu_state, cpu) == CPU_DEAD) 750 { 751 printk ("CPU %d is now offline\n", cpu); 752 return; 753 } 754 msleep(100); 755 } 756 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 757 } 758 #endif /* CONFIG_HOTPLUG_CPU */ 759 760 void 761 smp_cpus_done (unsigned int dummy) 762 { 763 int cpu; 764 unsigned long bogosum = 0; 765 766 /* 767 * Allow the user to impress friends. 768 */ 769 770 for_each_online_cpu(cpu) { 771 bogosum += cpu_data(cpu)->loops_per_jiffy; 772 } 773 774 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 775 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); 776 } 777 778 static inline void __devinit 779 set_cpu_sibling_map(int cpu) 780 { 781 int i; 782 783 for_each_online_cpu(i) { 784 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { 785 cpu_set(i, cpu_core_map[cpu]); 786 cpu_set(cpu, cpu_core_map[i]); 787 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { 788 cpu_set(i, per_cpu(cpu_sibling_map, cpu)); 789 cpu_set(cpu, per_cpu(cpu_sibling_map, i)); 790 } 791 } 792 } 793 } 794 795 int __cpuinit 796 __cpu_up (unsigned int cpu) 797 { 798 int ret; 799 int sapicid; 800 801 sapicid = ia64_cpu_to_sapicid[cpu]; 802 if (sapicid == -1) 803 return -EINVAL; 804 805 /* 806 * Already booted cpu? not valid anymore since we dont 807 * do idle loop tightspin anymore. 808 */ 809 if (cpu_isset(cpu, cpu_callin_map)) 810 return -EINVAL; 811 812 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 813 /* Processor goes to start_secondary(), sets online flag */ 814 ret = do_boot_cpu(sapicid, cpu); 815 if (ret < 0) 816 return ret; 817 818 if (cpu_data(cpu)->threads_per_core == 1 && 819 cpu_data(cpu)->cores_per_socket == 1) { 820 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu)); 821 cpu_set(cpu, cpu_core_map[cpu]); 822 return 0; 823 } 824 825 set_cpu_sibling_map(cpu); 826 827 return 0; 828 } 829 830 /* 831 * Assume that CPUs have been discovered by some platform-dependent interface. For 832 * SoftSDV/Lion, that would be ACPI. 833 * 834 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). 835 */ 836 void __init 837 init_smp_config(void) 838 { 839 struct fptr { 840 unsigned long fp; 841 unsigned long gp; 842 } *ap_startup; 843 long sal_ret; 844 845 /* Tell SAL where to drop the APs. */ 846 ap_startup = (struct fptr *) start_ap; 847 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, 848 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); 849 if (sal_ret < 0) 850 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", 851 ia64_sal_strerror(sal_ret)); 852 } 853 854 /* 855 * identify_siblings(cpu) gets called from identify_cpu. This populates the 856 * information related to logical execution units in per_cpu_data structure. 857 */ 858 void __devinit 859 identify_siblings(struct cpuinfo_ia64 *c) 860 { 861 long status; 862 u16 pltid; 863 pal_logical_to_physical_t info; 864 865 status = ia64_pal_logical_to_phys(-1, &info); 866 if (status != PAL_STATUS_SUCCESS) { 867 if (status != PAL_STATUS_UNIMPLEMENTED) { 868 printk(KERN_ERR 869 "ia64_pal_logical_to_phys failed with %ld\n", 870 status); 871 return; 872 } 873 874 info.overview_ppid = 0; 875 info.overview_cpp = 1; 876 info.overview_tpc = 1; 877 } 878 879 status = ia64_sal_physical_id_info(&pltid); 880 if (status != PAL_STATUS_SUCCESS) { 881 if (status != PAL_STATUS_UNIMPLEMENTED) 882 printk(KERN_ERR 883 "ia64_sal_pltid failed with %ld\n", 884 status); 885 return; 886 } 887 888 c->socket_id = (pltid << 8) | info.overview_ppid; 889 890 if (info.overview_cpp == 1 && info.overview_tpc == 1) 891 return; 892 893 c->cores_per_socket = info.overview_cpp; 894 c->threads_per_core = info.overview_tpc; 895 c->num_log = info.overview_num_log; 896 897 c->core_id = info.log1_cid; 898 c->thread_id = info.log1_tid; 899 } 900 901 /* 902 * returns non zero, if multi-threading is enabled 903 * on at least one physical package. Due to hotplug cpu 904 * and (maxcpus=), all threads may not necessarily be enabled 905 * even though the processor supports multi-threading. 906 */ 907 int is_multithreading_enabled(void) 908 { 909 int i, j; 910 911 for_each_present_cpu(i) { 912 for_each_present_cpu(j) { 913 if (j == i) 914 continue; 915 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) { 916 if (cpu_data(j)->core_id == cpu_data(i)->core_id) 917 return 1; 918 } 919 } 920 } 921 return 0; 922 } 923 EXPORT_SYMBOL_GPL(is_multithreading_enabled); 924