1 /* 2 * SMP boot-related support 3 * 4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 5 * David Mosberger-Tang <davidm@hpl.hp.com> 6 * Copyright (C) 2001, 2004-2005 Intel Corp 7 * Rohit Seth <rohit.seth@intel.com> 8 * Suresh Siddha <suresh.b.siddha@intel.com> 9 * Gordon Jin <gordon.jin@intel.com> 10 * Ashok Raj <ashok.raj@intel.com> 11 * 12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. 13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. 14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. 15 * smp_boot_cpus()/smp_commence() is replaced by 16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). 17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support 18 * 04/12/26 Jin Gordon <gordon.jin@intel.com> 19 * 04/12/26 Rohit Seth <rohit.seth@intel.com> 20 * Add multi-threading and multi-core detection 21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com> 22 * Setup cpu_sibling_map and cpu_core_map 23 */ 24 25 #include <linux/module.h> 26 #include <linux/acpi.h> 27 #include <linux/bootmem.h> 28 #include <linux/cpu.h> 29 #include <linux/delay.h> 30 #include <linux/init.h> 31 #include <linux/interrupt.h> 32 #include <linux/irq.h> 33 #include <linux/kernel.h> 34 #include <linux/kernel_stat.h> 35 #include <linux/mm.h> 36 #include <linux/notifier.h> 37 #include <linux/smp.h> 38 #include <linux/spinlock.h> 39 #include <linux/efi.h> 40 #include <linux/percpu.h> 41 #include <linux/bitops.h> 42 43 #include <asm/atomic.h> 44 #include <asm/cache.h> 45 #include <asm/current.h> 46 #include <asm/delay.h> 47 #include <asm/ia32.h> 48 #include <asm/io.h> 49 #include <asm/irq.h> 50 #include <asm/machvec.h> 51 #include <asm/mca.h> 52 #include <asm/page.h> 53 #include <asm/pgalloc.h> 54 #include <asm/pgtable.h> 55 #include <asm/processor.h> 56 #include <asm/ptrace.h> 57 #include <asm/sal.h> 58 #include <asm/system.h> 59 #include <asm/tlbflush.h> 60 #include <asm/unistd.h> 61 62 #define SMP_DEBUG 0 63 64 #if SMP_DEBUG 65 #define Dprintk(x...) printk(x) 66 #else 67 #define Dprintk(x...) 68 #endif 69 70 #ifdef CONFIG_HOTPLUG_CPU 71 #ifdef CONFIG_PERMIT_BSP_REMOVE 72 #define bsp_remove_ok 1 73 #else 74 #define bsp_remove_ok 0 75 #endif 76 77 /* 78 * Store all idle threads, this can be reused instead of creating 79 * a new thread. Also avoids complicated thread destroy functionality 80 * for idle threads. 81 */ 82 struct task_struct *idle_thread_array[NR_CPUS]; 83 84 /* 85 * Global array allocated for NR_CPUS at boot time 86 */ 87 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; 88 89 /* 90 * start_ap in head.S uses this to store current booting cpu 91 * info. 92 */ 93 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; 94 95 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); 96 97 #define get_idle_for_cpu(x) (idle_thread_array[(x)]) 98 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) 99 100 #else 101 102 #define get_idle_for_cpu(x) (NULL) 103 #define set_idle_for_cpu(x,p) 104 #define set_brendez_area(x) 105 #endif 106 107 108 /* 109 * ITC synchronization related stuff: 110 */ 111 #define MASTER (0) 112 #define SLAVE (SMP_CACHE_BYTES/8) 113 114 #define NUM_ROUNDS 64 /* magic value */ 115 #define NUM_ITERS 5 /* likewise */ 116 117 static DEFINE_SPINLOCK(itc_sync_lock); 118 static volatile unsigned long go[SLAVE + 1]; 119 120 #define DEBUG_ITC_SYNC 0 121 122 extern void __devinit calibrate_delay (void); 123 extern void start_ap (void); 124 extern unsigned long ia64_iobase; 125 126 struct task_struct *task_for_booting_cpu; 127 128 /* 129 * State for each CPU 130 */ 131 DEFINE_PER_CPU(int, cpu_state); 132 133 /* Bitmasks of currently online, and possible CPUs */ 134 cpumask_t cpu_online_map; 135 EXPORT_SYMBOL(cpu_online_map); 136 cpumask_t cpu_possible_map = CPU_MASK_NONE; 137 EXPORT_SYMBOL(cpu_possible_map); 138 139 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 140 cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned; 141 int smp_num_siblings = 1; 142 int smp_num_cpucores = 1; 143 144 /* which logical CPU number maps to which CPU (physical APIC ID) */ 145 volatile int ia64_cpu_to_sapicid[NR_CPUS]; 146 EXPORT_SYMBOL(ia64_cpu_to_sapicid); 147 148 static volatile cpumask_t cpu_callin_map; 149 150 struct smp_boot_data smp_boot_data __initdata; 151 152 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ 153 154 char __initdata no_int_routing; 155 156 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ 157 158 #ifdef CONFIG_FORCE_CPEI_RETARGET 159 #define CPEI_OVERRIDE_DEFAULT (1) 160 #else 161 #define CPEI_OVERRIDE_DEFAULT (0) 162 #endif 163 164 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT; 165 166 static int __init 167 cmdl_force_cpei(char *str) 168 { 169 int value=0; 170 171 get_option (&str, &value); 172 force_cpei_retarget = value; 173 174 return 1; 175 } 176 177 __setup("force_cpei=", cmdl_force_cpei); 178 179 static int __init 180 nointroute (char *str) 181 { 182 no_int_routing = 1; 183 printk ("no_int_routing on\n"); 184 return 1; 185 } 186 187 __setup("nointroute", nointroute); 188 189 static void fix_b0_for_bsp(void) 190 { 191 #ifdef CONFIG_HOTPLUG_CPU 192 int cpuid; 193 static int fix_bsp_b0 = 1; 194 195 cpuid = smp_processor_id(); 196 197 /* 198 * Cache the b0 value on the first AP that comes up 199 */ 200 if (!(fix_bsp_b0 && cpuid)) 201 return; 202 203 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0]; 204 printk ("Fixed BSP b0 value from CPU %d\n", cpuid); 205 206 fix_bsp_b0 = 0; 207 #endif 208 } 209 210 void 211 sync_master (void *arg) 212 { 213 unsigned long flags, i; 214 215 go[MASTER] = 0; 216 217 local_irq_save(flags); 218 { 219 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { 220 while (!go[MASTER]) 221 cpu_relax(); 222 go[MASTER] = 0; 223 go[SLAVE] = ia64_get_itc(); 224 } 225 } 226 local_irq_restore(flags); 227 } 228 229 /* 230 * Return the number of cycles by which our itc differs from the itc on the master 231 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, 232 * negative that it is behind. 233 */ 234 static inline long 235 get_delta (long *rt, long *master) 236 { 237 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; 238 unsigned long tcenter, t0, t1, tm; 239 long i; 240 241 for (i = 0; i < NUM_ITERS; ++i) { 242 t0 = ia64_get_itc(); 243 go[MASTER] = 1; 244 while (!(tm = go[SLAVE])) 245 cpu_relax(); 246 go[SLAVE] = 0; 247 t1 = ia64_get_itc(); 248 249 if (t1 - t0 < best_t1 - best_t0) 250 best_t0 = t0, best_t1 = t1, best_tm = tm; 251 } 252 253 *rt = best_t1 - best_t0; 254 *master = best_tm - best_t0; 255 256 /* average best_t0 and best_t1 without overflow: */ 257 tcenter = (best_t0/2 + best_t1/2); 258 if (best_t0 % 2 + best_t1 % 2 == 2) 259 ++tcenter; 260 return tcenter - best_tm; 261 } 262 263 /* 264 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU 265 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of 266 * unaccounted-for errors (such as getting a machine check in the middle of a calibration 267 * step). The basic idea is for the slave to ask the master what itc value it has and to 268 * read its own itc before and after the master responds. Each iteration gives us three 269 * timestamps: 270 * 271 * slave master 272 * 273 * t0 ---\ 274 * ---\ 275 * ---> 276 * tm 277 * /--- 278 * /--- 279 * t1 <--- 280 * 281 * 282 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 283 * and t1. If we achieve this, the clocks are synchronized provided the interconnect 284 * between the slave and the master is symmetric. Even if the interconnect were 285 * asymmetric, we would still know that the synchronization error is smaller than the 286 * roundtrip latency (t0 - t1). 287 * 288 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to 289 * within one or two cycles. However, we can only *guarantee* that the synchronization is 290 * accurate to within a round-trip time, which is typically in the range of several 291 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually 292 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better 293 * than half a micro second or so. 294 */ 295 void 296 ia64_sync_itc (unsigned int master) 297 { 298 long i, delta, adj, adjust_latency = 0, done = 0; 299 unsigned long flags, rt, master_time_stamp, bound; 300 #if DEBUG_ITC_SYNC 301 struct { 302 long rt; /* roundtrip time */ 303 long master; /* master's timestamp */ 304 long diff; /* difference between midpoint and master's timestamp */ 305 long lat; /* estimate of itc adjustment latency */ 306 } t[NUM_ROUNDS]; 307 #endif 308 309 /* 310 * Make sure local timer ticks are disabled while we sync. If 311 * they were enabled, we'd have to worry about nasty issues 312 * like setting the ITC ahead of (or a long time before) the 313 * next scheduled tick. 314 */ 315 BUG_ON((ia64_get_itv() & (1 << 16)) == 0); 316 317 go[MASTER] = 1; 318 319 if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) { 320 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); 321 return; 322 } 323 324 while (go[MASTER]) 325 cpu_relax(); /* wait for master to be ready */ 326 327 spin_lock_irqsave(&itc_sync_lock, flags); 328 { 329 for (i = 0; i < NUM_ROUNDS; ++i) { 330 delta = get_delta(&rt, &master_time_stamp); 331 if (delta == 0) { 332 done = 1; /* let's lock on to this... */ 333 bound = rt; 334 } 335 336 if (!done) { 337 if (i > 0) { 338 adjust_latency += -delta; 339 adj = -delta + adjust_latency/4; 340 } else 341 adj = -delta; 342 343 ia64_set_itc(ia64_get_itc() + adj); 344 } 345 #if DEBUG_ITC_SYNC 346 t[i].rt = rt; 347 t[i].master = master_time_stamp; 348 t[i].diff = delta; 349 t[i].lat = adjust_latency/4; 350 #endif 351 } 352 } 353 spin_unlock_irqrestore(&itc_sync_lock, flags); 354 355 #if DEBUG_ITC_SYNC 356 for (i = 0; i < NUM_ROUNDS; ++i) 357 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", 358 t[i].rt, t[i].master, t[i].diff, t[i].lat); 359 #endif 360 361 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " 362 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); 363 } 364 365 /* 366 * Ideally sets up per-cpu profiling hooks. Doesn't do much now... 367 */ 368 static inline void __devinit 369 smp_setup_percpu_timer (void) 370 { 371 } 372 373 static void __cpuinit 374 smp_callin (void) 375 { 376 int cpuid, phys_id, itc_master; 377 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo; 378 extern void ia64_init_itm(void); 379 extern volatile int time_keeper_id; 380 381 #ifdef CONFIG_PERFMON 382 extern void pfm_init_percpu(void); 383 #endif 384 385 cpuid = smp_processor_id(); 386 phys_id = hard_smp_processor_id(); 387 itc_master = time_keeper_id; 388 389 if (cpu_online(cpuid)) { 390 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", 391 phys_id, cpuid); 392 BUG(); 393 } 394 395 fix_b0_for_bsp(); 396 397 lock_ipi_calllock(); 398 spin_lock(&vector_lock); 399 /* Setup the per cpu irq handling data structures */ 400 __setup_vector_irq(cpuid); 401 cpu_set(cpuid, cpu_online_map); 402 unlock_ipi_calllock(); 403 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 404 spin_unlock(&vector_lock); 405 406 smp_setup_percpu_timer(); 407 408 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ 409 410 #ifdef CONFIG_PERFMON 411 pfm_init_percpu(); 412 #endif 413 414 local_irq_enable(); 415 416 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { 417 /* 418 * Synchronize the ITC with the BP. Need to do this after irqs are 419 * enabled because ia64_sync_itc() calls smp_call_function_single(), which 420 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls 421 * local_bh_enable(), which bugs out if irqs are not enabled... 422 */ 423 Dprintk("Going to syncup ITC with ITC Master.\n"); 424 ia64_sync_itc(itc_master); 425 } 426 427 /* 428 * Get our bogomips. 429 */ 430 ia64_init_itm(); 431 432 /* 433 * Delay calibration can be skipped if new processor is identical to the 434 * previous processor. 435 */ 436 last_cpuinfo = cpu_data(cpuid - 1); 437 this_cpuinfo = local_cpu_data; 438 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq || 439 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq || 440 last_cpuinfo->features != this_cpuinfo->features || 441 last_cpuinfo->revision != this_cpuinfo->revision || 442 last_cpuinfo->family != this_cpuinfo->family || 443 last_cpuinfo->archrev != this_cpuinfo->archrev || 444 last_cpuinfo->model != this_cpuinfo->model) 445 calibrate_delay(); 446 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 447 448 #ifdef CONFIG_IA32_SUPPORT 449 ia32_gdt_init(); 450 #endif 451 452 /* 453 * Allow the master to continue. 454 */ 455 cpu_set(cpuid, cpu_callin_map); 456 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); 457 } 458 459 460 /* 461 * Activate a secondary processor. head.S calls this. 462 */ 463 int __cpuinit 464 start_secondary (void *unused) 465 { 466 /* Early console may use I/O ports */ 467 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); 468 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); 469 efi_map_pal_code(); 470 cpu_init(); 471 preempt_disable(); 472 smp_callin(); 473 474 cpu_idle(); 475 return 0; 476 } 477 478 struct pt_regs * __devinit idle_regs(struct pt_regs *regs) 479 { 480 return NULL; 481 } 482 483 struct create_idle { 484 struct work_struct work; 485 struct task_struct *idle; 486 struct completion done; 487 int cpu; 488 }; 489 490 void __cpuinit 491 do_fork_idle(struct work_struct *work) 492 { 493 struct create_idle *c_idle = 494 container_of(work, struct create_idle, work); 495 496 c_idle->idle = fork_idle(c_idle->cpu); 497 complete(&c_idle->done); 498 } 499 500 static int __cpuinit 501 do_boot_cpu (int sapicid, int cpu) 502 { 503 int timeout; 504 struct create_idle c_idle = { 505 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle), 506 .cpu = cpu, 507 .done = COMPLETION_INITIALIZER(c_idle.done), 508 }; 509 510 c_idle.idle = get_idle_for_cpu(cpu); 511 if (c_idle.idle) { 512 init_idle(c_idle.idle, cpu); 513 goto do_rest; 514 } 515 516 /* 517 * We can't use kernel_thread since we must avoid to reschedule the child. 518 */ 519 if (!keventd_up() || current_is_keventd()) 520 c_idle.work.func(&c_idle.work); 521 else { 522 schedule_work(&c_idle.work); 523 wait_for_completion(&c_idle.done); 524 } 525 526 if (IS_ERR(c_idle.idle)) 527 panic("failed fork for CPU %d", cpu); 528 529 set_idle_for_cpu(cpu, c_idle.idle); 530 531 do_rest: 532 task_for_booting_cpu = c_idle.idle; 533 534 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); 535 536 set_brendez_area(cpu); 537 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); 538 539 /* 540 * Wait 10s total for the AP to start 541 */ 542 Dprintk("Waiting on callin_map ..."); 543 for (timeout = 0; timeout < 100000; timeout++) { 544 if (cpu_isset(cpu, cpu_callin_map)) 545 break; /* It has booted */ 546 udelay(100); 547 } 548 Dprintk("\n"); 549 550 if (!cpu_isset(cpu, cpu_callin_map)) { 551 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); 552 ia64_cpu_to_sapicid[cpu] = -1; 553 cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */ 554 return -EINVAL; 555 } 556 return 0; 557 } 558 559 static int __init 560 decay (char *str) 561 { 562 int ticks; 563 get_option (&str, &ticks); 564 return 1; 565 } 566 567 __setup("decay=", decay); 568 569 /* 570 * Initialize the logical CPU number to SAPICID mapping 571 */ 572 void __init 573 smp_build_cpu_map (void) 574 { 575 int sapicid, cpu, i; 576 int boot_cpu_id = hard_smp_processor_id(); 577 578 for (cpu = 0; cpu < NR_CPUS; cpu++) { 579 ia64_cpu_to_sapicid[cpu] = -1; 580 } 581 582 ia64_cpu_to_sapicid[0] = boot_cpu_id; 583 cpus_clear(cpu_present_map); 584 cpu_set(0, cpu_present_map); 585 cpu_set(0, cpu_possible_map); 586 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { 587 sapicid = smp_boot_data.cpu_phys_id[i]; 588 if (sapicid == boot_cpu_id) 589 continue; 590 cpu_set(cpu, cpu_present_map); 591 cpu_set(cpu, cpu_possible_map); 592 ia64_cpu_to_sapicid[cpu] = sapicid; 593 cpu++; 594 } 595 } 596 597 /* 598 * Cycle through the APs sending Wakeup IPIs to boot each. 599 */ 600 void __init 601 smp_prepare_cpus (unsigned int max_cpus) 602 { 603 int boot_cpu_id = hard_smp_processor_id(); 604 605 /* 606 * Initialize the per-CPU profiling counter/multiplier 607 */ 608 609 smp_setup_percpu_timer(); 610 611 /* 612 * We have the boot CPU online for sure. 613 */ 614 cpu_set(0, cpu_online_map); 615 cpu_set(0, cpu_callin_map); 616 617 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 618 ia64_cpu_to_sapicid[0] = boot_cpu_id; 619 620 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); 621 622 current_thread_info()->cpu = 0; 623 624 /* 625 * If SMP should be disabled, then really disable it! 626 */ 627 if (!max_cpus) { 628 printk(KERN_INFO "SMP mode deactivated.\n"); 629 cpus_clear(cpu_online_map); 630 cpus_clear(cpu_present_map); 631 cpus_clear(cpu_possible_map); 632 cpu_set(0, cpu_online_map); 633 cpu_set(0, cpu_present_map); 634 cpu_set(0, cpu_possible_map); 635 return; 636 } 637 } 638 639 void __devinit smp_prepare_boot_cpu(void) 640 { 641 cpu_set(smp_processor_id(), cpu_online_map); 642 cpu_set(smp_processor_id(), cpu_callin_map); 643 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 644 } 645 646 #ifdef CONFIG_HOTPLUG_CPU 647 static inline void 648 clear_cpu_sibling_map(int cpu) 649 { 650 int i; 651 652 for_each_cpu_mask(i, cpu_sibling_map[cpu]) 653 cpu_clear(cpu, cpu_sibling_map[i]); 654 for_each_cpu_mask(i, cpu_core_map[cpu]) 655 cpu_clear(cpu, cpu_core_map[i]); 656 657 cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE; 658 } 659 660 static void 661 remove_siblinginfo(int cpu) 662 { 663 int last = 0; 664 665 if (cpu_data(cpu)->threads_per_core == 1 && 666 cpu_data(cpu)->cores_per_socket == 1) { 667 cpu_clear(cpu, cpu_core_map[cpu]); 668 cpu_clear(cpu, cpu_sibling_map[cpu]); 669 return; 670 } 671 672 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0); 673 674 /* remove it from all sibling map's */ 675 clear_cpu_sibling_map(cpu); 676 } 677 678 extern void fixup_irqs(void); 679 680 int migrate_platform_irqs(unsigned int cpu) 681 { 682 int new_cpei_cpu; 683 irq_desc_t *desc = NULL; 684 cpumask_t mask; 685 int retval = 0; 686 687 /* 688 * dont permit CPEI target to removed. 689 */ 690 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) { 691 printk ("CPU (%d) is CPEI Target\n", cpu); 692 if (can_cpei_retarget()) { 693 /* 694 * Now re-target the CPEI to a different processor 695 */ 696 new_cpei_cpu = any_online_cpu(cpu_online_map); 697 mask = cpumask_of_cpu(new_cpei_cpu); 698 set_cpei_target_cpu(new_cpei_cpu); 699 desc = irq_desc + ia64_cpe_irq; 700 /* 701 * Switch for now, immediately, we need to do fake intr 702 * as other interrupts, but need to study CPEI behaviour with 703 * polling before making changes. 704 */ 705 if (desc) { 706 desc->chip->disable(ia64_cpe_irq); 707 desc->chip->set_affinity(ia64_cpe_irq, mask); 708 desc->chip->enable(ia64_cpe_irq); 709 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 710 } 711 } 712 if (!desc) { 713 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 714 retval = -EBUSY; 715 } 716 } 717 return retval; 718 } 719 720 /* must be called with cpucontrol mutex held */ 721 int __cpu_disable(void) 722 { 723 int cpu = smp_processor_id(); 724 725 /* 726 * dont permit boot processor for now 727 */ 728 if (cpu == 0 && !bsp_remove_ok) { 729 printk ("Your platform does not support removal of BSP\n"); 730 return (-EBUSY); 731 } 732 733 cpu_clear(cpu, cpu_online_map); 734 735 if (migrate_platform_irqs(cpu)) { 736 cpu_set(cpu, cpu_online_map); 737 return (-EBUSY); 738 } 739 740 remove_siblinginfo(cpu); 741 cpu_clear(cpu, cpu_online_map); 742 fixup_irqs(); 743 local_flush_tlb_all(); 744 cpu_clear(cpu, cpu_callin_map); 745 return 0; 746 } 747 748 void __cpu_die(unsigned int cpu) 749 { 750 unsigned int i; 751 752 for (i = 0; i < 100; i++) { 753 /* They ack this in play_dead by setting CPU_DEAD */ 754 if (per_cpu(cpu_state, cpu) == CPU_DEAD) 755 { 756 printk ("CPU %d is now offline\n", cpu); 757 return; 758 } 759 msleep(100); 760 } 761 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 762 } 763 #else /* !CONFIG_HOTPLUG_CPU */ 764 int __cpu_disable(void) 765 { 766 return -ENOSYS; 767 } 768 769 void __cpu_die(unsigned int cpu) 770 { 771 /* We said "no" in __cpu_disable */ 772 BUG(); 773 } 774 #endif /* CONFIG_HOTPLUG_CPU */ 775 776 void 777 smp_cpus_done (unsigned int dummy) 778 { 779 int cpu; 780 unsigned long bogosum = 0; 781 782 /* 783 * Allow the user to impress friends. 784 */ 785 786 for_each_online_cpu(cpu) { 787 bogosum += cpu_data(cpu)->loops_per_jiffy; 788 } 789 790 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 791 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); 792 } 793 794 static inline void __devinit 795 set_cpu_sibling_map(int cpu) 796 { 797 int i; 798 799 for_each_online_cpu(i) { 800 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { 801 cpu_set(i, cpu_core_map[cpu]); 802 cpu_set(cpu, cpu_core_map[i]); 803 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { 804 cpu_set(i, cpu_sibling_map[cpu]); 805 cpu_set(cpu, cpu_sibling_map[i]); 806 } 807 } 808 } 809 } 810 811 int __cpuinit 812 __cpu_up (unsigned int cpu) 813 { 814 int ret; 815 int sapicid; 816 817 sapicid = ia64_cpu_to_sapicid[cpu]; 818 if (sapicid == -1) 819 return -EINVAL; 820 821 /* 822 * Already booted cpu? not valid anymore since we dont 823 * do idle loop tightspin anymore. 824 */ 825 if (cpu_isset(cpu, cpu_callin_map)) 826 return -EINVAL; 827 828 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 829 /* Processor goes to start_secondary(), sets online flag */ 830 ret = do_boot_cpu(sapicid, cpu); 831 if (ret < 0) 832 return ret; 833 834 if (cpu_data(cpu)->threads_per_core == 1 && 835 cpu_data(cpu)->cores_per_socket == 1) { 836 cpu_set(cpu, cpu_sibling_map[cpu]); 837 cpu_set(cpu, cpu_core_map[cpu]); 838 return 0; 839 } 840 841 set_cpu_sibling_map(cpu); 842 843 return 0; 844 } 845 846 /* 847 * Assume that CPUs have been discovered by some platform-dependent interface. For 848 * SoftSDV/Lion, that would be ACPI. 849 * 850 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). 851 */ 852 void __init 853 init_smp_config(void) 854 { 855 struct fptr { 856 unsigned long fp; 857 unsigned long gp; 858 } *ap_startup; 859 long sal_ret; 860 861 /* Tell SAL where to drop the APs. */ 862 ap_startup = (struct fptr *) start_ap; 863 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, 864 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); 865 if (sal_ret < 0) 866 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", 867 ia64_sal_strerror(sal_ret)); 868 } 869 870 /* 871 * identify_siblings(cpu) gets called from identify_cpu. This populates the 872 * information related to logical execution units in per_cpu_data structure. 873 */ 874 void __devinit 875 identify_siblings(struct cpuinfo_ia64 *c) 876 { 877 s64 status; 878 u16 pltid; 879 pal_logical_to_physical_t info; 880 881 if (smp_num_cpucores == 1 && smp_num_siblings == 1) 882 return; 883 884 if ((status = ia64_pal_logical_to_phys(-1, &info)) != PAL_STATUS_SUCCESS) { 885 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n", 886 status); 887 return; 888 } 889 if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) { 890 printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status); 891 return; 892 } 893 894 c->socket_id = (pltid << 8) | info.overview_ppid; 895 c->cores_per_socket = info.overview_cpp; 896 c->threads_per_core = info.overview_tpc; 897 c->num_log = info.overview_num_log; 898 899 c->core_id = info.log1_cid; 900 c->thread_id = info.log1_tid; 901 } 902 903 /* 904 * returns non zero, if multi-threading is enabled 905 * on at least one physical package. Due to hotplug cpu 906 * and (maxcpus=), all threads may not necessarily be enabled 907 * even though the processor supports multi-threading. 908 */ 909 int is_multithreading_enabled(void) 910 { 911 int i, j; 912 913 for_each_present_cpu(i) { 914 for_each_present_cpu(j) { 915 if (j == i) 916 continue; 917 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) { 918 if (cpu_data(j)->core_id == cpu_data(i)->core_id) 919 return 1; 920 } 921 } 922 } 923 return 0; 924 } 925 EXPORT_SYMBOL_GPL(is_multithreading_enabled); 926