1 /* 2 * SMP boot-related support 3 * 4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 5 * David Mosberger-Tang <davidm@hpl.hp.com> 6 * Copyright (C) 2001, 2004-2005 Intel Corp 7 * Rohit Seth <rohit.seth@intel.com> 8 * Suresh Siddha <suresh.b.siddha@intel.com> 9 * Gordon Jin <gordon.jin@intel.com> 10 * Ashok Raj <ashok.raj@intel.com> 11 * 12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. 13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. 14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. 15 * smp_boot_cpus()/smp_commence() is replaced by 16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). 17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support 18 * 04/12/26 Jin Gordon <gordon.jin@intel.com> 19 * 04/12/26 Rohit Seth <rohit.seth@intel.com> 20 * Add multi-threading and multi-core detection 21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com> 22 * Setup cpu_sibling_map and cpu_core_map 23 */ 24 25 #include <linux/module.h> 26 #include <linux/acpi.h> 27 #include <linux/bootmem.h> 28 #include <linux/cpu.h> 29 #include <linux/delay.h> 30 #include <linux/init.h> 31 #include <linux/interrupt.h> 32 #include <linux/irq.h> 33 #include <linux/kernel.h> 34 #include <linux/kernel_stat.h> 35 #include <linux/mm.h> 36 #include <linux/notifier.h> 37 #include <linux/smp.h> 38 #include <linux/spinlock.h> 39 #include <linux/efi.h> 40 #include <linux/percpu.h> 41 #include <linux/bitops.h> 42 43 #include <asm/atomic.h> 44 #include <asm/cache.h> 45 #include <asm/current.h> 46 #include <asm/delay.h> 47 #include <asm/ia32.h> 48 #include <asm/io.h> 49 #include <asm/irq.h> 50 #include <asm/machvec.h> 51 #include <asm/mca.h> 52 #include <asm/page.h> 53 #include <asm/paravirt.h> 54 #include <asm/pgalloc.h> 55 #include <asm/pgtable.h> 56 #include <asm/processor.h> 57 #include <asm/ptrace.h> 58 #include <asm/sal.h> 59 #include <asm/system.h> 60 #include <asm/tlbflush.h> 61 #include <asm/unistd.h> 62 #include <asm/sn/arch.h> 63 64 #define SMP_DEBUG 0 65 66 #if SMP_DEBUG 67 #define Dprintk(x...) printk(x) 68 #else 69 #define Dprintk(x...) 70 #endif 71 72 #ifdef CONFIG_HOTPLUG_CPU 73 #ifdef CONFIG_PERMIT_BSP_REMOVE 74 #define bsp_remove_ok 1 75 #else 76 #define bsp_remove_ok 0 77 #endif 78 79 /* 80 * Store all idle threads, this can be reused instead of creating 81 * a new thread. Also avoids complicated thread destroy functionality 82 * for idle threads. 83 */ 84 struct task_struct *idle_thread_array[NR_CPUS]; 85 86 /* 87 * Global array allocated for NR_CPUS at boot time 88 */ 89 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; 90 91 /* 92 * start_ap in head.S uses this to store current booting cpu 93 * info. 94 */ 95 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; 96 97 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); 98 99 #define get_idle_for_cpu(x) (idle_thread_array[(x)]) 100 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) 101 102 #else 103 104 #define get_idle_for_cpu(x) (NULL) 105 #define set_idle_for_cpu(x,p) 106 #define set_brendez_area(x) 107 #endif 108 109 110 /* 111 * ITC synchronization related stuff: 112 */ 113 #define MASTER (0) 114 #define SLAVE (SMP_CACHE_BYTES/8) 115 116 #define NUM_ROUNDS 64 /* magic value */ 117 #define NUM_ITERS 5 /* likewise */ 118 119 static DEFINE_SPINLOCK(itc_sync_lock); 120 static volatile unsigned long go[SLAVE + 1]; 121 122 #define DEBUG_ITC_SYNC 0 123 124 extern void start_ap (void); 125 extern unsigned long ia64_iobase; 126 127 struct task_struct *task_for_booting_cpu; 128 129 /* 130 * State for each CPU 131 */ 132 DEFINE_PER_CPU(int, cpu_state); 133 134 /* Bitmasks of currently online, and possible CPUs */ 135 cpumask_t cpu_online_map; 136 EXPORT_SYMBOL(cpu_online_map); 137 cpumask_t cpu_possible_map = CPU_MASK_NONE; 138 EXPORT_SYMBOL(cpu_possible_map); 139 140 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 141 EXPORT_SYMBOL(cpu_core_map); 142 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); 143 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 144 145 int smp_num_siblings = 1; 146 147 /* which logical CPU number maps to which CPU (physical APIC ID) */ 148 volatile int ia64_cpu_to_sapicid[NR_CPUS]; 149 EXPORT_SYMBOL(ia64_cpu_to_sapicid); 150 151 static volatile cpumask_t cpu_callin_map; 152 153 struct smp_boot_data smp_boot_data __initdata; 154 155 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ 156 157 char __initdata no_int_routing; 158 159 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ 160 161 #ifdef CONFIG_FORCE_CPEI_RETARGET 162 #define CPEI_OVERRIDE_DEFAULT (1) 163 #else 164 #define CPEI_OVERRIDE_DEFAULT (0) 165 #endif 166 167 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT; 168 169 static int __init 170 cmdl_force_cpei(char *str) 171 { 172 int value=0; 173 174 get_option (&str, &value); 175 force_cpei_retarget = value; 176 177 return 1; 178 } 179 180 __setup("force_cpei=", cmdl_force_cpei); 181 182 static int __init 183 nointroute (char *str) 184 { 185 no_int_routing = 1; 186 printk ("no_int_routing on\n"); 187 return 1; 188 } 189 190 __setup("nointroute", nointroute); 191 192 static void fix_b0_for_bsp(void) 193 { 194 #ifdef CONFIG_HOTPLUG_CPU 195 int cpuid; 196 static int fix_bsp_b0 = 1; 197 198 cpuid = smp_processor_id(); 199 200 /* 201 * Cache the b0 value on the first AP that comes up 202 */ 203 if (!(fix_bsp_b0 && cpuid)) 204 return; 205 206 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0]; 207 printk ("Fixed BSP b0 value from CPU %d\n", cpuid); 208 209 fix_bsp_b0 = 0; 210 #endif 211 } 212 213 void 214 sync_master (void *arg) 215 { 216 unsigned long flags, i; 217 218 go[MASTER] = 0; 219 220 local_irq_save(flags); 221 { 222 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { 223 while (!go[MASTER]) 224 cpu_relax(); 225 go[MASTER] = 0; 226 go[SLAVE] = ia64_get_itc(); 227 } 228 } 229 local_irq_restore(flags); 230 } 231 232 /* 233 * Return the number of cycles by which our itc differs from the itc on the master 234 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, 235 * negative that it is behind. 236 */ 237 static inline long 238 get_delta (long *rt, long *master) 239 { 240 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; 241 unsigned long tcenter, t0, t1, tm; 242 long i; 243 244 for (i = 0; i < NUM_ITERS; ++i) { 245 t0 = ia64_get_itc(); 246 go[MASTER] = 1; 247 while (!(tm = go[SLAVE])) 248 cpu_relax(); 249 go[SLAVE] = 0; 250 t1 = ia64_get_itc(); 251 252 if (t1 - t0 < best_t1 - best_t0) 253 best_t0 = t0, best_t1 = t1, best_tm = tm; 254 } 255 256 *rt = best_t1 - best_t0; 257 *master = best_tm - best_t0; 258 259 /* average best_t0 and best_t1 without overflow: */ 260 tcenter = (best_t0/2 + best_t1/2); 261 if (best_t0 % 2 + best_t1 % 2 == 2) 262 ++tcenter; 263 return tcenter - best_tm; 264 } 265 266 /* 267 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU 268 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of 269 * unaccounted-for errors (such as getting a machine check in the middle of a calibration 270 * step). The basic idea is for the slave to ask the master what itc value it has and to 271 * read its own itc before and after the master responds. Each iteration gives us three 272 * timestamps: 273 * 274 * slave master 275 * 276 * t0 ---\ 277 * ---\ 278 * ---> 279 * tm 280 * /--- 281 * /--- 282 * t1 <--- 283 * 284 * 285 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 286 * and t1. If we achieve this, the clocks are synchronized provided the interconnect 287 * between the slave and the master is symmetric. Even if the interconnect were 288 * asymmetric, we would still know that the synchronization error is smaller than the 289 * roundtrip latency (t0 - t1). 290 * 291 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to 292 * within one or two cycles. However, we can only *guarantee* that the synchronization is 293 * accurate to within a round-trip time, which is typically in the range of several 294 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually 295 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better 296 * than half a micro second or so. 297 */ 298 void 299 ia64_sync_itc (unsigned int master) 300 { 301 long i, delta, adj, adjust_latency = 0, done = 0; 302 unsigned long flags, rt, master_time_stamp, bound; 303 #if DEBUG_ITC_SYNC 304 struct { 305 long rt; /* roundtrip time */ 306 long master; /* master's timestamp */ 307 long diff; /* difference between midpoint and master's timestamp */ 308 long lat; /* estimate of itc adjustment latency */ 309 } t[NUM_ROUNDS]; 310 #endif 311 312 /* 313 * Make sure local timer ticks are disabled while we sync. If 314 * they were enabled, we'd have to worry about nasty issues 315 * like setting the ITC ahead of (or a long time before) the 316 * next scheduled tick. 317 */ 318 BUG_ON((ia64_get_itv() & (1 << 16)) == 0); 319 320 go[MASTER] = 1; 321 322 if (smp_call_function_single(master, sync_master, NULL, 0) < 0) { 323 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); 324 return; 325 } 326 327 while (go[MASTER]) 328 cpu_relax(); /* wait for master to be ready */ 329 330 spin_lock_irqsave(&itc_sync_lock, flags); 331 { 332 for (i = 0; i < NUM_ROUNDS; ++i) { 333 delta = get_delta(&rt, &master_time_stamp); 334 if (delta == 0) { 335 done = 1; /* let's lock on to this... */ 336 bound = rt; 337 } 338 339 if (!done) { 340 if (i > 0) { 341 adjust_latency += -delta; 342 adj = -delta + adjust_latency/4; 343 } else 344 adj = -delta; 345 346 ia64_set_itc(ia64_get_itc() + adj); 347 } 348 #if DEBUG_ITC_SYNC 349 t[i].rt = rt; 350 t[i].master = master_time_stamp; 351 t[i].diff = delta; 352 t[i].lat = adjust_latency/4; 353 #endif 354 } 355 } 356 spin_unlock_irqrestore(&itc_sync_lock, flags); 357 358 #if DEBUG_ITC_SYNC 359 for (i = 0; i < NUM_ROUNDS; ++i) 360 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", 361 t[i].rt, t[i].master, t[i].diff, t[i].lat); 362 #endif 363 364 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " 365 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); 366 } 367 368 /* 369 * Ideally sets up per-cpu profiling hooks. Doesn't do much now... 370 */ 371 static inline void __devinit 372 smp_setup_percpu_timer (void) 373 { 374 } 375 376 static void __cpuinit 377 smp_callin (void) 378 { 379 int cpuid, phys_id, itc_master; 380 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo; 381 extern void ia64_init_itm(void); 382 extern volatile int time_keeper_id; 383 384 #ifdef CONFIG_PERFMON 385 extern void pfm_init_percpu(void); 386 #endif 387 388 cpuid = smp_processor_id(); 389 phys_id = hard_smp_processor_id(); 390 itc_master = time_keeper_id; 391 392 if (cpu_online(cpuid)) { 393 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", 394 phys_id, cpuid); 395 BUG(); 396 } 397 398 fix_b0_for_bsp(); 399 400 ipi_call_lock_irq(); 401 spin_lock(&vector_lock); 402 /* Setup the per cpu irq handling data structures */ 403 __setup_vector_irq(cpuid); 404 notify_cpu_starting(cpuid); 405 cpu_set(cpuid, cpu_online_map); 406 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 407 spin_unlock(&vector_lock); 408 ipi_call_unlock_irq(); 409 410 smp_setup_percpu_timer(); 411 412 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ 413 414 #ifdef CONFIG_PERFMON 415 pfm_init_percpu(); 416 #endif 417 418 local_irq_enable(); 419 420 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { 421 /* 422 * Synchronize the ITC with the BP. Need to do this after irqs are 423 * enabled because ia64_sync_itc() calls smp_call_function_single(), which 424 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls 425 * local_bh_enable(), which bugs out if irqs are not enabled... 426 */ 427 Dprintk("Going to syncup ITC with ITC Master.\n"); 428 ia64_sync_itc(itc_master); 429 } 430 431 /* 432 * Get our bogomips. 433 */ 434 ia64_init_itm(); 435 436 /* 437 * Delay calibration can be skipped if new processor is identical to the 438 * previous processor. 439 */ 440 last_cpuinfo = cpu_data(cpuid - 1); 441 this_cpuinfo = local_cpu_data; 442 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq || 443 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq || 444 last_cpuinfo->features != this_cpuinfo->features || 445 last_cpuinfo->revision != this_cpuinfo->revision || 446 last_cpuinfo->family != this_cpuinfo->family || 447 last_cpuinfo->archrev != this_cpuinfo->archrev || 448 last_cpuinfo->model != this_cpuinfo->model) 449 calibrate_delay(); 450 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 451 452 #ifdef CONFIG_IA32_SUPPORT 453 ia32_gdt_init(); 454 #endif 455 456 /* 457 * Allow the master to continue. 458 */ 459 cpu_set(cpuid, cpu_callin_map); 460 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); 461 } 462 463 464 /* 465 * Activate a secondary processor. head.S calls this. 466 */ 467 int __cpuinit 468 start_secondary (void *unused) 469 { 470 /* Early console may use I/O ports */ 471 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); 472 #ifndef CONFIG_PRINTK_TIME 473 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); 474 #endif 475 efi_map_pal_code(); 476 cpu_init(); 477 preempt_disable(); 478 smp_callin(); 479 480 cpu_idle(); 481 return 0; 482 } 483 484 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) 485 { 486 return NULL; 487 } 488 489 struct create_idle { 490 struct work_struct work; 491 struct task_struct *idle; 492 struct completion done; 493 int cpu; 494 }; 495 496 void __cpuinit 497 do_fork_idle(struct work_struct *work) 498 { 499 struct create_idle *c_idle = 500 container_of(work, struct create_idle, work); 501 502 c_idle->idle = fork_idle(c_idle->cpu); 503 complete(&c_idle->done); 504 } 505 506 static int __cpuinit 507 do_boot_cpu (int sapicid, int cpu) 508 { 509 int timeout; 510 struct create_idle c_idle = { 511 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle), 512 .cpu = cpu, 513 .done = COMPLETION_INITIALIZER(c_idle.done), 514 }; 515 516 c_idle.idle = get_idle_for_cpu(cpu); 517 if (c_idle.idle) { 518 init_idle(c_idle.idle, cpu); 519 goto do_rest; 520 } 521 522 /* 523 * We can't use kernel_thread since we must avoid to reschedule the child. 524 */ 525 if (!keventd_up() || current_is_keventd()) 526 c_idle.work.func(&c_idle.work); 527 else { 528 schedule_work(&c_idle.work); 529 wait_for_completion(&c_idle.done); 530 } 531 532 if (IS_ERR(c_idle.idle)) 533 panic("failed fork for CPU %d", cpu); 534 535 set_idle_for_cpu(cpu, c_idle.idle); 536 537 do_rest: 538 task_for_booting_cpu = c_idle.idle; 539 540 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); 541 542 set_brendez_area(cpu); 543 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); 544 545 /* 546 * Wait 10s total for the AP to start 547 */ 548 Dprintk("Waiting on callin_map ..."); 549 for (timeout = 0; timeout < 100000; timeout++) { 550 if (cpu_isset(cpu, cpu_callin_map)) 551 break; /* It has booted */ 552 udelay(100); 553 } 554 Dprintk("\n"); 555 556 if (!cpu_isset(cpu, cpu_callin_map)) { 557 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); 558 ia64_cpu_to_sapicid[cpu] = -1; 559 cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */ 560 return -EINVAL; 561 } 562 return 0; 563 } 564 565 static int __init 566 decay (char *str) 567 { 568 int ticks; 569 get_option (&str, &ticks); 570 return 1; 571 } 572 573 __setup("decay=", decay); 574 575 /* 576 * Initialize the logical CPU number to SAPICID mapping 577 */ 578 void __init 579 smp_build_cpu_map (void) 580 { 581 int sapicid, cpu, i; 582 int boot_cpu_id = hard_smp_processor_id(); 583 584 for (cpu = 0; cpu < NR_CPUS; cpu++) { 585 ia64_cpu_to_sapicid[cpu] = -1; 586 } 587 588 ia64_cpu_to_sapicid[0] = boot_cpu_id; 589 cpus_clear(cpu_present_map); 590 cpu_set(0, cpu_present_map); 591 cpu_set(0, cpu_possible_map); 592 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { 593 sapicid = smp_boot_data.cpu_phys_id[i]; 594 if (sapicid == boot_cpu_id) 595 continue; 596 cpu_set(cpu, cpu_present_map); 597 cpu_set(cpu, cpu_possible_map); 598 ia64_cpu_to_sapicid[cpu] = sapicid; 599 cpu++; 600 } 601 } 602 603 /* 604 * Cycle through the APs sending Wakeup IPIs to boot each. 605 */ 606 void __init 607 smp_prepare_cpus (unsigned int max_cpus) 608 { 609 int boot_cpu_id = hard_smp_processor_id(); 610 611 /* 612 * Initialize the per-CPU profiling counter/multiplier 613 */ 614 615 smp_setup_percpu_timer(); 616 617 /* 618 * We have the boot CPU online for sure. 619 */ 620 cpu_set(0, cpu_online_map); 621 cpu_set(0, cpu_callin_map); 622 623 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 624 ia64_cpu_to_sapicid[0] = boot_cpu_id; 625 626 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); 627 628 current_thread_info()->cpu = 0; 629 630 /* 631 * If SMP should be disabled, then really disable it! 632 */ 633 if (!max_cpus) { 634 printk(KERN_INFO "SMP mode deactivated.\n"); 635 cpus_clear(cpu_online_map); 636 cpus_clear(cpu_present_map); 637 cpus_clear(cpu_possible_map); 638 cpu_set(0, cpu_online_map); 639 cpu_set(0, cpu_present_map); 640 cpu_set(0, cpu_possible_map); 641 return; 642 } 643 } 644 645 void __devinit smp_prepare_boot_cpu(void) 646 { 647 cpu_set(smp_processor_id(), cpu_online_map); 648 cpu_set(smp_processor_id(), cpu_callin_map); 649 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 650 paravirt_post_smp_prepare_boot_cpu(); 651 } 652 653 #ifdef CONFIG_HOTPLUG_CPU 654 static inline void 655 clear_cpu_sibling_map(int cpu) 656 { 657 int i; 658 659 for_each_cpu_mask(i, per_cpu(cpu_sibling_map, cpu)) 660 cpu_clear(cpu, per_cpu(cpu_sibling_map, i)); 661 for_each_cpu_mask(i, cpu_core_map[cpu]) 662 cpu_clear(cpu, cpu_core_map[i]); 663 664 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE; 665 } 666 667 static void 668 remove_siblinginfo(int cpu) 669 { 670 int last = 0; 671 672 if (cpu_data(cpu)->threads_per_core == 1 && 673 cpu_data(cpu)->cores_per_socket == 1) { 674 cpu_clear(cpu, cpu_core_map[cpu]); 675 cpu_clear(cpu, per_cpu(cpu_sibling_map, cpu)); 676 return; 677 } 678 679 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0); 680 681 /* remove it from all sibling map's */ 682 clear_cpu_sibling_map(cpu); 683 } 684 685 extern void fixup_irqs(void); 686 687 int migrate_platform_irqs(unsigned int cpu) 688 { 689 int new_cpei_cpu; 690 irq_desc_t *desc = NULL; 691 cpumask_t mask; 692 int retval = 0; 693 694 /* 695 * dont permit CPEI target to removed. 696 */ 697 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) { 698 printk ("CPU (%d) is CPEI Target\n", cpu); 699 if (can_cpei_retarget()) { 700 /* 701 * Now re-target the CPEI to a different processor 702 */ 703 new_cpei_cpu = any_online_cpu(cpu_online_map); 704 mask = cpumask_of_cpu(new_cpei_cpu); 705 set_cpei_target_cpu(new_cpei_cpu); 706 desc = irq_desc + ia64_cpe_irq; 707 /* 708 * Switch for now, immediately, we need to do fake intr 709 * as other interrupts, but need to study CPEI behaviour with 710 * polling before making changes. 711 */ 712 if (desc) { 713 desc->chip->disable(ia64_cpe_irq); 714 desc->chip->set_affinity(ia64_cpe_irq, mask); 715 desc->chip->enable(ia64_cpe_irq); 716 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 717 } 718 } 719 if (!desc) { 720 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 721 retval = -EBUSY; 722 } 723 } 724 return retval; 725 } 726 727 /* must be called with cpucontrol mutex held */ 728 int __cpu_disable(void) 729 { 730 int cpu = smp_processor_id(); 731 732 /* 733 * dont permit boot processor for now 734 */ 735 if (cpu == 0 && !bsp_remove_ok) { 736 printk ("Your platform does not support removal of BSP\n"); 737 return (-EBUSY); 738 } 739 740 if (ia64_platform_is("sn2")) { 741 if (!sn_cpu_disable_allowed(cpu)) 742 return -EBUSY; 743 } 744 745 if (migrate_platform_irqs(cpu)) { 746 cpu_set(cpu, cpu_online_map); 747 return (-EBUSY); 748 } 749 750 remove_siblinginfo(cpu); 751 fixup_irqs(); 752 cpu_clear(cpu, cpu_online_map); 753 local_flush_tlb_all(); 754 cpu_clear(cpu, cpu_callin_map); 755 return 0; 756 } 757 758 void __cpu_die(unsigned int cpu) 759 { 760 unsigned int i; 761 762 for (i = 0; i < 100; i++) { 763 /* They ack this in play_dead by setting CPU_DEAD */ 764 if (per_cpu(cpu_state, cpu) == CPU_DEAD) 765 { 766 printk ("CPU %d is now offline\n", cpu); 767 return; 768 } 769 msleep(100); 770 } 771 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 772 } 773 #endif /* CONFIG_HOTPLUG_CPU */ 774 775 void 776 smp_cpus_done (unsigned int dummy) 777 { 778 int cpu; 779 unsigned long bogosum = 0; 780 781 /* 782 * Allow the user to impress friends. 783 */ 784 785 for_each_online_cpu(cpu) { 786 bogosum += cpu_data(cpu)->loops_per_jiffy; 787 } 788 789 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 790 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); 791 } 792 793 static inline void __devinit 794 set_cpu_sibling_map(int cpu) 795 { 796 int i; 797 798 for_each_online_cpu(i) { 799 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { 800 cpu_set(i, cpu_core_map[cpu]); 801 cpu_set(cpu, cpu_core_map[i]); 802 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { 803 cpu_set(i, per_cpu(cpu_sibling_map, cpu)); 804 cpu_set(cpu, per_cpu(cpu_sibling_map, i)); 805 } 806 } 807 } 808 } 809 810 int __cpuinit 811 __cpu_up (unsigned int cpu) 812 { 813 int ret; 814 int sapicid; 815 816 sapicid = ia64_cpu_to_sapicid[cpu]; 817 if (sapicid == -1) 818 return -EINVAL; 819 820 /* 821 * Already booted cpu? not valid anymore since we dont 822 * do idle loop tightspin anymore. 823 */ 824 if (cpu_isset(cpu, cpu_callin_map)) 825 return -EINVAL; 826 827 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 828 /* Processor goes to start_secondary(), sets online flag */ 829 ret = do_boot_cpu(sapicid, cpu); 830 if (ret < 0) 831 return ret; 832 833 if (cpu_data(cpu)->threads_per_core == 1 && 834 cpu_data(cpu)->cores_per_socket == 1) { 835 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu)); 836 cpu_set(cpu, cpu_core_map[cpu]); 837 return 0; 838 } 839 840 set_cpu_sibling_map(cpu); 841 842 return 0; 843 } 844 845 /* 846 * Assume that CPUs have been discovered by some platform-dependent interface. For 847 * SoftSDV/Lion, that would be ACPI. 848 * 849 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). 850 */ 851 void __init 852 init_smp_config(void) 853 { 854 struct fptr { 855 unsigned long fp; 856 unsigned long gp; 857 } *ap_startup; 858 long sal_ret; 859 860 /* Tell SAL where to drop the APs. */ 861 ap_startup = (struct fptr *) start_ap; 862 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, 863 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); 864 if (sal_ret < 0) 865 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", 866 ia64_sal_strerror(sal_ret)); 867 } 868 869 /* 870 * identify_siblings(cpu) gets called from identify_cpu. This populates the 871 * information related to logical execution units in per_cpu_data structure. 872 */ 873 void __devinit 874 identify_siblings(struct cpuinfo_ia64 *c) 875 { 876 s64 status; 877 u16 pltid; 878 pal_logical_to_physical_t info; 879 880 status = ia64_pal_logical_to_phys(-1, &info); 881 if (status != PAL_STATUS_SUCCESS) { 882 if (status != PAL_STATUS_UNIMPLEMENTED) { 883 printk(KERN_ERR 884 "ia64_pal_logical_to_phys failed with %ld\n", 885 status); 886 return; 887 } 888 889 info.overview_ppid = 0; 890 info.overview_cpp = 1; 891 info.overview_tpc = 1; 892 } 893 894 status = ia64_sal_physical_id_info(&pltid); 895 if (status != PAL_STATUS_SUCCESS) { 896 if (status != PAL_STATUS_UNIMPLEMENTED) 897 printk(KERN_ERR 898 "ia64_sal_pltid failed with %ld\n", 899 status); 900 return; 901 } 902 903 c->socket_id = (pltid << 8) | info.overview_ppid; 904 905 if (info.overview_cpp == 1 && info.overview_tpc == 1) 906 return; 907 908 c->cores_per_socket = info.overview_cpp; 909 c->threads_per_core = info.overview_tpc; 910 c->num_log = info.overview_num_log; 911 912 c->core_id = info.log1_cid; 913 c->thread_id = info.log1_tid; 914 } 915 916 /* 917 * returns non zero, if multi-threading is enabled 918 * on at least one physical package. Due to hotplug cpu 919 * and (maxcpus=), all threads may not necessarily be enabled 920 * even though the processor supports multi-threading. 921 */ 922 int is_multithreading_enabled(void) 923 { 924 int i, j; 925 926 for_each_present_cpu(i) { 927 for_each_present_cpu(j) { 928 if (j == i) 929 continue; 930 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) { 931 if (cpu_data(j)->core_id == cpu_data(i)->core_id) 932 return 1; 933 } 934 } 935 } 936 return 0; 937 } 938 EXPORT_SYMBOL_GPL(is_multithreading_enabled); 939