1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * SMP boot-related support 4 * 5 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 6 * David Mosberger-Tang <davidm@hpl.hp.com> 7 * Copyright (C) 2001, 2004-2005 Intel Corp 8 * Rohit Seth <rohit.seth@intel.com> 9 * Suresh Siddha <suresh.b.siddha@intel.com> 10 * Gordon Jin <gordon.jin@intel.com> 11 * Ashok Raj <ashok.raj@intel.com> 12 * 13 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. 14 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. 15 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. 16 * smp_boot_cpus()/smp_commence() is replaced by 17 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). 18 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support 19 * 04/12/26 Jin Gordon <gordon.jin@intel.com> 20 * 04/12/26 Rohit Seth <rohit.seth@intel.com> 21 * Add multi-threading and multi-core detection 22 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com> 23 * Setup cpu_sibling_map and cpu_core_map 24 */ 25 26 #include <linux/module.h> 27 #include <linux/acpi.h> 28 #include <linux/memblock.h> 29 #include <linux/cpu.h> 30 #include <linux/delay.h> 31 #include <linux/init.h> 32 #include <linux/interrupt.h> 33 #include <linux/irq.h> 34 #include <linux/kernel.h> 35 #include <linux/kernel_stat.h> 36 #include <linux/mm.h> 37 #include <linux/notifier.h> 38 #include <linux/smp.h> 39 #include <linux/spinlock.h> 40 #include <linux/efi.h> 41 #include <linux/percpu.h> 42 #include <linux/bitops.h> 43 44 #include <linux/atomic.h> 45 #include <asm/cache.h> 46 #include <asm/current.h> 47 #include <asm/delay.h> 48 #include <asm/io.h> 49 #include <asm/irq.h> 50 #include <asm/mca.h> 51 #include <asm/page.h> 52 #include <asm/pgalloc.h> 53 #include <asm/processor.h> 54 #include <asm/ptrace.h> 55 #include <asm/sal.h> 56 #include <asm/tlbflush.h> 57 #include <asm/unistd.h> 58 59 #define SMP_DEBUG 0 60 61 #if SMP_DEBUG 62 #define Dprintk(x...) printk(x) 63 #else 64 #define Dprintk(x...) 65 #endif 66 67 #ifdef CONFIG_HOTPLUG_CPU 68 #ifdef CONFIG_PERMIT_BSP_REMOVE 69 #define bsp_remove_ok 1 70 #else 71 #define bsp_remove_ok 0 72 #endif 73 74 /* 75 * Global array allocated for NR_CPUS at boot time 76 */ 77 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; 78 79 /* 80 * start_ap in head.S uses this to store current booting cpu 81 * info. 82 */ 83 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; 84 85 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); 86 87 #else 88 #define set_brendez_area(x) 89 #endif 90 91 92 /* 93 * ITC synchronization related stuff: 94 */ 95 #define MASTER (0) 96 #define SLAVE (SMP_CACHE_BYTES/8) 97 98 #define NUM_ROUNDS 64 /* magic value */ 99 #define NUM_ITERS 5 /* likewise */ 100 101 static DEFINE_SPINLOCK(itc_sync_lock); 102 static volatile unsigned long go[SLAVE + 1]; 103 104 #define DEBUG_ITC_SYNC 0 105 106 extern void start_ap (void); 107 extern unsigned long ia64_iobase; 108 109 struct task_struct *task_for_booting_cpu; 110 111 /* 112 * State for each CPU 113 */ 114 DEFINE_PER_CPU(int, cpu_state); 115 116 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 117 EXPORT_SYMBOL(cpu_core_map); 118 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); 119 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 120 121 int smp_num_siblings = 1; 122 123 /* which logical CPU number maps to which CPU (physical APIC ID) */ 124 volatile int ia64_cpu_to_sapicid[NR_CPUS]; 125 EXPORT_SYMBOL(ia64_cpu_to_sapicid); 126 127 static cpumask_t cpu_callin_map; 128 129 struct smp_boot_data smp_boot_data __initdata; 130 131 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ 132 133 char __initdata no_int_routing; 134 135 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ 136 137 #ifdef CONFIG_FORCE_CPEI_RETARGET 138 #define CPEI_OVERRIDE_DEFAULT (1) 139 #else 140 #define CPEI_OVERRIDE_DEFAULT (0) 141 #endif 142 143 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT; 144 145 static int __init 146 cmdl_force_cpei(char *str) 147 { 148 int value=0; 149 150 get_option (&str, &value); 151 force_cpei_retarget = value; 152 153 return 1; 154 } 155 156 __setup("force_cpei=", cmdl_force_cpei); 157 158 static int __init 159 nointroute (char *str) 160 { 161 no_int_routing = 1; 162 printk ("no_int_routing on\n"); 163 return 1; 164 } 165 166 __setup("nointroute", nointroute); 167 168 static void fix_b0_for_bsp(void) 169 { 170 #ifdef CONFIG_HOTPLUG_CPU 171 int cpuid; 172 static int fix_bsp_b0 = 1; 173 174 cpuid = smp_processor_id(); 175 176 /* 177 * Cache the b0 value on the first AP that comes up 178 */ 179 if (!(fix_bsp_b0 && cpuid)) 180 return; 181 182 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0]; 183 printk ("Fixed BSP b0 value from CPU %d\n", cpuid); 184 185 fix_bsp_b0 = 0; 186 #endif 187 } 188 189 void 190 sync_master (void *arg) 191 { 192 unsigned long flags, i; 193 194 go[MASTER] = 0; 195 196 local_irq_save(flags); 197 { 198 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { 199 while (!go[MASTER]) 200 cpu_relax(); 201 go[MASTER] = 0; 202 go[SLAVE] = ia64_get_itc(); 203 } 204 } 205 local_irq_restore(flags); 206 } 207 208 /* 209 * Return the number of cycles by which our itc differs from the itc on the master 210 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, 211 * negative that it is behind. 212 */ 213 static inline long 214 get_delta (long *rt, long *master) 215 { 216 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; 217 unsigned long tcenter, t0, t1, tm; 218 long i; 219 220 for (i = 0; i < NUM_ITERS; ++i) { 221 t0 = ia64_get_itc(); 222 go[MASTER] = 1; 223 while (!(tm = go[SLAVE])) 224 cpu_relax(); 225 go[SLAVE] = 0; 226 t1 = ia64_get_itc(); 227 228 if (t1 - t0 < best_t1 - best_t0) 229 best_t0 = t0, best_t1 = t1, best_tm = tm; 230 } 231 232 *rt = best_t1 - best_t0; 233 *master = best_tm - best_t0; 234 235 /* average best_t0 and best_t1 without overflow: */ 236 tcenter = (best_t0/2 + best_t1/2); 237 if (best_t0 % 2 + best_t1 % 2 == 2) 238 ++tcenter; 239 return tcenter - best_tm; 240 } 241 242 /* 243 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU 244 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of 245 * unaccounted-for errors (such as getting a machine check in the middle of a calibration 246 * step). The basic idea is for the slave to ask the master what itc value it has and to 247 * read its own itc before and after the master responds. Each iteration gives us three 248 * timestamps: 249 * 250 * slave master 251 * 252 * t0 ---\ 253 * ---\ 254 * ---> 255 * tm 256 * /--- 257 * /--- 258 * t1 <--- 259 * 260 * 261 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 262 * and t1. If we achieve this, the clocks are synchronized provided the interconnect 263 * between the slave and the master is symmetric. Even if the interconnect were 264 * asymmetric, we would still know that the synchronization error is smaller than the 265 * roundtrip latency (t0 - t1). 266 * 267 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to 268 * within one or two cycles. However, we can only *guarantee* that the synchronization is 269 * accurate to within a round-trip time, which is typically in the range of several 270 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually 271 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better 272 * than half a micro second or so. 273 */ 274 void 275 ia64_sync_itc (unsigned int master) 276 { 277 long i, delta, adj, adjust_latency = 0, done = 0; 278 unsigned long flags, rt, master_time_stamp, bound; 279 #if DEBUG_ITC_SYNC 280 struct { 281 long rt; /* roundtrip time */ 282 long master; /* master's timestamp */ 283 long diff; /* difference between midpoint and master's timestamp */ 284 long lat; /* estimate of itc adjustment latency */ 285 } t[NUM_ROUNDS]; 286 #endif 287 288 /* 289 * Make sure local timer ticks are disabled while we sync. If 290 * they were enabled, we'd have to worry about nasty issues 291 * like setting the ITC ahead of (or a long time before) the 292 * next scheduled tick. 293 */ 294 BUG_ON((ia64_get_itv() & (1 << 16)) == 0); 295 296 go[MASTER] = 1; 297 298 if (smp_call_function_single(master, sync_master, NULL, 0) < 0) { 299 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); 300 return; 301 } 302 303 while (go[MASTER]) 304 cpu_relax(); /* wait for master to be ready */ 305 306 spin_lock_irqsave(&itc_sync_lock, flags); 307 { 308 for (i = 0; i < NUM_ROUNDS; ++i) { 309 delta = get_delta(&rt, &master_time_stamp); 310 if (delta == 0) { 311 done = 1; /* let's lock on to this... */ 312 bound = rt; 313 } 314 315 if (!done) { 316 if (i > 0) { 317 adjust_latency += -delta; 318 adj = -delta + adjust_latency/4; 319 } else 320 adj = -delta; 321 322 ia64_set_itc(ia64_get_itc() + adj); 323 } 324 #if DEBUG_ITC_SYNC 325 t[i].rt = rt; 326 t[i].master = master_time_stamp; 327 t[i].diff = delta; 328 t[i].lat = adjust_latency/4; 329 #endif 330 } 331 } 332 spin_unlock_irqrestore(&itc_sync_lock, flags); 333 334 #if DEBUG_ITC_SYNC 335 for (i = 0; i < NUM_ROUNDS; ++i) 336 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", 337 t[i].rt, t[i].master, t[i].diff, t[i].lat); 338 #endif 339 340 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " 341 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); 342 } 343 344 /* 345 * Ideally sets up per-cpu profiling hooks. Doesn't do much now... 346 */ 347 static inline void smp_setup_percpu_timer(void) 348 { 349 } 350 351 static void 352 smp_callin (void) 353 { 354 int cpuid, phys_id, itc_master; 355 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo; 356 extern void ia64_init_itm(void); 357 extern volatile int time_keeper_id; 358 359 #ifdef CONFIG_PERFMON 360 extern void pfm_init_percpu(void); 361 #endif 362 363 cpuid = smp_processor_id(); 364 phys_id = hard_smp_processor_id(); 365 itc_master = time_keeper_id; 366 367 if (cpu_online(cpuid)) { 368 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", 369 phys_id, cpuid); 370 BUG(); 371 } 372 373 fix_b0_for_bsp(); 374 375 /* 376 * numa_node_id() works after this. 377 */ 378 set_numa_node(cpu_to_node_map[cpuid]); 379 set_numa_mem(local_memory_node(cpu_to_node_map[cpuid])); 380 381 spin_lock(&vector_lock); 382 /* Setup the per cpu irq handling data structures */ 383 __setup_vector_irq(cpuid); 384 notify_cpu_starting(cpuid); 385 set_cpu_online(cpuid, true); 386 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 387 spin_unlock(&vector_lock); 388 389 smp_setup_percpu_timer(); 390 391 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ 392 393 #ifdef CONFIG_PERFMON 394 pfm_init_percpu(); 395 #endif 396 397 local_irq_enable(); 398 399 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { 400 /* 401 * Synchronize the ITC with the BP. Need to do this after irqs are 402 * enabled because ia64_sync_itc() calls smp_call_function_single(), which 403 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls 404 * local_bh_enable(), which bugs out if irqs are not enabled... 405 */ 406 Dprintk("Going to syncup ITC with ITC Master.\n"); 407 ia64_sync_itc(itc_master); 408 } 409 410 /* 411 * Get our bogomips. 412 */ 413 ia64_init_itm(); 414 415 /* 416 * Delay calibration can be skipped if new processor is identical to the 417 * previous processor. 418 */ 419 last_cpuinfo = cpu_data(cpuid - 1); 420 this_cpuinfo = local_cpu_data; 421 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq || 422 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq || 423 last_cpuinfo->features != this_cpuinfo->features || 424 last_cpuinfo->revision != this_cpuinfo->revision || 425 last_cpuinfo->family != this_cpuinfo->family || 426 last_cpuinfo->archrev != this_cpuinfo->archrev || 427 last_cpuinfo->model != this_cpuinfo->model) 428 calibrate_delay(); 429 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 430 431 /* 432 * Allow the master to continue. 433 */ 434 cpumask_set_cpu(cpuid, &cpu_callin_map); 435 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); 436 } 437 438 439 /* 440 * Activate a secondary processor. head.S calls this. 441 */ 442 int 443 start_secondary (void *unused) 444 { 445 /* Early console may use I/O ports */ 446 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); 447 #ifndef CONFIG_PRINTK_TIME 448 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); 449 #endif 450 efi_map_pal_code(); 451 cpu_init(); 452 preempt_disable(); 453 smp_callin(); 454 455 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); 456 return 0; 457 } 458 459 static int 460 do_boot_cpu (int sapicid, int cpu, struct task_struct *idle) 461 { 462 int timeout; 463 464 task_for_booting_cpu = idle; 465 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); 466 467 set_brendez_area(cpu); 468 ia64_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); 469 470 /* 471 * Wait 10s total for the AP to start 472 */ 473 Dprintk("Waiting on callin_map ..."); 474 for (timeout = 0; timeout < 100000; timeout++) { 475 if (cpumask_test_cpu(cpu, &cpu_callin_map)) 476 break; /* It has booted */ 477 barrier(); /* Make sure we re-read cpu_callin_map */ 478 udelay(100); 479 } 480 Dprintk("\n"); 481 482 if (!cpumask_test_cpu(cpu, &cpu_callin_map)) { 483 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); 484 ia64_cpu_to_sapicid[cpu] = -1; 485 set_cpu_online(cpu, false); /* was set in smp_callin() */ 486 return -EINVAL; 487 } 488 return 0; 489 } 490 491 static int __init 492 decay (char *str) 493 { 494 int ticks; 495 get_option (&str, &ticks); 496 return 1; 497 } 498 499 __setup("decay=", decay); 500 501 /* 502 * Initialize the logical CPU number to SAPICID mapping 503 */ 504 void __init 505 smp_build_cpu_map (void) 506 { 507 int sapicid, cpu, i; 508 int boot_cpu_id = hard_smp_processor_id(); 509 510 for (cpu = 0; cpu < NR_CPUS; cpu++) { 511 ia64_cpu_to_sapicid[cpu] = -1; 512 } 513 514 ia64_cpu_to_sapicid[0] = boot_cpu_id; 515 init_cpu_present(cpumask_of(0)); 516 set_cpu_possible(0, true); 517 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { 518 sapicid = smp_boot_data.cpu_phys_id[i]; 519 if (sapicid == boot_cpu_id) 520 continue; 521 set_cpu_present(cpu, true); 522 set_cpu_possible(cpu, true); 523 ia64_cpu_to_sapicid[cpu] = sapicid; 524 cpu++; 525 } 526 } 527 528 /* 529 * Cycle through the APs sending Wakeup IPIs to boot each. 530 */ 531 void __init 532 smp_prepare_cpus (unsigned int max_cpus) 533 { 534 int boot_cpu_id = hard_smp_processor_id(); 535 536 /* 537 * Initialize the per-CPU profiling counter/multiplier 538 */ 539 540 smp_setup_percpu_timer(); 541 542 cpumask_set_cpu(0, &cpu_callin_map); 543 544 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 545 ia64_cpu_to_sapicid[0] = boot_cpu_id; 546 547 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); 548 549 current_thread_info()->cpu = 0; 550 551 /* 552 * If SMP should be disabled, then really disable it! 553 */ 554 if (!max_cpus) { 555 printk(KERN_INFO "SMP mode deactivated.\n"); 556 init_cpu_online(cpumask_of(0)); 557 init_cpu_present(cpumask_of(0)); 558 init_cpu_possible(cpumask_of(0)); 559 return; 560 } 561 } 562 563 void smp_prepare_boot_cpu(void) 564 { 565 set_cpu_online(smp_processor_id(), true); 566 cpumask_set_cpu(smp_processor_id(), &cpu_callin_map); 567 set_numa_node(cpu_to_node_map[smp_processor_id()]); 568 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 569 } 570 571 #ifdef CONFIG_HOTPLUG_CPU 572 static inline void 573 clear_cpu_sibling_map(int cpu) 574 { 575 int i; 576 577 for_each_cpu(i, &per_cpu(cpu_sibling_map, cpu)) 578 cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, i)); 579 for_each_cpu(i, &cpu_core_map[cpu]) 580 cpumask_clear_cpu(cpu, &cpu_core_map[i]); 581 582 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE; 583 } 584 585 static void 586 remove_siblinginfo(int cpu) 587 { 588 int last = 0; 589 590 if (cpu_data(cpu)->threads_per_core == 1 && 591 cpu_data(cpu)->cores_per_socket == 1) { 592 cpumask_clear_cpu(cpu, &cpu_core_map[cpu]); 593 cpumask_clear_cpu(cpu, &per_cpu(cpu_sibling_map, cpu)); 594 return; 595 } 596 597 last = (cpumask_weight(&cpu_core_map[cpu]) == 1 ? 1 : 0); 598 599 /* remove it from all sibling map's */ 600 clear_cpu_sibling_map(cpu); 601 } 602 603 extern void fixup_irqs(void); 604 605 int migrate_platform_irqs(unsigned int cpu) 606 { 607 int new_cpei_cpu; 608 struct irq_data *data = NULL; 609 const struct cpumask *mask; 610 int retval = 0; 611 612 /* 613 * dont permit CPEI target to removed. 614 */ 615 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) { 616 printk ("CPU (%d) is CPEI Target\n", cpu); 617 if (can_cpei_retarget()) { 618 /* 619 * Now re-target the CPEI to a different processor 620 */ 621 new_cpei_cpu = cpumask_any(cpu_online_mask); 622 mask = cpumask_of(new_cpei_cpu); 623 set_cpei_target_cpu(new_cpei_cpu); 624 data = irq_get_irq_data(ia64_cpe_irq); 625 /* 626 * Switch for now, immediately, we need to do fake intr 627 * as other interrupts, but need to study CPEI behaviour with 628 * polling before making changes. 629 */ 630 if (data && data->chip) { 631 data->chip->irq_disable(data); 632 data->chip->irq_set_affinity(data, mask, false); 633 data->chip->irq_enable(data); 634 printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu); 635 } 636 } 637 if (!data) { 638 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 639 retval = -EBUSY; 640 } 641 } 642 return retval; 643 } 644 645 /* must be called with cpucontrol mutex held */ 646 int __cpu_disable(void) 647 { 648 int cpu = smp_processor_id(); 649 650 /* 651 * dont permit boot processor for now 652 */ 653 if (cpu == 0 && !bsp_remove_ok) { 654 printk ("Your platform does not support removal of BSP\n"); 655 return (-EBUSY); 656 } 657 658 set_cpu_online(cpu, false); 659 660 if (migrate_platform_irqs(cpu)) { 661 set_cpu_online(cpu, true); 662 return -EBUSY; 663 } 664 665 remove_siblinginfo(cpu); 666 fixup_irqs(); 667 local_flush_tlb_all(); 668 cpumask_clear_cpu(cpu, &cpu_callin_map); 669 return 0; 670 } 671 672 void __cpu_die(unsigned int cpu) 673 { 674 unsigned int i; 675 676 for (i = 0; i < 100; i++) { 677 /* They ack this in play_dead by setting CPU_DEAD */ 678 if (per_cpu(cpu_state, cpu) == CPU_DEAD) 679 { 680 printk ("CPU %d is now offline\n", cpu); 681 return; 682 } 683 msleep(100); 684 } 685 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 686 } 687 #endif /* CONFIG_HOTPLUG_CPU */ 688 689 void 690 smp_cpus_done (unsigned int dummy) 691 { 692 int cpu; 693 unsigned long bogosum = 0; 694 695 /* 696 * Allow the user to impress friends. 697 */ 698 699 for_each_online_cpu(cpu) { 700 bogosum += cpu_data(cpu)->loops_per_jiffy; 701 } 702 703 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 704 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); 705 } 706 707 static inline void set_cpu_sibling_map(int cpu) 708 { 709 int i; 710 711 for_each_online_cpu(i) { 712 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { 713 cpumask_set_cpu(i, &cpu_core_map[cpu]); 714 cpumask_set_cpu(cpu, &cpu_core_map[i]); 715 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { 716 cpumask_set_cpu(i, 717 &per_cpu(cpu_sibling_map, cpu)); 718 cpumask_set_cpu(cpu, 719 &per_cpu(cpu_sibling_map, i)); 720 } 721 } 722 } 723 } 724 725 int 726 __cpu_up(unsigned int cpu, struct task_struct *tidle) 727 { 728 int ret; 729 int sapicid; 730 731 sapicid = ia64_cpu_to_sapicid[cpu]; 732 if (sapicid == -1) 733 return -EINVAL; 734 735 /* 736 * Already booted cpu? not valid anymore since we dont 737 * do idle loop tightspin anymore. 738 */ 739 if (cpumask_test_cpu(cpu, &cpu_callin_map)) 740 return -EINVAL; 741 742 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 743 /* Processor goes to start_secondary(), sets online flag */ 744 ret = do_boot_cpu(sapicid, cpu, tidle); 745 if (ret < 0) 746 return ret; 747 748 if (cpu_data(cpu)->threads_per_core == 1 && 749 cpu_data(cpu)->cores_per_socket == 1) { 750 cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, cpu)); 751 cpumask_set_cpu(cpu, &cpu_core_map[cpu]); 752 return 0; 753 } 754 755 set_cpu_sibling_map(cpu); 756 757 return 0; 758 } 759 760 /* 761 * Assume that CPUs have been discovered by some platform-dependent interface. For 762 * SoftSDV/Lion, that would be ACPI. 763 * 764 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). 765 */ 766 void __init 767 init_smp_config(void) 768 { 769 struct fptr { 770 unsigned long fp; 771 unsigned long gp; 772 } *ap_startup; 773 long sal_ret; 774 775 /* Tell SAL where to drop the APs. */ 776 ap_startup = (struct fptr *) start_ap; 777 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, 778 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); 779 if (sal_ret < 0) 780 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", 781 ia64_sal_strerror(sal_ret)); 782 } 783 784 /* 785 * identify_siblings(cpu) gets called from identify_cpu. This populates the 786 * information related to logical execution units in per_cpu_data structure. 787 */ 788 void identify_siblings(struct cpuinfo_ia64 *c) 789 { 790 long status; 791 u16 pltid; 792 pal_logical_to_physical_t info; 793 794 status = ia64_pal_logical_to_phys(-1, &info); 795 if (status != PAL_STATUS_SUCCESS) { 796 if (status != PAL_STATUS_UNIMPLEMENTED) { 797 printk(KERN_ERR 798 "ia64_pal_logical_to_phys failed with %ld\n", 799 status); 800 return; 801 } 802 803 info.overview_ppid = 0; 804 info.overview_cpp = 1; 805 info.overview_tpc = 1; 806 } 807 808 status = ia64_sal_physical_id_info(&pltid); 809 if (status != PAL_STATUS_SUCCESS) { 810 if (status != PAL_STATUS_UNIMPLEMENTED) 811 printk(KERN_ERR 812 "ia64_sal_pltid failed with %ld\n", 813 status); 814 return; 815 } 816 817 c->socket_id = (pltid << 8) | info.overview_ppid; 818 819 if (info.overview_cpp == 1 && info.overview_tpc == 1) 820 return; 821 822 c->cores_per_socket = info.overview_cpp; 823 c->threads_per_core = info.overview_tpc; 824 c->num_log = info.overview_num_log; 825 826 c->core_id = info.log1_cid; 827 c->thread_id = info.log1_tid; 828 } 829 830 /* 831 * returns non zero, if multi-threading is enabled 832 * on at least one physical package. Due to hotplug cpu 833 * and (maxcpus=), all threads may not necessarily be enabled 834 * even though the processor supports multi-threading. 835 */ 836 int is_multithreading_enabled(void) 837 { 838 int i, j; 839 840 for_each_present_cpu(i) { 841 for_each_present_cpu(j) { 842 if (j == i) 843 continue; 844 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) { 845 if (cpu_data(j)->core_id == cpu_data(i)->core_id) 846 return 1; 847 } 848 } 849 } 850 return 0; 851 } 852 EXPORT_SYMBOL_GPL(is_multithreading_enabled); 853