1 /* 2 * SMP boot-related support 3 * 4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 5 * David Mosberger-Tang <davidm@hpl.hp.com> 6 * Copyright (C) 2001, 2004-2005 Intel Corp 7 * Rohit Seth <rohit.seth@intel.com> 8 * Suresh Siddha <suresh.b.siddha@intel.com> 9 * Gordon Jin <gordon.jin@intel.com> 10 * Ashok Raj <ashok.raj@intel.com> 11 * 12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here. 13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code. 14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence. 15 * smp_boot_cpus()/smp_commence() is replaced by 16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done(). 17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support 18 * 04/12/26 Jin Gordon <gordon.jin@intel.com> 19 * 04/12/26 Rohit Seth <rohit.seth@intel.com> 20 * Add multi-threading and multi-core detection 21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com> 22 * Setup cpu_sibling_map and cpu_core_map 23 */ 24 25 #include <linux/module.h> 26 #include <linux/acpi.h> 27 #include <linux/bootmem.h> 28 #include <linux/cpu.h> 29 #include <linux/delay.h> 30 #include <linux/init.h> 31 #include <linux/interrupt.h> 32 #include <linux/irq.h> 33 #include <linux/kernel.h> 34 #include <linux/kernel_stat.h> 35 #include <linux/mm.h> 36 #include <linux/notifier.h> 37 #include <linux/smp.h> 38 #include <linux/spinlock.h> 39 #include <linux/efi.h> 40 #include <linux/percpu.h> 41 #include <linux/bitops.h> 42 43 #include <asm/atomic.h> 44 #include <asm/cache.h> 45 #include <asm/current.h> 46 #include <asm/delay.h> 47 #include <asm/ia32.h> 48 #include <asm/io.h> 49 #include <asm/irq.h> 50 #include <asm/machvec.h> 51 #include <asm/mca.h> 52 #include <asm/page.h> 53 #include <asm/pgalloc.h> 54 #include <asm/pgtable.h> 55 #include <asm/processor.h> 56 #include <asm/ptrace.h> 57 #include <asm/sal.h> 58 #include <asm/system.h> 59 #include <asm/tlbflush.h> 60 #include <asm/unistd.h> 61 #include <asm/sn/arch.h> 62 63 #define SMP_DEBUG 0 64 65 #if SMP_DEBUG 66 #define Dprintk(x...) printk(x) 67 #else 68 #define Dprintk(x...) 69 #endif 70 71 #ifdef CONFIG_HOTPLUG_CPU 72 #ifdef CONFIG_PERMIT_BSP_REMOVE 73 #define bsp_remove_ok 1 74 #else 75 #define bsp_remove_ok 0 76 #endif 77 78 /* 79 * Store all idle threads, this can be reused instead of creating 80 * a new thread. Also avoids complicated thread destroy functionality 81 * for idle threads. 82 */ 83 struct task_struct *idle_thread_array[NR_CPUS]; 84 85 /* 86 * Global array allocated for NR_CPUS at boot time 87 */ 88 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; 89 90 /* 91 * start_ap in head.S uses this to store current booting cpu 92 * info. 93 */ 94 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0]; 95 96 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]); 97 98 #define get_idle_for_cpu(x) (idle_thread_array[(x)]) 99 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p)) 100 101 #else 102 103 #define get_idle_for_cpu(x) (NULL) 104 #define set_idle_for_cpu(x,p) 105 #define set_brendez_area(x) 106 #endif 107 108 109 /* 110 * ITC synchronization related stuff: 111 */ 112 #define MASTER (0) 113 #define SLAVE (SMP_CACHE_BYTES/8) 114 115 #define NUM_ROUNDS 64 /* magic value */ 116 #define NUM_ITERS 5 /* likewise */ 117 118 static DEFINE_SPINLOCK(itc_sync_lock); 119 static volatile unsigned long go[SLAVE + 1]; 120 121 #define DEBUG_ITC_SYNC 0 122 123 extern void start_ap (void); 124 extern unsigned long ia64_iobase; 125 126 struct task_struct *task_for_booting_cpu; 127 128 /* 129 * State for each CPU 130 */ 131 DEFINE_PER_CPU(int, cpu_state); 132 133 /* Bitmasks of currently online, and possible CPUs */ 134 cpumask_t cpu_online_map; 135 EXPORT_SYMBOL(cpu_online_map); 136 cpumask_t cpu_possible_map = CPU_MASK_NONE; 137 EXPORT_SYMBOL(cpu_possible_map); 138 139 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned; 140 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map); 141 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); 142 143 int smp_num_siblings = 1; 144 145 /* which logical CPU number maps to which CPU (physical APIC ID) */ 146 volatile int ia64_cpu_to_sapicid[NR_CPUS]; 147 EXPORT_SYMBOL(ia64_cpu_to_sapicid); 148 149 static volatile cpumask_t cpu_callin_map; 150 151 struct smp_boot_data smp_boot_data __initdata; 152 153 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */ 154 155 char __initdata no_int_routing; 156 157 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */ 158 159 #ifdef CONFIG_FORCE_CPEI_RETARGET 160 #define CPEI_OVERRIDE_DEFAULT (1) 161 #else 162 #define CPEI_OVERRIDE_DEFAULT (0) 163 #endif 164 165 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT; 166 167 static int __init 168 cmdl_force_cpei(char *str) 169 { 170 int value=0; 171 172 get_option (&str, &value); 173 force_cpei_retarget = value; 174 175 return 1; 176 } 177 178 __setup("force_cpei=", cmdl_force_cpei); 179 180 static int __init 181 nointroute (char *str) 182 { 183 no_int_routing = 1; 184 printk ("no_int_routing on\n"); 185 return 1; 186 } 187 188 __setup("nointroute", nointroute); 189 190 static void fix_b0_for_bsp(void) 191 { 192 #ifdef CONFIG_HOTPLUG_CPU 193 int cpuid; 194 static int fix_bsp_b0 = 1; 195 196 cpuid = smp_processor_id(); 197 198 /* 199 * Cache the b0 value on the first AP that comes up 200 */ 201 if (!(fix_bsp_b0 && cpuid)) 202 return; 203 204 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0]; 205 printk ("Fixed BSP b0 value from CPU %d\n", cpuid); 206 207 fix_bsp_b0 = 0; 208 #endif 209 } 210 211 void 212 sync_master (void *arg) 213 { 214 unsigned long flags, i; 215 216 go[MASTER] = 0; 217 218 local_irq_save(flags); 219 { 220 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) { 221 while (!go[MASTER]) 222 cpu_relax(); 223 go[MASTER] = 0; 224 go[SLAVE] = ia64_get_itc(); 225 } 226 } 227 local_irq_restore(flags); 228 } 229 230 /* 231 * Return the number of cycles by which our itc differs from the itc on the master 232 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master, 233 * negative that it is behind. 234 */ 235 static inline long 236 get_delta (long *rt, long *master) 237 { 238 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0; 239 unsigned long tcenter, t0, t1, tm; 240 long i; 241 242 for (i = 0; i < NUM_ITERS; ++i) { 243 t0 = ia64_get_itc(); 244 go[MASTER] = 1; 245 while (!(tm = go[SLAVE])) 246 cpu_relax(); 247 go[SLAVE] = 0; 248 t1 = ia64_get_itc(); 249 250 if (t1 - t0 < best_t1 - best_t0) 251 best_t0 = t0, best_t1 = t1, best_tm = tm; 252 } 253 254 *rt = best_t1 - best_t0; 255 *master = best_tm - best_t0; 256 257 /* average best_t0 and best_t1 without overflow: */ 258 tcenter = (best_t0/2 + best_t1/2); 259 if (best_t0 % 2 + best_t1 % 2 == 2) 260 ++tcenter; 261 return tcenter - best_tm; 262 } 263 264 /* 265 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU 266 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of 267 * unaccounted-for errors (such as getting a machine check in the middle of a calibration 268 * step). The basic idea is for the slave to ask the master what itc value it has and to 269 * read its own itc before and after the master responds. Each iteration gives us three 270 * timestamps: 271 * 272 * slave master 273 * 274 * t0 ---\ 275 * ---\ 276 * ---> 277 * tm 278 * /--- 279 * /--- 280 * t1 <--- 281 * 282 * 283 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0 284 * and t1. If we achieve this, the clocks are synchronized provided the interconnect 285 * between the slave and the master is symmetric. Even if the interconnect were 286 * asymmetric, we would still know that the synchronization error is smaller than the 287 * roundtrip latency (t0 - t1). 288 * 289 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to 290 * within one or two cycles. However, we can only *guarantee* that the synchronization is 291 * accurate to within a round-trip time, which is typically in the range of several 292 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually 293 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better 294 * than half a micro second or so. 295 */ 296 void 297 ia64_sync_itc (unsigned int master) 298 { 299 long i, delta, adj, adjust_latency = 0, done = 0; 300 unsigned long flags, rt, master_time_stamp, bound; 301 #if DEBUG_ITC_SYNC 302 struct { 303 long rt; /* roundtrip time */ 304 long master; /* master's timestamp */ 305 long diff; /* difference between midpoint and master's timestamp */ 306 long lat; /* estimate of itc adjustment latency */ 307 } t[NUM_ROUNDS]; 308 #endif 309 310 /* 311 * Make sure local timer ticks are disabled while we sync. If 312 * they were enabled, we'd have to worry about nasty issues 313 * like setting the ITC ahead of (or a long time before) the 314 * next scheduled tick. 315 */ 316 BUG_ON((ia64_get_itv() & (1 << 16)) == 0); 317 318 go[MASTER] = 1; 319 320 if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) { 321 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master); 322 return; 323 } 324 325 while (go[MASTER]) 326 cpu_relax(); /* wait for master to be ready */ 327 328 spin_lock_irqsave(&itc_sync_lock, flags); 329 { 330 for (i = 0; i < NUM_ROUNDS; ++i) { 331 delta = get_delta(&rt, &master_time_stamp); 332 if (delta == 0) { 333 done = 1; /* let's lock on to this... */ 334 bound = rt; 335 } 336 337 if (!done) { 338 if (i > 0) { 339 adjust_latency += -delta; 340 adj = -delta + adjust_latency/4; 341 } else 342 adj = -delta; 343 344 ia64_set_itc(ia64_get_itc() + adj); 345 } 346 #if DEBUG_ITC_SYNC 347 t[i].rt = rt; 348 t[i].master = master_time_stamp; 349 t[i].diff = delta; 350 t[i].lat = adjust_latency/4; 351 #endif 352 } 353 } 354 spin_unlock_irqrestore(&itc_sync_lock, flags); 355 356 #if DEBUG_ITC_SYNC 357 for (i = 0; i < NUM_ROUNDS; ++i) 358 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n", 359 t[i].rt, t[i].master, t[i].diff, t[i].lat); 360 #endif 361 362 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, " 363 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt); 364 } 365 366 /* 367 * Ideally sets up per-cpu profiling hooks. Doesn't do much now... 368 */ 369 static inline void __devinit 370 smp_setup_percpu_timer (void) 371 { 372 } 373 374 static void __cpuinit 375 smp_callin (void) 376 { 377 int cpuid, phys_id, itc_master; 378 struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo; 379 extern void ia64_init_itm(void); 380 extern volatile int time_keeper_id; 381 382 #ifdef CONFIG_PERFMON 383 extern void pfm_init_percpu(void); 384 #endif 385 386 cpuid = smp_processor_id(); 387 phys_id = hard_smp_processor_id(); 388 itc_master = time_keeper_id; 389 390 if (cpu_online(cpuid)) { 391 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n", 392 phys_id, cpuid); 393 BUG(); 394 } 395 396 fix_b0_for_bsp(); 397 398 lock_ipi_calllock(); 399 spin_lock(&vector_lock); 400 /* Setup the per cpu irq handling data structures */ 401 __setup_vector_irq(cpuid); 402 cpu_set(cpuid, cpu_online_map); 403 per_cpu(cpu_state, cpuid) = CPU_ONLINE; 404 spin_unlock(&vector_lock); 405 unlock_ipi_calllock(); 406 407 smp_setup_percpu_timer(); 408 409 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */ 410 411 #ifdef CONFIG_PERFMON 412 pfm_init_percpu(); 413 #endif 414 415 local_irq_enable(); 416 417 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) { 418 /* 419 * Synchronize the ITC with the BP. Need to do this after irqs are 420 * enabled because ia64_sync_itc() calls smp_call_function_single(), which 421 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls 422 * local_bh_enable(), which bugs out if irqs are not enabled... 423 */ 424 Dprintk("Going to syncup ITC with ITC Master.\n"); 425 ia64_sync_itc(itc_master); 426 } 427 428 /* 429 * Get our bogomips. 430 */ 431 ia64_init_itm(); 432 433 /* 434 * Delay calibration can be skipped if new processor is identical to the 435 * previous processor. 436 */ 437 last_cpuinfo = cpu_data(cpuid - 1); 438 this_cpuinfo = local_cpu_data; 439 if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq || 440 last_cpuinfo->proc_freq != this_cpuinfo->proc_freq || 441 last_cpuinfo->features != this_cpuinfo->features || 442 last_cpuinfo->revision != this_cpuinfo->revision || 443 last_cpuinfo->family != this_cpuinfo->family || 444 last_cpuinfo->archrev != this_cpuinfo->archrev || 445 last_cpuinfo->model != this_cpuinfo->model) 446 calibrate_delay(); 447 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 448 449 #ifdef CONFIG_IA32_SUPPORT 450 ia32_gdt_init(); 451 #endif 452 453 /* 454 * Allow the master to continue. 455 */ 456 cpu_set(cpuid, cpu_callin_map); 457 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid); 458 } 459 460 461 /* 462 * Activate a secondary processor. head.S calls this. 463 */ 464 int __cpuinit 465 start_secondary (void *unused) 466 { 467 /* Early console may use I/O ports */ 468 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase)); 469 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id()); 470 efi_map_pal_code(); 471 cpu_init(); 472 preempt_disable(); 473 smp_callin(); 474 475 cpu_idle(); 476 return 0; 477 } 478 479 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs) 480 { 481 return NULL; 482 } 483 484 struct create_idle { 485 struct work_struct work; 486 struct task_struct *idle; 487 struct completion done; 488 int cpu; 489 }; 490 491 void __cpuinit 492 do_fork_idle(struct work_struct *work) 493 { 494 struct create_idle *c_idle = 495 container_of(work, struct create_idle, work); 496 497 c_idle->idle = fork_idle(c_idle->cpu); 498 complete(&c_idle->done); 499 } 500 501 static int __cpuinit 502 do_boot_cpu (int sapicid, int cpu) 503 { 504 int timeout; 505 struct create_idle c_idle = { 506 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle), 507 .cpu = cpu, 508 .done = COMPLETION_INITIALIZER(c_idle.done), 509 }; 510 511 c_idle.idle = get_idle_for_cpu(cpu); 512 if (c_idle.idle) { 513 init_idle(c_idle.idle, cpu); 514 goto do_rest; 515 } 516 517 /* 518 * We can't use kernel_thread since we must avoid to reschedule the child. 519 */ 520 if (!keventd_up() || current_is_keventd()) 521 c_idle.work.func(&c_idle.work); 522 else { 523 schedule_work(&c_idle.work); 524 wait_for_completion(&c_idle.done); 525 } 526 527 if (IS_ERR(c_idle.idle)) 528 panic("failed fork for CPU %d", cpu); 529 530 set_idle_for_cpu(cpu, c_idle.idle); 531 532 do_rest: 533 task_for_booting_cpu = c_idle.idle; 534 535 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid); 536 537 set_brendez_area(cpu); 538 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0); 539 540 /* 541 * Wait 10s total for the AP to start 542 */ 543 Dprintk("Waiting on callin_map ..."); 544 for (timeout = 0; timeout < 100000; timeout++) { 545 if (cpu_isset(cpu, cpu_callin_map)) 546 break; /* It has booted */ 547 udelay(100); 548 } 549 Dprintk("\n"); 550 551 if (!cpu_isset(cpu, cpu_callin_map)) { 552 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid); 553 ia64_cpu_to_sapicid[cpu] = -1; 554 cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */ 555 return -EINVAL; 556 } 557 return 0; 558 } 559 560 static int __init 561 decay (char *str) 562 { 563 int ticks; 564 get_option (&str, &ticks); 565 return 1; 566 } 567 568 __setup("decay=", decay); 569 570 /* 571 * Initialize the logical CPU number to SAPICID mapping 572 */ 573 void __init 574 smp_build_cpu_map (void) 575 { 576 int sapicid, cpu, i; 577 int boot_cpu_id = hard_smp_processor_id(); 578 579 for (cpu = 0; cpu < NR_CPUS; cpu++) { 580 ia64_cpu_to_sapicid[cpu] = -1; 581 } 582 583 ia64_cpu_to_sapicid[0] = boot_cpu_id; 584 cpus_clear(cpu_present_map); 585 cpu_set(0, cpu_present_map); 586 cpu_set(0, cpu_possible_map); 587 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) { 588 sapicid = smp_boot_data.cpu_phys_id[i]; 589 if (sapicid == boot_cpu_id) 590 continue; 591 cpu_set(cpu, cpu_present_map); 592 cpu_set(cpu, cpu_possible_map); 593 ia64_cpu_to_sapicid[cpu] = sapicid; 594 cpu++; 595 } 596 } 597 598 /* 599 * Cycle through the APs sending Wakeup IPIs to boot each. 600 */ 601 void __init 602 smp_prepare_cpus (unsigned int max_cpus) 603 { 604 int boot_cpu_id = hard_smp_processor_id(); 605 606 /* 607 * Initialize the per-CPU profiling counter/multiplier 608 */ 609 610 smp_setup_percpu_timer(); 611 612 /* 613 * We have the boot CPU online for sure. 614 */ 615 cpu_set(0, cpu_online_map); 616 cpu_set(0, cpu_callin_map); 617 618 local_cpu_data->loops_per_jiffy = loops_per_jiffy; 619 ia64_cpu_to_sapicid[0] = boot_cpu_id; 620 621 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id); 622 623 current_thread_info()->cpu = 0; 624 625 /* 626 * If SMP should be disabled, then really disable it! 627 */ 628 if (!max_cpus) { 629 printk(KERN_INFO "SMP mode deactivated.\n"); 630 cpus_clear(cpu_online_map); 631 cpus_clear(cpu_present_map); 632 cpus_clear(cpu_possible_map); 633 cpu_set(0, cpu_online_map); 634 cpu_set(0, cpu_present_map); 635 cpu_set(0, cpu_possible_map); 636 return; 637 } 638 } 639 640 void __devinit smp_prepare_boot_cpu(void) 641 { 642 cpu_set(smp_processor_id(), cpu_online_map); 643 cpu_set(smp_processor_id(), cpu_callin_map); 644 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE; 645 } 646 647 #ifdef CONFIG_HOTPLUG_CPU 648 static inline void 649 clear_cpu_sibling_map(int cpu) 650 { 651 int i; 652 653 for_each_cpu_mask(i, per_cpu(cpu_sibling_map, cpu)) 654 cpu_clear(cpu, per_cpu(cpu_sibling_map, i)); 655 for_each_cpu_mask(i, cpu_core_map[cpu]) 656 cpu_clear(cpu, cpu_core_map[i]); 657 658 per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE; 659 } 660 661 static void 662 remove_siblinginfo(int cpu) 663 { 664 int last = 0; 665 666 if (cpu_data(cpu)->threads_per_core == 1 && 667 cpu_data(cpu)->cores_per_socket == 1) { 668 cpu_clear(cpu, cpu_core_map[cpu]); 669 cpu_clear(cpu, per_cpu(cpu_sibling_map, cpu)); 670 return; 671 } 672 673 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0); 674 675 /* remove it from all sibling map's */ 676 clear_cpu_sibling_map(cpu); 677 } 678 679 extern void fixup_irqs(void); 680 681 int migrate_platform_irqs(unsigned int cpu) 682 { 683 int new_cpei_cpu; 684 irq_desc_t *desc = NULL; 685 cpumask_t mask; 686 int retval = 0; 687 688 /* 689 * dont permit CPEI target to removed. 690 */ 691 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) { 692 printk ("CPU (%d) is CPEI Target\n", cpu); 693 if (can_cpei_retarget()) { 694 /* 695 * Now re-target the CPEI to a different processor 696 */ 697 new_cpei_cpu = any_online_cpu(cpu_online_map); 698 mask = cpumask_of_cpu(new_cpei_cpu); 699 set_cpei_target_cpu(new_cpei_cpu); 700 desc = irq_desc + ia64_cpe_irq; 701 /* 702 * Switch for now, immediately, we need to do fake intr 703 * as other interrupts, but need to study CPEI behaviour with 704 * polling before making changes. 705 */ 706 if (desc) { 707 desc->chip->disable(ia64_cpe_irq); 708 desc->chip->set_affinity(ia64_cpe_irq, mask); 709 desc->chip->enable(ia64_cpe_irq); 710 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 711 } 712 } 713 if (!desc) { 714 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu); 715 retval = -EBUSY; 716 } 717 } 718 return retval; 719 } 720 721 /* must be called with cpucontrol mutex held */ 722 int __cpu_disable(void) 723 { 724 int cpu = smp_processor_id(); 725 726 /* 727 * dont permit boot processor for now 728 */ 729 if (cpu == 0 && !bsp_remove_ok) { 730 printk ("Your platform does not support removal of BSP\n"); 731 return (-EBUSY); 732 } 733 734 if (ia64_platform_is("sn2")) { 735 if (!sn_cpu_disable_allowed(cpu)) 736 return -EBUSY; 737 } 738 739 cpu_clear(cpu, cpu_online_map); 740 741 if (migrate_platform_irqs(cpu)) { 742 cpu_set(cpu, cpu_online_map); 743 return (-EBUSY); 744 } 745 746 remove_siblinginfo(cpu); 747 cpu_clear(cpu, cpu_online_map); 748 fixup_irqs(); 749 local_flush_tlb_all(); 750 cpu_clear(cpu, cpu_callin_map); 751 return 0; 752 } 753 754 void __cpu_die(unsigned int cpu) 755 { 756 unsigned int i; 757 758 for (i = 0; i < 100; i++) { 759 /* They ack this in play_dead by setting CPU_DEAD */ 760 if (per_cpu(cpu_state, cpu) == CPU_DEAD) 761 { 762 printk ("CPU %d is now offline\n", cpu); 763 return; 764 } 765 msleep(100); 766 } 767 printk(KERN_ERR "CPU %u didn't die...\n", cpu); 768 } 769 #endif /* CONFIG_HOTPLUG_CPU */ 770 771 void 772 smp_cpus_done (unsigned int dummy) 773 { 774 int cpu; 775 unsigned long bogosum = 0; 776 777 /* 778 * Allow the user to impress friends. 779 */ 780 781 for_each_online_cpu(cpu) { 782 bogosum += cpu_data(cpu)->loops_per_jiffy; 783 } 784 785 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n", 786 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100); 787 } 788 789 static inline void __devinit 790 set_cpu_sibling_map(int cpu) 791 { 792 int i; 793 794 for_each_online_cpu(i) { 795 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) { 796 cpu_set(i, cpu_core_map[cpu]); 797 cpu_set(cpu, cpu_core_map[i]); 798 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) { 799 cpu_set(i, per_cpu(cpu_sibling_map, cpu)); 800 cpu_set(cpu, per_cpu(cpu_sibling_map, i)); 801 } 802 } 803 } 804 } 805 806 int __cpuinit 807 __cpu_up (unsigned int cpu) 808 { 809 int ret; 810 int sapicid; 811 812 sapicid = ia64_cpu_to_sapicid[cpu]; 813 if (sapicid == -1) 814 return -EINVAL; 815 816 /* 817 * Already booted cpu? not valid anymore since we dont 818 * do idle loop tightspin anymore. 819 */ 820 if (cpu_isset(cpu, cpu_callin_map)) 821 return -EINVAL; 822 823 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; 824 /* Processor goes to start_secondary(), sets online flag */ 825 ret = do_boot_cpu(sapicid, cpu); 826 if (ret < 0) 827 return ret; 828 829 if (cpu_data(cpu)->threads_per_core == 1 && 830 cpu_data(cpu)->cores_per_socket == 1) { 831 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu)); 832 cpu_set(cpu, cpu_core_map[cpu]); 833 return 0; 834 } 835 836 set_cpu_sibling_map(cpu); 837 838 return 0; 839 } 840 841 /* 842 * Assume that CPUs have been discovered by some platform-dependent interface. For 843 * SoftSDV/Lion, that would be ACPI. 844 * 845 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP(). 846 */ 847 void __init 848 init_smp_config(void) 849 { 850 struct fptr { 851 unsigned long fp; 852 unsigned long gp; 853 } *ap_startup; 854 long sal_ret; 855 856 /* Tell SAL where to drop the APs. */ 857 ap_startup = (struct fptr *) start_ap; 858 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ, 859 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0); 860 if (sal_ret < 0) 861 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n", 862 ia64_sal_strerror(sal_ret)); 863 } 864 865 /* 866 * identify_siblings(cpu) gets called from identify_cpu. This populates the 867 * information related to logical execution units in per_cpu_data structure. 868 */ 869 void __devinit 870 identify_siblings(struct cpuinfo_ia64 *c) 871 { 872 s64 status; 873 u16 pltid; 874 pal_logical_to_physical_t info; 875 876 status = ia64_pal_logical_to_phys(-1, &info); 877 if (status != PAL_STATUS_SUCCESS) { 878 if (status != PAL_STATUS_UNIMPLEMENTED) { 879 printk(KERN_ERR 880 "ia64_pal_logical_to_phys failed with %ld\n", 881 status); 882 return; 883 } 884 885 info.overview_ppid = 0; 886 info.overview_cpp = 1; 887 info.overview_tpc = 1; 888 } 889 890 status = ia64_sal_physical_id_info(&pltid); 891 if (status != PAL_STATUS_SUCCESS) { 892 if (status != PAL_STATUS_UNIMPLEMENTED) 893 printk(KERN_ERR 894 "ia64_sal_pltid failed with %ld\n", 895 status); 896 return; 897 } 898 899 c->socket_id = (pltid << 8) | info.overview_ppid; 900 901 if (info.overview_cpp == 1 && info.overview_tpc == 1) 902 return; 903 904 c->cores_per_socket = info.overview_cpp; 905 c->threads_per_core = info.overview_tpc; 906 c->num_log = info.overview_num_log; 907 908 c->core_id = info.log1_cid; 909 c->thread_id = info.log1_tid; 910 } 911 912 /* 913 * returns non zero, if multi-threading is enabled 914 * on at least one physical package. Due to hotplug cpu 915 * and (maxcpus=), all threads may not necessarily be enabled 916 * even though the processor supports multi-threading. 917 */ 918 int is_multithreading_enabled(void) 919 { 920 int i, j; 921 922 for_each_present_cpu(i) { 923 for_each_present_cpu(j) { 924 if (j == i) 925 continue; 926 if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) { 927 if (cpu_data(j)->core_id == cpu_data(i)->core_id) 928 return 1; 929 } 930 } 931 } 932 return 0; 933 } 934 EXPORT_SYMBOL_GPL(is_multithreading_enabled); 935