1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Architecture-specific setup. 4 * 5 * Copyright (C) 1998-2003 Hewlett-Packard Co 6 * David Mosberger-Tang <davidm@hpl.hp.com> 7 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support 8 * 9 * 2005-10-07 Keith Owens <kaos@sgi.com> 10 * Add notify_die() hooks. 11 */ 12 #include <linux/cpu.h> 13 #include <linux/pm.h> 14 #include <linux/elf.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/mm.h> 18 #include <linux/slab.h> 19 #include <linux/module.h> 20 #include <linux/notifier.h> 21 #include <linux/personality.h> 22 #include <linux/sched.h> 23 #include <linux/sched/debug.h> 24 #include <linux/sched/hotplug.h> 25 #include <linux/sched/task.h> 26 #include <linux/sched/task_stack.h> 27 #include <linux/stddef.h> 28 #include <linux/thread_info.h> 29 #include <linux/unistd.h> 30 #include <linux/efi.h> 31 #include <linux/interrupt.h> 32 #include <linux/delay.h> 33 #include <linux/kdebug.h> 34 #include <linux/utsname.h> 35 #include <linux/tracehook.h> 36 #include <linux/rcupdate.h> 37 38 #include <asm/cpu.h> 39 #include <asm/delay.h> 40 #include <asm/elf.h> 41 #include <asm/irq.h> 42 #include <asm/kexec.h> 43 #include <asm/pgalloc.h> 44 #include <asm/processor.h> 45 #include <asm/sal.h> 46 #include <asm/switch_to.h> 47 #include <asm/tlbflush.h> 48 #include <linux/uaccess.h> 49 #include <asm/unwind.h> 50 #include <asm/user.h> 51 52 #include "entry.h" 53 54 #ifdef CONFIG_PERFMON 55 # include <asm/perfmon.h> 56 #endif 57 58 #include "sigframe.h" 59 60 void (*ia64_mark_idle)(int); 61 62 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE; 63 EXPORT_SYMBOL(boot_option_idle_override); 64 void (*pm_power_off) (void); 65 EXPORT_SYMBOL(pm_power_off); 66 67 static void 68 ia64_do_show_stack (struct unw_frame_info *info, void *arg) 69 { 70 unsigned long ip, sp, bsp; 71 const char *loglvl = arg; 72 73 printk("%s\nCall Trace:\n", loglvl); 74 do { 75 unw_get_ip(info, &ip); 76 if (ip == 0) 77 break; 78 79 unw_get_sp(info, &sp); 80 unw_get_bsp(info, &bsp); 81 printk("%s [<%016lx>] %pS\n" 82 " sp=%016lx bsp=%016lx\n", 83 loglvl, ip, (void *)ip, sp, bsp); 84 } while (unw_unwind(info) >= 0); 85 } 86 87 void 88 show_stack (struct task_struct *task, unsigned long *sp, const char *loglvl) 89 { 90 if (!task) 91 unw_init_running(ia64_do_show_stack, (void *)loglvl); 92 else { 93 struct unw_frame_info info; 94 95 unw_init_from_blocked_task(&info, task); 96 ia64_do_show_stack(&info, (void *)loglvl); 97 } 98 } 99 100 void 101 show_regs (struct pt_regs *regs) 102 { 103 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri; 104 105 print_modules(); 106 printk("\n"); 107 show_regs_print_info(KERN_DEFAULT); 108 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n", 109 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(), 110 init_utsname()->release); 111 printk("ip is at %pS\n", (void *)ip); 112 printk("unat: %016lx pfs : %016lx rsc : %016lx\n", 113 regs->ar_unat, regs->ar_pfs, regs->ar_rsc); 114 printk("rnat: %016lx bsps: %016lx pr : %016lx\n", 115 regs->ar_rnat, regs->ar_bspstore, regs->pr); 116 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n", 117 regs->loadrs, regs->ar_ccv, regs->ar_fpsr); 118 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd); 119 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7); 120 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n", 121 regs->f6.u.bits[1], regs->f6.u.bits[0], 122 regs->f7.u.bits[1], regs->f7.u.bits[0]); 123 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n", 124 regs->f8.u.bits[1], regs->f8.u.bits[0], 125 regs->f9.u.bits[1], regs->f9.u.bits[0]); 126 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n", 127 regs->f10.u.bits[1], regs->f10.u.bits[0], 128 regs->f11.u.bits[1], regs->f11.u.bits[0]); 129 130 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3); 131 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10); 132 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13); 133 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16); 134 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19); 135 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22); 136 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25); 137 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28); 138 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31); 139 140 if (user_mode(regs)) { 141 /* print the stacked registers */ 142 unsigned long val, *bsp, ndirty; 143 int i, sof, is_nat = 0; 144 145 sof = regs->cr_ifs & 0x7f; /* size of frame */ 146 ndirty = (regs->loadrs >> 19); 147 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty); 148 for (i = 0; i < sof; ++i) { 149 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i)); 150 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val, 151 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " "); 152 } 153 } else 154 show_stack(NULL, NULL, KERN_DEFAULT); 155 } 156 157 /* local support for deprecated console_print */ 158 void 159 console_print(const char *s) 160 { 161 printk(KERN_EMERG "%s", s); 162 } 163 164 void 165 do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall) 166 { 167 if (fsys_mode(current, &scr->pt)) { 168 /* 169 * defer signal-handling etc. until we return to 170 * privilege-level 0. 171 */ 172 if (!ia64_psr(&scr->pt)->lp) 173 ia64_psr(&scr->pt)->lp = 1; 174 return; 175 } 176 177 #ifdef CONFIG_PERFMON 178 if (current->thread.pfm_needs_checking) 179 /* 180 * Note: pfm_handle_work() allow us to call it with interrupts 181 * disabled, and may enable interrupts within the function. 182 */ 183 pfm_handle_work(); 184 #endif 185 186 /* deal with pending signal delivery */ 187 if (test_thread_flag(TIF_SIGPENDING)) { 188 local_irq_enable(); /* force interrupt enable */ 189 ia64_do_signal(scr, in_syscall); 190 } 191 192 if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME)) { 193 local_irq_enable(); /* force interrupt enable */ 194 tracehook_notify_resume(&scr->pt); 195 } 196 197 /* copy user rbs to kernel rbs */ 198 if (unlikely(test_thread_flag(TIF_RESTORE_RSE))) { 199 local_irq_enable(); /* force interrupt enable */ 200 ia64_sync_krbs(); 201 } 202 203 local_irq_disable(); /* force interrupt disable */ 204 } 205 206 static int __init nohalt_setup(char * str) 207 { 208 cpu_idle_poll_ctrl(true); 209 return 1; 210 } 211 __setup("nohalt", nohalt_setup); 212 213 #ifdef CONFIG_HOTPLUG_CPU 214 /* We don't actually take CPU down, just spin without interrupts. */ 215 static inline void play_dead(void) 216 { 217 unsigned int this_cpu = smp_processor_id(); 218 219 /* Ack it */ 220 __this_cpu_write(cpu_state, CPU_DEAD); 221 222 max_xtp(); 223 local_irq_disable(); 224 idle_task_exit(); 225 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]); 226 /* 227 * The above is a point of no-return, the processor is 228 * expected to be in SAL loop now. 229 */ 230 BUG(); 231 } 232 #else 233 static inline void play_dead(void) 234 { 235 BUG(); 236 } 237 #endif /* CONFIG_HOTPLUG_CPU */ 238 239 void arch_cpu_idle_dead(void) 240 { 241 play_dead(); 242 } 243 244 void arch_cpu_idle(void) 245 { 246 void (*mark_idle)(int) = ia64_mark_idle; 247 248 #ifdef CONFIG_SMP 249 min_xtp(); 250 #endif 251 rmb(); 252 if (mark_idle) 253 (*mark_idle)(1); 254 255 safe_halt(); 256 257 if (mark_idle) 258 (*mark_idle)(0); 259 #ifdef CONFIG_SMP 260 normal_xtp(); 261 #endif 262 } 263 264 void 265 ia64_save_extra (struct task_struct *task) 266 { 267 #ifdef CONFIG_PERFMON 268 unsigned long info; 269 #endif 270 271 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0) 272 ia64_save_debug_regs(&task->thread.dbr[0]); 273 274 #ifdef CONFIG_PERFMON 275 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0) 276 pfm_save_regs(task); 277 278 info = __this_cpu_read(pfm_syst_info); 279 if (info & PFM_CPUINFO_SYST_WIDE) 280 pfm_syst_wide_update_task(task, info, 0); 281 #endif 282 } 283 284 void 285 ia64_load_extra (struct task_struct *task) 286 { 287 #ifdef CONFIG_PERFMON 288 unsigned long info; 289 #endif 290 291 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0) 292 ia64_load_debug_regs(&task->thread.dbr[0]); 293 294 #ifdef CONFIG_PERFMON 295 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0) 296 pfm_load_regs(task); 297 298 info = __this_cpu_read(pfm_syst_info); 299 if (info & PFM_CPUINFO_SYST_WIDE) 300 pfm_syst_wide_update_task(task, info, 1); 301 #endif 302 } 303 304 /* 305 * Copy the state of an ia-64 thread. 306 * 307 * We get here through the following call chain: 308 * 309 * from user-level: from kernel: 310 * 311 * <clone syscall> <some kernel call frames> 312 * sys_clone : 313 * do_fork do_fork 314 * copy_thread copy_thread 315 * 316 * This means that the stack layout is as follows: 317 * 318 * +---------------------+ (highest addr) 319 * | struct pt_regs | 320 * +---------------------+ 321 * | struct switch_stack | 322 * +---------------------+ 323 * | | 324 * | memory stack | 325 * | | <-- sp (lowest addr) 326 * +---------------------+ 327 * 328 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an 329 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register, 330 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the 331 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since 332 * the stack is page aligned and the page size is at least 4KB, this is always the case, 333 * so there is nothing to worry about. 334 */ 335 int 336 copy_thread(unsigned long clone_flags, 337 unsigned long user_stack_base, unsigned long user_stack_size, 338 struct task_struct *p) 339 { 340 extern char ia64_ret_from_clone; 341 struct switch_stack *child_stack, *stack; 342 unsigned long rbs, child_rbs, rbs_size; 343 struct pt_regs *child_ptregs; 344 struct pt_regs *regs = current_pt_regs(); 345 int retval = 0; 346 347 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1; 348 child_stack = (struct switch_stack *) child_ptregs - 1; 349 350 rbs = (unsigned long) current + IA64_RBS_OFFSET; 351 child_rbs = (unsigned long) p + IA64_RBS_OFFSET; 352 353 /* copy parts of thread_struct: */ 354 p->thread.ksp = (unsigned long) child_stack - 16; 355 356 /* 357 * NOTE: The calling convention considers all floating point 358 * registers in the high partition (fph) to be scratch. Since 359 * the only way to get to this point is through a system call, 360 * we know that the values in fph are all dead. Hence, there 361 * is no need to inherit the fph state from the parent to the 362 * child and all we have to do is to make sure that 363 * IA64_THREAD_FPH_VALID is cleared in the child. 364 * 365 * XXX We could push this optimization a bit further by 366 * clearing IA64_THREAD_FPH_VALID on ANY system call. 367 * However, it's not clear this is worth doing. Also, it 368 * would be a slight deviation from the normal Linux system 369 * call behavior where scratch registers are preserved across 370 * system calls (unless used by the system call itself). 371 */ 372 # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \ 373 | IA64_THREAD_PM_VALID) 374 # define THREAD_FLAGS_TO_SET 0 375 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR) 376 | THREAD_FLAGS_TO_SET); 377 378 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */ 379 380 if (unlikely(p->flags & PF_KTHREAD)) { 381 if (unlikely(!user_stack_base)) { 382 /* fork_idle() called us */ 383 return 0; 384 } 385 memset(child_stack, 0, sizeof(*child_ptregs) + sizeof(*child_stack)); 386 child_stack->r4 = user_stack_base; /* payload */ 387 child_stack->r5 = user_stack_size; /* argument */ 388 /* 389 * Preserve PSR bits, except for bits 32-34 and 37-45, 390 * which we can't read. 391 */ 392 child_ptregs->cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN; 393 /* mark as valid, empty frame */ 394 child_ptregs->cr_ifs = 1UL << 63; 395 child_stack->ar_fpsr = child_ptregs->ar_fpsr 396 = ia64_getreg(_IA64_REG_AR_FPSR); 397 child_stack->pr = (1 << PRED_KERNEL_STACK); 398 child_stack->ar_bspstore = child_rbs; 399 child_stack->b0 = (unsigned long) &ia64_ret_from_clone; 400 401 /* stop some PSR bits from being inherited. 402 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve() 403 * therefore we must specify them explicitly here and not include them in 404 * IA64_PSR_BITS_TO_CLEAR. 405 */ 406 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET) 407 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP)); 408 409 return 0; 410 } 411 stack = ((struct switch_stack *) regs) - 1; 412 /* copy parent's switch_stack & pt_regs to child: */ 413 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack)); 414 415 /* copy the parent's register backing store to the child: */ 416 rbs_size = stack->ar_bspstore - rbs; 417 memcpy((void *) child_rbs, (void *) rbs, rbs_size); 418 if (clone_flags & CLONE_SETTLS) 419 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */ 420 if (user_stack_base) { 421 child_ptregs->r12 = user_stack_base + user_stack_size - 16; 422 child_ptregs->ar_bspstore = user_stack_base; 423 child_ptregs->ar_rnat = 0; 424 child_ptregs->loadrs = 0; 425 } 426 child_stack->ar_bspstore = child_rbs + rbs_size; 427 child_stack->b0 = (unsigned long) &ia64_ret_from_clone; 428 429 /* stop some PSR bits from being inherited. 430 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve() 431 * therefore we must specify them explicitly here and not include them in 432 * IA64_PSR_BITS_TO_CLEAR. 433 */ 434 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET) 435 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP)); 436 437 #ifdef CONFIG_PERFMON 438 if (current->thread.pfm_context) 439 pfm_inherit(p, child_ptregs); 440 #endif 441 return retval; 442 } 443 444 static void 445 do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg) 446 { 447 unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm; 448 unsigned long uninitialized_var(ip); /* GCC be quiet */ 449 elf_greg_t *dst = arg; 450 struct pt_regs *pt; 451 char nat; 452 int i; 453 454 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */ 455 456 if (unw_unwind_to_user(info) < 0) 457 return; 458 459 unw_get_sp(info, &sp); 460 pt = (struct pt_regs *) (sp + 16); 461 462 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm); 463 464 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0) 465 return; 466 467 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end), 468 &ar_rnat); 469 470 /* 471 * coredump format: 472 * r0-r31 473 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT) 474 * predicate registers (p0-p63) 475 * b0-b7 476 * ip cfm user-mask 477 * ar.rsc ar.bsp ar.bspstore ar.rnat 478 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec 479 */ 480 481 /* r0 is zero */ 482 for (i = 1, mask = (1UL << i); i < 32; ++i) { 483 unw_get_gr(info, i, &dst[i], &nat); 484 if (nat) 485 nat_bits |= mask; 486 mask <<= 1; 487 } 488 dst[32] = nat_bits; 489 unw_get_pr(info, &dst[33]); 490 491 for (i = 0; i < 8; ++i) 492 unw_get_br(info, i, &dst[34 + i]); 493 494 unw_get_rp(info, &ip); 495 dst[42] = ip + ia64_psr(pt)->ri; 496 dst[43] = cfm; 497 dst[44] = pt->cr_ipsr & IA64_PSR_UM; 498 499 unw_get_ar(info, UNW_AR_RSC, &dst[45]); 500 /* 501 * For bsp and bspstore, unw_get_ar() would return the kernel 502 * addresses, but we need the user-level addresses instead: 503 */ 504 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */ 505 dst[47] = pt->ar_bspstore; 506 dst[48] = ar_rnat; 507 unw_get_ar(info, UNW_AR_CCV, &dst[49]); 508 unw_get_ar(info, UNW_AR_UNAT, &dst[50]); 509 unw_get_ar(info, UNW_AR_FPSR, &dst[51]); 510 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */ 511 unw_get_ar(info, UNW_AR_LC, &dst[53]); 512 unw_get_ar(info, UNW_AR_EC, &dst[54]); 513 unw_get_ar(info, UNW_AR_CSD, &dst[55]); 514 unw_get_ar(info, UNW_AR_SSD, &dst[56]); 515 } 516 517 void 518 do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg) 519 { 520 elf_fpreg_t *dst = arg; 521 int i; 522 523 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */ 524 525 if (unw_unwind_to_user(info) < 0) 526 return; 527 528 /* f0 is 0.0, f1 is 1.0 */ 529 530 for (i = 2; i < 32; ++i) 531 unw_get_fr(info, i, dst + i); 532 533 ia64_flush_fph(task); 534 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0) 535 memcpy(dst + 32, task->thread.fph, 96*16); 536 } 537 538 void 539 do_copy_regs (struct unw_frame_info *info, void *arg) 540 { 541 do_copy_task_regs(current, info, arg); 542 } 543 544 void 545 do_dump_fpu (struct unw_frame_info *info, void *arg) 546 { 547 do_dump_task_fpu(current, info, arg); 548 } 549 550 void 551 ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst) 552 { 553 unw_init_running(do_copy_regs, dst); 554 } 555 556 int 557 dump_fpu (struct pt_regs *pt, elf_fpregset_t dst) 558 { 559 unw_init_running(do_dump_fpu, dst); 560 return 1; /* f0-f31 are always valid so we always return 1 */ 561 } 562 563 /* 564 * Flush thread state. This is called when a thread does an execve(). 565 */ 566 void 567 flush_thread (void) 568 { 569 /* drop floating-point and debug-register state if it exists: */ 570 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID); 571 ia64_drop_fpu(current); 572 } 573 574 /* 575 * Clean up state associated with a thread. This is called when 576 * the thread calls exit(). 577 */ 578 void 579 exit_thread (struct task_struct *tsk) 580 { 581 582 ia64_drop_fpu(tsk); 583 #ifdef CONFIG_PERFMON 584 /* if needed, stop monitoring and flush state to perfmon context */ 585 if (tsk->thread.pfm_context) 586 pfm_exit_thread(tsk); 587 588 /* free debug register resources */ 589 if (tsk->thread.flags & IA64_THREAD_DBG_VALID) 590 pfm_release_debug_registers(tsk); 591 #endif 592 } 593 594 unsigned long 595 get_wchan (struct task_struct *p) 596 { 597 struct unw_frame_info info; 598 unsigned long ip; 599 int count = 0; 600 601 if (!p || p == current || p->state == TASK_RUNNING) 602 return 0; 603 604 /* 605 * Note: p may not be a blocked task (it could be current or 606 * another process running on some other CPU. Rather than 607 * trying to determine if p is really blocked, we just assume 608 * it's blocked and rely on the unwind routines to fail 609 * gracefully if the process wasn't really blocked after all. 610 * --davidm 99/12/15 611 */ 612 unw_init_from_blocked_task(&info, p); 613 do { 614 if (p->state == TASK_RUNNING) 615 return 0; 616 if (unw_unwind(&info) < 0) 617 return 0; 618 unw_get_ip(&info, &ip); 619 if (!in_sched_functions(ip)) 620 return ip; 621 } while (count++ < 16); 622 return 0; 623 } 624 625 void 626 cpu_halt (void) 627 { 628 pal_power_mgmt_info_u_t power_info[8]; 629 unsigned long min_power; 630 int i, min_power_state; 631 632 if (ia64_pal_halt_info(power_info) != 0) 633 return; 634 635 min_power_state = 0; 636 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption; 637 for (i = 1; i < 8; ++i) 638 if (power_info[i].pal_power_mgmt_info_s.im 639 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) { 640 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption; 641 min_power_state = i; 642 } 643 644 while (1) 645 ia64_pal_halt(min_power_state); 646 } 647 648 void machine_shutdown(void) 649 { 650 smp_shutdown_nonboot_cpus(reboot_cpu); 651 652 #ifdef CONFIG_KEXEC 653 kexec_disable_iosapic(); 654 #endif 655 } 656 657 void 658 machine_restart (char *restart_cmd) 659 { 660 (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0); 661 efi_reboot(REBOOT_WARM, NULL); 662 } 663 664 void 665 machine_halt (void) 666 { 667 (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0); 668 cpu_halt(); 669 } 670 671 void 672 machine_power_off (void) 673 { 674 if (pm_power_off) 675 pm_power_off(); 676 machine_halt(); 677 } 678 679 EXPORT_SYMBOL(ia64_delay_loop); 680