xref: /openbmc/linux/arch/ia64/kernel/msi_ia64.c (revision 275876e2)
1 /*
2  * MSI hooks for standard x86 apic
3  */
4 
5 #include <linux/pci.h>
6 #include <linux/irq.h>
7 #include <linux/msi.h>
8 #include <linux/dmar.h>
9 #include <asm/smp.h>
10 #include <asm/msidef.h>
11 
12 static struct irq_chip	ia64_msi_chip;
13 
14 #ifdef CONFIG_SMP
15 static int ia64_set_msi_irq_affinity(struct irq_data *idata,
16 				     const cpumask_t *cpu_mask, bool force)
17 {
18 	struct msi_msg msg;
19 	u32 addr, data;
20 	int cpu = cpumask_first_and(cpu_mask, cpu_online_mask);
21 	unsigned int irq = idata->irq;
22 
23 	if (irq_prepare_move(irq, cpu))
24 		return -1;
25 
26 	get_cached_msi_msg(irq, &msg);
27 
28 	addr = msg.address_lo;
29 	addr &= MSI_ADDR_DEST_ID_MASK;
30 	addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
31 	msg.address_lo = addr;
32 
33 	data = msg.data;
34 	data &= MSI_DATA_VECTOR_MASK;
35 	data |= MSI_DATA_VECTOR(irq_to_vector(irq));
36 	msg.data = data;
37 
38 	write_msi_msg(irq, &msg);
39 	cpumask_copy(idata->affinity, cpumask_of(cpu));
40 
41 	return 0;
42 }
43 #endif /* CONFIG_SMP */
44 
45 int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
46 {
47 	struct msi_msg	msg;
48 	unsigned long	dest_phys_id;
49 	int	irq, vector;
50 	cpumask_t mask;
51 
52 	irq = create_irq();
53 	if (irq < 0)
54 		return irq;
55 
56 	irq_set_msi_desc(irq, desc);
57 	cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask);
58 	dest_phys_id = cpu_physical_id(first_cpu(mask));
59 	vector = irq_to_vector(irq);
60 
61 	msg.address_hi = 0;
62 	msg.address_lo =
63 		MSI_ADDR_HEADER |
64 		MSI_ADDR_DEST_MODE_PHYS |
65 		MSI_ADDR_REDIRECTION_CPU |
66 		MSI_ADDR_DEST_ID_CPU(dest_phys_id);
67 
68 	msg.data =
69 		MSI_DATA_TRIGGER_EDGE |
70 		MSI_DATA_LEVEL_ASSERT |
71 		MSI_DATA_DELIVERY_FIXED |
72 		MSI_DATA_VECTOR(vector);
73 
74 	write_msi_msg(irq, &msg);
75 	irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
76 
77 	return 0;
78 }
79 
80 void ia64_teardown_msi_irq(unsigned int irq)
81 {
82 	destroy_irq(irq);
83 }
84 
85 static void ia64_ack_msi_irq(struct irq_data *data)
86 {
87 	irq_complete_move(data->irq);
88 	irq_move_irq(data);
89 	ia64_eoi();
90 }
91 
92 static int ia64_msi_retrigger_irq(struct irq_data *data)
93 {
94 	unsigned int vector = irq_to_vector(data->irq);
95 	ia64_resend_irq(vector);
96 
97 	return 1;
98 }
99 
100 /*
101  * Generic ops used on most IA64 platforms.
102  */
103 static struct irq_chip ia64_msi_chip = {
104 	.name			= "PCI-MSI",
105 	.irq_mask		= mask_msi_irq,
106 	.irq_unmask		= unmask_msi_irq,
107 	.irq_ack		= ia64_ack_msi_irq,
108 #ifdef CONFIG_SMP
109 	.irq_set_affinity	= ia64_set_msi_irq_affinity,
110 #endif
111 	.irq_retrigger		= ia64_msi_retrigger_irq,
112 };
113 
114 
115 int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
116 {
117 	if (platform_setup_msi_irq)
118 		return platform_setup_msi_irq(pdev, desc);
119 
120 	return ia64_setup_msi_irq(pdev, desc);
121 }
122 
123 void arch_teardown_msi_irq(unsigned int irq)
124 {
125 	if (platform_teardown_msi_irq)
126 		return platform_teardown_msi_irq(irq);
127 
128 	return ia64_teardown_msi_irq(irq);
129 }
130 
131 #ifdef CONFIG_INTEL_IOMMU
132 #ifdef CONFIG_SMP
133 static int dmar_msi_set_affinity(struct irq_data *data,
134 				 const struct cpumask *mask, bool force)
135 {
136 	unsigned int irq = data->irq;
137 	struct irq_cfg *cfg = irq_cfg + irq;
138 	struct msi_msg msg;
139 	int cpu = cpumask_first_and(mask, cpu_online_mask);
140 
141 	if (irq_prepare_move(irq, cpu))
142 		return -1;
143 
144 	dmar_msi_read(irq, &msg);
145 
146 	msg.data &= ~MSI_DATA_VECTOR_MASK;
147 	msg.data |= MSI_DATA_VECTOR(cfg->vector);
148 	msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
149 	msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
150 
151 	dmar_msi_write(irq, &msg);
152 	cpumask_copy(data->affinity, mask);
153 
154 	return 0;
155 }
156 #endif /* CONFIG_SMP */
157 
158 static struct irq_chip dmar_msi_type = {
159 	.name = "DMAR_MSI",
160 	.irq_unmask = dmar_msi_unmask,
161 	.irq_mask = dmar_msi_mask,
162 	.irq_ack = ia64_ack_msi_irq,
163 #ifdef CONFIG_SMP
164 	.irq_set_affinity = dmar_msi_set_affinity,
165 #endif
166 	.irq_retrigger = ia64_msi_retrigger_irq,
167 };
168 
169 static int
170 msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
171 {
172 	struct irq_cfg *cfg = irq_cfg + irq;
173 	unsigned dest;
174 	cpumask_t mask;
175 
176 	cpumask_and(&mask, &(irq_to_domain(irq)), cpu_online_mask);
177 	dest = cpu_physical_id(first_cpu(mask));
178 
179 	msg->address_hi = 0;
180 	msg->address_lo =
181 		MSI_ADDR_HEADER |
182 		MSI_ADDR_DEST_MODE_PHYS |
183 		MSI_ADDR_REDIRECTION_CPU |
184 		MSI_ADDR_DEST_ID_CPU(dest);
185 
186 	msg->data =
187 		MSI_DATA_TRIGGER_EDGE |
188 		MSI_DATA_LEVEL_ASSERT |
189 		MSI_DATA_DELIVERY_FIXED |
190 		MSI_DATA_VECTOR(cfg->vector);
191 	return 0;
192 }
193 
194 int arch_setup_dmar_msi(unsigned int irq)
195 {
196 	int ret;
197 	struct msi_msg msg;
198 
199 	ret = msi_compose_msg(NULL, irq, &msg);
200 	if (ret < 0)
201 		return ret;
202 	dmar_msi_write(irq, &msg);
203 	irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
204 				      "edge");
205 	return 0;
206 }
207 #endif /* CONFIG_INTEL_IOMMU */
208 
209