1 /* 2 * linux/arch/ia64/kernel/irq.c 3 * 4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar 5 * 6 * This file contains the code used by various IRQ handling routines: 7 * asking for different IRQs should be done through these routines 8 * instead of just grabbing them. Thus setups with different IRQ numbers 9 * shouldn't result in any weird surprises, and installing new handlers 10 * should be easier. 11 * 12 * Copyright (C) Ashok Raj<ashok.raj@intel.com>, Intel Corporation 2004 13 * 14 * 4/14/2004: Added code to handle cpu migration and do safe irq 15 * migration without losing interrupts for iosapic 16 * architecture. 17 */ 18 19 #include <asm/delay.h> 20 #include <asm/uaccess.h> 21 #include <linux/module.h> 22 #include <linux/seq_file.h> 23 #include <linux/interrupt.h> 24 #include <linux/kernel_stat.h> 25 26 /* 27 * 'what should we do if we get a hw irq event on an illegal vector'. 28 * each architecture has to answer this themselves. 29 */ 30 void ack_bad_irq(unsigned int irq) 31 { 32 printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id()); 33 } 34 35 #ifdef CONFIG_IA64_GENERIC 36 ia64_vector __ia64_irq_to_vector(int irq) 37 { 38 return irq_cfg[irq].vector; 39 } 40 41 unsigned int __ia64_local_vector_to_irq (ia64_vector vec) 42 { 43 return __get_cpu_var(vector_irq)[vec]; 44 } 45 #endif 46 47 /* 48 * Interrupt statistics: 49 */ 50 51 atomic_t irq_err_count; 52 53 /* 54 * /proc/interrupts printing: 55 */ 56 57 int show_interrupts(struct seq_file *p, void *v) 58 { 59 int i = *(loff_t *) v, j; 60 struct irqaction * action; 61 unsigned long flags; 62 63 if (i == 0) { 64 char cpuname[16]; 65 seq_printf(p, " "); 66 for_each_online_cpu(j) { 67 snprintf(cpuname, 10, "CPU%d", j); 68 seq_printf(p, "%10s ", cpuname); 69 } 70 seq_putc(p, '\n'); 71 } 72 73 if (i < NR_IRQS) { 74 spin_lock_irqsave(&irq_desc[i].lock, flags); 75 action = irq_desc[i].action; 76 if (!action) 77 goto skip; 78 seq_printf(p, "%3d: ",i); 79 #ifndef CONFIG_SMP 80 seq_printf(p, "%10u ", kstat_irqs(i)); 81 #else 82 for_each_online_cpu(j) { 83 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 84 } 85 #endif 86 seq_printf(p, " %14s", irq_desc[i].chip->name); 87 seq_printf(p, " %s", action->name); 88 89 for (action=action->next; action; action = action->next) 90 seq_printf(p, ", %s", action->name); 91 92 seq_putc(p, '\n'); 93 skip: 94 spin_unlock_irqrestore(&irq_desc[i].lock, flags); 95 } else if (i == NR_IRQS) 96 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); 97 return 0; 98 } 99 100 #ifdef CONFIG_SMP 101 static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 }; 102 103 void set_irq_affinity_info (unsigned int irq, int hwid, int redir) 104 { 105 cpumask_t mask = CPU_MASK_NONE; 106 107 cpu_set(cpu_logical_id(hwid), mask); 108 109 if (irq < NR_IRQS) { 110 irq_desc[irq].affinity = mask; 111 irq_redir[irq] = (char) (redir & 0xff); 112 } 113 } 114 115 bool is_affinity_mask_valid(cpumask_t cpumask) 116 { 117 if (ia64_platform_is("sn2")) { 118 /* Only allow one CPU to be specified in the smp_affinity mask */ 119 if (cpus_weight(cpumask) != 1) 120 return false; 121 } 122 return true; 123 } 124 125 #endif /* CONFIG_SMP */ 126 127 #ifdef CONFIG_HOTPLUG_CPU 128 unsigned int vectors_in_migration[NR_IRQS]; 129 130 /* 131 * Since cpu_online_map is already updated, we just need to check for 132 * affinity that has zeros 133 */ 134 static void migrate_irqs(void) 135 { 136 cpumask_t mask; 137 irq_desc_t *desc; 138 int irq, new_cpu; 139 140 for (irq=0; irq < NR_IRQS; irq++) { 141 desc = irq_desc + irq; 142 143 if (desc->status == IRQ_DISABLED) 144 continue; 145 146 /* 147 * No handling for now. 148 * TBD: Implement a disable function so we can now 149 * tell CPU not to respond to these local intr sources. 150 * such as ITV,CPEI,MCA etc. 151 */ 152 if (desc->status == IRQ_PER_CPU) 153 continue; 154 155 cpus_and(mask, irq_desc[irq].affinity, cpu_online_map); 156 if (any_online_cpu(mask) == NR_CPUS) { 157 /* 158 * Save it for phase 2 processing 159 */ 160 vectors_in_migration[irq] = irq; 161 162 new_cpu = any_online_cpu(cpu_online_map); 163 mask = cpumask_of_cpu(new_cpu); 164 165 /* 166 * Al three are essential, currently WARN_ON.. maybe panic? 167 */ 168 if (desc->chip && desc->chip->disable && 169 desc->chip->enable && desc->chip->set_affinity) { 170 desc->chip->disable(irq); 171 desc->chip->set_affinity(irq, mask); 172 desc->chip->enable(irq); 173 } else { 174 WARN_ON((!(desc->chip) || !(desc->chip->disable) || 175 !(desc->chip->enable) || 176 !(desc->chip->set_affinity))); 177 } 178 } 179 } 180 } 181 182 void fixup_irqs(void) 183 { 184 unsigned int irq; 185 extern void ia64_process_pending_intr(void); 186 extern volatile int time_keeper_id; 187 188 /* Mask ITV to disable timer */ 189 ia64_set_itv(1 << 16); 190 191 /* 192 * Find a new timesync master 193 */ 194 if (smp_processor_id() == time_keeper_id) { 195 time_keeper_id = first_cpu(cpu_online_map); 196 printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id); 197 } 198 199 /* 200 * Phase 1: Locate IRQs bound to this cpu and 201 * relocate them for cpu removal. 202 */ 203 migrate_irqs(); 204 205 /* 206 * Phase 2: Perform interrupt processing for all entries reported in 207 * local APIC. 208 */ 209 ia64_process_pending_intr(); 210 211 /* 212 * Phase 3: Now handle any interrupts not captured in local APIC. 213 * This is to account for cases that device interrupted during the time the 214 * rte was being disabled and re-programmed. 215 */ 216 for (irq=0; irq < NR_IRQS; irq++) { 217 if (vectors_in_migration[irq]) { 218 struct pt_regs *old_regs = set_irq_regs(NULL); 219 220 vectors_in_migration[irq]=0; 221 generic_handle_irq(irq); 222 set_irq_regs(old_regs); 223 } 224 } 225 226 /* 227 * Now let processor die. We do irq disable and max_xtp() to 228 * ensure there is no more interrupts routed to this processor. 229 * But the local timer interrupt can have 1 pending which we 230 * take care in timer_interrupt(). 231 */ 232 max_xtp(); 233 local_irq_disable(); 234 } 235 #endif 236