1/* 2 * arch/ia64/kernel/entry.S 3 * 4 * Kernel entry points. 5 * 6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 7 * David Mosberger-Tang <davidm@hpl.hp.com> 8 * Copyright (C) 1999, 2002-2003 9 * Asit Mallick <Asit.K.Mallick@intel.com> 10 * Don Dugger <Don.Dugger@intel.com> 11 * Suresh Siddha <suresh.b.siddha@intel.com> 12 * Fenghua Yu <fenghua.yu@intel.com> 13 * Copyright (C) 1999 VA Linux Systems 14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> 15 */ 16/* 17 * ia64_switch_to now places correct virtual mapping in in TR2 for 18 * kernel stack. This allows us to handle interrupts without changing 19 * to physical mode. 20 * 21 * Jonathan Nicklin <nicklin@missioncriticallinux.com> 22 * Patrick O'Rourke <orourke@missioncriticallinux.com> 23 * 11/07/2000 24 */ 25/* 26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> 27 * VA Linux Systems Japan K.K. 28 * pv_ops. 29 */ 30/* 31 * Global (preserved) predicate usage on syscall entry/exit path: 32 * 33 * pKStk: See entry.h. 34 * pUStk: See entry.h. 35 * pSys: See entry.h. 36 * pNonSys: !pSys 37 */ 38 39 40#include <asm/asmmacro.h> 41#include <asm/cache.h> 42#include <asm/errno.h> 43#include <asm/kregs.h> 44#include <asm/asm-offsets.h> 45#include <asm/pgtable.h> 46#include <asm/percpu.h> 47#include <asm/processor.h> 48#include <asm/thread_info.h> 49#include <asm/unistd.h> 50#include <asm/ftrace.h> 51 52#include "minstate.h" 53 54#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE 55 /* 56 * execve() is special because in case of success, we need to 57 * setup a null register window frame. 58 */ 59ENTRY(ia64_execve) 60 /* 61 * Allocate 8 input registers since ptrace() may clobber them 62 */ 63 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 64 alloc loc1=ar.pfs,8,2,3,0 65 mov loc0=rp 66 .body 67 mov out0=in0 // filename 68 ;; // stop bit between alloc and call 69 mov out1=in1 // argv 70 mov out2=in2 // envp 71 br.call.sptk.many rp=sys_execve 72.ret0: 73 cmp4.ge p6,p7=r8,r0 74 mov ar.pfs=loc1 // restore ar.pfs 75 sxt4 r8=r8 // return 64-bit result 76 ;; 77 stf.spill [sp]=f0 78 mov rp=loc0 79(p6) mov ar.pfs=r0 // clear ar.pfs on success 80(p7) br.ret.sptk.many rp 81 82 /* 83 * In theory, we'd have to zap this state only to prevent leaking of 84 * security sensitive state (e.g., if current->mm->dumpable is zero). However, 85 * this executes in less than 20 cycles even on Itanium, so it's not worth 86 * optimizing for...). 87 */ 88 mov ar.unat=0; mov ar.lc=0 89 mov r4=0; mov f2=f0; mov b1=r0 90 mov r5=0; mov f3=f0; mov b2=r0 91 mov r6=0; mov f4=f0; mov b3=r0 92 mov r7=0; mov f5=f0; mov b4=r0 93 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0 94 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0 95 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0 96 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0 97 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0 98 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0 99 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0 100 br.ret.sptk.many rp 101END(ia64_execve) 102 103/* 104 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr, 105 * u64 tls) 106 */ 107GLOBAL_ENTRY(sys_clone2) 108 /* 109 * Allocate 8 input registers since ptrace() may clobber them 110 */ 111 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 112 alloc r16=ar.pfs,8,2,6,0 113 DO_SAVE_SWITCH_STACK 114 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp 115 mov loc0=rp 116 mov loc1=r16 // save ar.pfs across do_fork 117 .body 118 mov out1=in1 119 mov out2=in2 120 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT 121 mov out3=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID 122 ;; 123(p6) st8 [r2]=in5 // store TLS in r16 for copy_thread() 124 mov out4=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID 125 mov out0=in0 // out0 = clone_flags 126 br.call.sptk.many rp=do_fork 127.ret1: .restore sp 128 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack 129 mov ar.pfs=loc1 130 mov rp=loc0 131 br.ret.sptk.many rp 132END(sys_clone2) 133 134/* 135 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls) 136 * Deprecated. Use sys_clone2() instead. 137 */ 138GLOBAL_ENTRY(sys_clone) 139 /* 140 * Allocate 8 input registers since ptrace() may clobber them 141 */ 142 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 143 alloc r16=ar.pfs,8,2,6,0 144 DO_SAVE_SWITCH_STACK 145 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp 146 mov loc0=rp 147 mov loc1=r16 // save ar.pfs across do_fork 148 .body 149 mov out1=in1 150 mov out2=16 // stacksize (compensates for 16-byte scratch area) 151 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT 152 mov out3=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID 153 ;; 154(p6) st8 [r2]=in4 // store TLS in r13 (tp) 155 mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID 156 mov out0=in0 // out0 = clone_flags 157 br.call.sptk.many rp=do_fork 158.ret2: .restore sp 159 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack 160 mov ar.pfs=loc1 161 mov rp=loc0 162 br.ret.sptk.many rp 163END(sys_clone) 164#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 165 166/* 167 * prev_task <- ia64_switch_to(struct task_struct *next) 168 * With Ingo's new scheduler, interrupts are disabled when this routine gets 169 * called. The code starting at .map relies on this. The rest of the code 170 * doesn't care about the interrupt masking status. 171 */ 172GLOBAL_ENTRY(__paravirt_switch_to) 173 .prologue 174 alloc r16=ar.pfs,1,0,0,0 175 DO_SAVE_SWITCH_STACK 176 .body 177 178 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13 179 movl r25=init_task 180 mov r27=IA64_KR(CURRENT_STACK) 181 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0 182 dep r20=0,in0,61,3 // physical address of "next" 183 ;; 184 st8 [r22]=sp // save kernel stack pointer of old task 185 shr.u r26=r20,IA64_GRANULE_SHIFT 186 cmp.eq p7,p6=r25,in0 187 ;; 188 /* 189 * If we've already mapped this task's page, we can skip doing it again. 190 */ 191(p6) cmp.eq p7,p6=r26,r27 192(p6) br.cond.dpnt .map 193 ;; 194.done: 195 ld8 sp=[r21] // load kernel stack pointer of new task 196 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register 197 mov r8=r13 // return pointer to previously running task 198 mov r13=in0 // set "current" pointer 199 ;; 200 DO_LOAD_SWITCH_STACK 201 202#ifdef CONFIG_SMP 203 sync.i // ensure "fc"s done by this CPU are visible on other CPUs 204#endif 205 br.ret.sptk.many rp // boogie on out in new context 206 207.map: 208 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here 209 movl r25=PAGE_KERNEL 210 ;; 211 srlz.d 212 or r23=r25,r20 // construct PA | page properties 213 mov r25=IA64_GRANULE_SHIFT<<2 214 ;; 215 MOV_TO_ITIR(p0, r25, r8) 216 MOV_TO_IFA(in0, r8) // VA of next task... 217 ;; 218 mov r25=IA64_TR_CURRENT_STACK 219 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped... 220 ;; 221 itr.d dtr[r25]=r23 // wire in new mapping... 222 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit 223 br.cond.sptk .done 224END(__paravirt_switch_to) 225 226#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE 227/* 228 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This 229 * means that we may get an interrupt with "sp" pointing to the new kernel stack while 230 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc, 231 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a 232 * problem. Also, we don't need to specify unwind information for preserved registers 233 * that are not modified in save_switch_stack as the right unwind information is already 234 * specified at the call-site of save_switch_stack. 235 */ 236 237/* 238 * save_switch_stack: 239 * - r16 holds ar.pfs 240 * - b7 holds address to return to 241 * - rp (b0) holds return address to save 242 */ 243GLOBAL_ENTRY(save_switch_stack) 244 .prologue 245 .altrp b7 246 flushrs // flush dirty regs to backing store (must be first in insn group) 247 .save @priunat,r17 248 mov r17=ar.unat // preserve caller's 249 .body 250#ifdef CONFIG_ITANIUM 251 adds r2=16+128,sp 252 adds r3=16+64,sp 253 adds r14=SW(R4)+16,sp 254 ;; 255 st8.spill [r14]=r4,16 // spill r4 256 lfetch.fault.excl.nt1 [r3],128 257 ;; 258 lfetch.fault.excl.nt1 [r2],128 259 lfetch.fault.excl.nt1 [r3],128 260 ;; 261 lfetch.fault.excl [r2] 262 lfetch.fault.excl [r3] 263 adds r15=SW(R5)+16,sp 264#else 265 add r2=16+3*128,sp 266 add r3=16,sp 267 add r14=SW(R4)+16,sp 268 ;; 269 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0 270 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010 271 ;; 272 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090 273 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190 274 ;; 275 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110 276 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210 277 adds r15=SW(R5)+16,sp 278#endif 279 ;; 280 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5 281 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0 282 add r2=SW(F2)+16,sp // r2 = &sw->f2 283 ;; 284 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6 285 mov.m r18=ar.fpsr // preserve fpsr 286 add r3=SW(F3)+16,sp // r3 = &sw->f3 287 ;; 288 stf.spill [r2]=f2,32 289 mov.m r19=ar.rnat 290 mov r21=b0 291 292 stf.spill [r3]=f3,32 293 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7 294 mov r22=b1 295 ;; 296 // since we're done with the spills, read and save ar.unat: 297 mov.m r29=ar.unat 298 mov.m r20=ar.bspstore 299 mov r23=b2 300 stf.spill [r2]=f4,32 301 stf.spill [r3]=f5,32 302 mov r24=b3 303 ;; 304 st8 [r14]=r21,SW(B1)-SW(B0) // save b0 305 st8 [r15]=r23,SW(B3)-SW(B2) // save b2 306 mov r25=b4 307 mov r26=b5 308 ;; 309 st8 [r14]=r22,SW(B4)-SW(B1) // save b1 310 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3 311 mov r21=ar.lc // I-unit 312 stf.spill [r2]=f12,32 313 stf.spill [r3]=f13,32 314 ;; 315 st8 [r14]=r25,SW(B5)-SW(B4) // save b4 316 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs 317 stf.spill [r2]=f14,32 318 stf.spill [r3]=f15,32 319 ;; 320 st8 [r14]=r26 // save b5 321 st8 [r15]=r21 // save ar.lc 322 stf.spill [r2]=f16,32 323 stf.spill [r3]=f17,32 324 ;; 325 stf.spill [r2]=f18,32 326 stf.spill [r3]=f19,32 327 ;; 328 stf.spill [r2]=f20,32 329 stf.spill [r3]=f21,32 330 ;; 331 stf.spill [r2]=f22,32 332 stf.spill [r3]=f23,32 333 ;; 334 stf.spill [r2]=f24,32 335 stf.spill [r3]=f25,32 336 ;; 337 stf.spill [r2]=f26,32 338 stf.spill [r3]=f27,32 339 ;; 340 stf.spill [r2]=f28,32 341 stf.spill [r3]=f29,32 342 ;; 343 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30) 344 stf.spill [r3]=f31,SW(PR)-SW(F31) 345 add r14=SW(CALLER_UNAT)+16,sp 346 ;; 347 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat 348 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat 349 mov r21=pr 350 ;; 351 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat 352 st8 [r3]=r21 // save predicate registers 353 ;; 354 st8 [r2]=r20 // save ar.bspstore 355 st8 [r14]=r18 // save fpsr 356 mov ar.rsc=3 // put RSE back into eager mode, pl 0 357 br.cond.sptk.many b7 358END(save_switch_stack) 359 360/* 361 * load_switch_stack: 362 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK) 363 * - b7 holds address to return to 364 * - must not touch r8-r11 365 */ 366GLOBAL_ENTRY(load_switch_stack) 367 .prologue 368 .altrp b7 369 370 .body 371 lfetch.fault.nt1 [sp] 372 adds r2=SW(AR_BSPSTORE)+16,sp 373 adds r3=SW(AR_UNAT)+16,sp 374 mov ar.rsc=0 // put RSE into enforced lazy mode 375 adds r14=SW(CALLER_UNAT)+16,sp 376 adds r15=SW(AR_FPSR)+16,sp 377 ;; 378 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore 379 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat 380 ;; 381 ld8 r21=[r2],16 // restore b0 382 ld8 r22=[r3],16 // restore b1 383 ;; 384 ld8 r23=[r2],16 // restore b2 385 ld8 r24=[r3],16 // restore b3 386 ;; 387 ld8 r25=[r2],16 // restore b4 388 ld8 r26=[r3],16 // restore b5 389 ;; 390 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs 391 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc 392 ;; 393 ld8 r28=[r2] // restore pr 394 ld8 r30=[r3] // restore rnat 395 ;; 396 ld8 r18=[r14],16 // restore caller's unat 397 ld8 r19=[r15],24 // restore fpsr 398 ;; 399 ldf.fill f2=[r14],32 400 ldf.fill f3=[r15],32 401 ;; 402 ldf.fill f4=[r14],32 403 ldf.fill f5=[r15],32 404 ;; 405 ldf.fill f12=[r14],32 406 ldf.fill f13=[r15],32 407 ;; 408 ldf.fill f14=[r14],32 409 ldf.fill f15=[r15],32 410 ;; 411 ldf.fill f16=[r14],32 412 ldf.fill f17=[r15],32 413 ;; 414 ldf.fill f18=[r14],32 415 ldf.fill f19=[r15],32 416 mov b0=r21 417 ;; 418 ldf.fill f20=[r14],32 419 ldf.fill f21=[r15],32 420 mov b1=r22 421 ;; 422 ldf.fill f22=[r14],32 423 ldf.fill f23=[r15],32 424 mov b2=r23 425 ;; 426 mov ar.bspstore=r27 427 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7 428 mov b3=r24 429 ;; 430 ldf.fill f24=[r14],32 431 ldf.fill f25=[r15],32 432 mov b4=r25 433 ;; 434 ldf.fill f26=[r14],32 435 ldf.fill f27=[r15],32 436 mov b5=r26 437 ;; 438 ldf.fill f28=[r14],32 439 ldf.fill f29=[r15],32 440 mov ar.pfs=r16 441 ;; 442 ldf.fill f30=[r14],32 443 ldf.fill f31=[r15],24 444 mov ar.lc=r17 445 ;; 446 ld8.fill r4=[r14],16 447 ld8.fill r5=[r15],16 448 mov pr=r28,-1 449 ;; 450 ld8.fill r6=[r14],16 451 ld8.fill r7=[r15],16 452 453 mov ar.unat=r18 // restore caller's unat 454 mov ar.rnat=r30 // must restore after bspstore but before rsc! 455 mov ar.fpsr=r19 // restore fpsr 456 mov ar.rsc=3 // put RSE back into eager mode, pl 0 457 br.cond.sptk.many b7 458END(load_switch_stack) 459 460GLOBAL_ENTRY(prefetch_stack) 461 add r14 = -IA64_SWITCH_STACK_SIZE, sp 462 add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0 463 ;; 464 ld8 r16 = [r15] // load next's stack pointer 465 lfetch.fault.excl [r14], 128 466 ;; 467 lfetch.fault.excl [r14], 128 468 lfetch.fault [r16], 128 469 ;; 470 lfetch.fault.excl [r14], 128 471 lfetch.fault [r16], 128 472 ;; 473 lfetch.fault.excl [r14], 128 474 lfetch.fault [r16], 128 475 ;; 476 lfetch.fault.excl [r14], 128 477 lfetch.fault [r16], 128 478 ;; 479 lfetch.fault [r16], 128 480 br.ret.sptk.many rp 481END(prefetch_stack) 482 483 /* 484 * Invoke a system call, but do some tracing before and after the call. 485 * We MUST preserve the current register frame throughout this routine 486 * because some system calls (such as ia64_execve) directly 487 * manipulate ar.pfs. 488 */ 489GLOBAL_ENTRY(ia64_trace_syscall) 490 PT_REGS_UNWIND_INFO(0) 491 /* 492 * We need to preserve the scratch registers f6-f11 in case the system 493 * call is sigreturn. 494 */ 495 adds r16=PT(F6)+16,sp 496 adds r17=PT(F7)+16,sp 497 ;; 498 stf.spill [r16]=f6,32 499 stf.spill [r17]=f7,32 500 ;; 501 stf.spill [r16]=f8,32 502 stf.spill [r17]=f9,32 503 ;; 504 stf.spill [r16]=f10 505 stf.spill [r17]=f11 506 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args 507 cmp.lt p6,p0=r8,r0 // check tracehook 508 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 509 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 510 mov r10=0 511(p6) br.cond.sptk strace_error // syscall failed -> 512 adds r16=PT(F6)+16,sp 513 adds r17=PT(F7)+16,sp 514 ;; 515 ldf.fill f6=[r16],32 516 ldf.fill f7=[r17],32 517 ;; 518 ldf.fill f8=[r16],32 519 ldf.fill f9=[r17],32 520 ;; 521 ldf.fill f10=[r16] 522 ldf.fill f11=[r17] 523 // the syscall number may have changed, so re-load it and re-calculate the 524 // syscall entry-point: 525 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #) 526 ;; 527 ld8 r15=[r15] 528 mov r3=NR_syscalls - 1 529 ;; 530 adds r15=-1024,r15 531 movl r16=sys_call_table 532 ;; 533 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024) 534 cmp.leu p6,p7=r15,r3 535 ;; 536(p6) ld8 r20=[r20] // load address of syscall entry point 537(p7) movl r20=sys_ni_syscall 538 ;; 539 mov b6=r20 540 br.call.sptk.many rp=b6 // do the syscall 541.strace_check_retval: 542 cmp.lt p6,p0=r8,r0 // syscall failed? 543 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 544 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 545 mov r10=0 546(p6) br.cond.sptk strace_error // syscall failed -> 547 ;; // avoid RAW on r10 548.strace_save_retval: 549.mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8 550.mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10 551 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value 552.ret3: 553(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk 554(pUStk) rsm psr.i // disable interrupts 555 br.cond.sptk ia64_work_pending_syscall_end 556 557strace_error: 558 ld8 r3=[r2] // load pt_regs.r8 559 sub r9=0,r8 // negate return value to get errno value 560 ;; 561 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0? 562 adds r3=16,r2 // r3=&pt_regs.r10 563 ;; 564(p6) mov r10=-1 565(p6) mov r8=r9 566 br.cond.sptk .strace_save_retval 567END(ia64_trace_syscall) 568 569 /* 570 * When traced and returning from sigreturn, we invoke syscall_trace but then 571 * go straight to ia64_leave_kernel rather than ia64_leave_syscall. 572 */ 573GLOBAL_ENTRY(ia64_strace_leave_kernel) 574 PT_REGS_UNWIND_INFO(0) 575{ /* 576 * Some versions of gas generate bad unwind info if the first instruction of a 577 * procedure doesn't go into the first slot of a bundle. This is a workaround. 578 */ 579 nop.m 0 580 nop.i 0 581 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value 582} 583.ret4: br.cond.sptk ia64_leave_kernel 584END(ia64_strace_leave_kernel) 585 586ENTRY(call_payload) 587 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0) 588 /* call the kernel_thread payload; fn is in r4, arg - in r5 */ 589 alloc loc1=ar.pfs,0,3,1,0 590 mov loc0=rp 591 mov loc2=gp 592 mov out0=r5 // arg 593 ld8 r14 = [r4], 8 // fn.address 594 ;; 595 mov b6 = r14 596 ld8 gp = [r4] // fn.gp 597 ;; 598 br.call.sptk.many rp=b6 // fn(arg) 599.ret12: mov gp=loc2 600 mov rp=loc0 601 mov ar.pfs=loc1 602 /* ... and if it has returned, we are going to userland */ 603 cmp.ne pKStk,pUStk=r0,r0 604 br.ret.sptk.many rp 605END(call_payload) 606 607GLOBAL_ENTRY(ia64_ret_from_clone) 608 PT_REGS_UNWIND_INFO(0) 609{ /* 610 * Some versions of gas generate bad unwind info if the first instruction of a 611 * procedure doesn't go into the first slot of a bundle. This is a workaround. 612 */ 613 nop.m 0 614 nop.i 0 615 /* 616 * We need to call schedule_tail() to complete the scheduling process. 617 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the 618 * address of the previously executing task. 619 */ 620 br.call.sptk.many rp=ia64_invoke_schedule_tail 621} 622.ret8: 623(pKStk) br.call.sptk.many rp=call_payload 624 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13 625 ;; 626 ld4 r2=[r2] 627 ;; 628 mov r8=0 629 and r2=_TIF_SYSCALL_TRACEAUDIT,r2 630 ;; 631 cmp.ne p6,p0=r2,r0 632(p6) br.cond.spnt .strace_check_retval 633 ;; // added stop bits to prevent r8 dependency 634END(ia64_ret_from_clone) 635 // fall through 636GLOBAL_ENTRY(ia64_ret_from_syscall) 637 PT_REGS_UNWIND_INFO(0) 638 cmp.ge p6,p7=r8,r0 // syscall executed successfully? 639 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 640 mov r10=r0 // clear error indication in r10 641(p7) br.cond.spnt handle_syscall_error // handle potential syscall failure 642#ifdef CONFIG_PARAVIRT 643 ;; 644 br.cond.sptk.few ia64_leave_syscall 645 ;; 646#endif /* CONFIG_PARAVIRT */ 647END(ia64_ret_from_syscall) 648#ifndef CONFIG_PARAVIRT 649 // fall through 650#endif 651#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 652 653/* 654 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't 655 * need to switch to bank 0 and doesn't restore the scratch registers. 656 * To avoid leaking kernel bits, the scratch registers are set to 657 * the following known-to-be-safe values: 658 * 659 * r1: restored (global pointer) 660 * r2: cleared 661 * r3: 1 (when returning to user-level) 662 * r8-r11: restored (syscall return value(s)) 663 * r12: restored (user-level stack pointer) 664 * r13: restored (user-level thread pointer) 665 * r14: set to __kernel_syscall_via_epc 666 * r15: restored (syscall #) 667 * r16-r17: cleared 668 * r18: user-level b6 669 * r19: cleared 670 * r20: user-level ar.fpsr 671 * r21: user-level b0 672 * r22: cleared 673 * r23: user-level ar.bspstore 674 * r24: user-level ar.rnat 675 * r25: user-level ar.unat 676 * r26: user-level ar.pfs 677 * r27: user-level ar.rsc 678 * r28: user-level ip 679 * r29: user-level psr 680 * r30: user-level cfm 681 * r31: user-level pr 682 * f6-f11: cleared 683 * pr: restored (user-level pr) 684 * b0: restored (user-level rp) 685 * b6: restored 686 * b7: set to __kernel_syscall_via_epc 687 * ar.unat: restored (user-level ar.unat) 688 * ar.pfs: restored (user-level ar.pfs) 689 * ar.rsc: restored (user-level ar.rsc) 690 * ar.rnat: restored (user-level ar.rnat) 691 * ar.bspstore: restored (user-level ar.bspstore) 692 * ar.fpsr: restored (user-level ar.fpsr) 693 * ar.ccv: cleared 694 * ar.csd: cleared 695 * ar.ssd: cleared 696 */ 697GLOBAL_ENTRY(__paravirt_leave_syscall) 698 PT_REGS_UNWIND_INFO(0) 699 /* 700 * work.need_resched etc. mustn't get changed by this CPU before it returns to 701 * user- or fsys-mode, hence we disable interrupts early on. 702 * 703 * p6 controls whether current_thread_info()->flags needs to be check for 704 * extra work. We always check for extra work when returning to user-level. 705 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count 706 * is 0. After extra work processing has been completed, execution 707 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check 708 * needs to be redone. 709 */ 710#ifdef CONFIG_PREEMPT 711 RSM_PSR_I(p0, r2, r18) // disable interrupts 712 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall 713(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 714 ;; 715 .pred.rel.mutex pUStk,pKStk 716(pKStk) ld4 r21=[r20] // r21 <- preempt_count 717(pUStk) mov r21=0 // r21 <- 0 718 ;; 719 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0) 720#else /* !CONFIG_PREEMPT */ 721 RSM_PSR_I(pUStk, r2, r18) 722 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall 723(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk 724#endif 725.global __paravirt_work_processed_syscall; 726__paravirt_work_processed_syscall: 727#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 728 adds r2=PT(LOADRS)+16,r12 729 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave 730 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 731 ;; 732(p6) ld4 r31=[r18] // load current_thread_info()->flags 733 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs" 734 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred 735 ;; 736#else 737 adds r2=PT(LOADRS)+16,r12 738 adds r3=PT(AR_BSPSTORE)+16,r12 739 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 740 ;; 741(p6) ld4 r31=[r18] // load current_thread_info()->flags 742 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs" 743 nop.i 0 744 ;; 745#endif 746 mov r16=ar.bsp // M2 get existing backing store pointer 747 ld8 r18=[r2],PT(R9)-PT(B6) // load b6 748(p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? 749 ;; 750 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage) 751(p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending? 752(p6) br.cond.spnt .work_pending_syscall 753 ;; 754 // start restoring the state saved on the kernel stack (struct pt_regs): 755 ld8 r9=[r2],PT(CR_IPSR)-PT(R9) 756 ld8 r11=[r3],PT(CR_IIP)-PT(R11) 757(pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE! 758 ;; 759 invala // M0|1 invalidate ALAT 760 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection 761 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs 762 763 ld8 r29=[r2],16 // M0|1 load cr.ipsr 764 ld8 r28=[r3],16 // M0|1 load cr.iip 765#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 766(pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13 767 ;; 768 ld8 r30=[r2],16 // M0|1 load cr.ifs 769 ld8 r25=[r3],16 // M0|1 load ar.unat 770(pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13 771 ;; 772#else 773 mov r22=r0 // A clear r22 774 ;; 775 ld8 r30=[r2],16 // M0|1 load cr.ifs 776 ld8 r25=[r3],16 // M0|1 load ar.unat 777(pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13 778 ;; 779#endif 780 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs 781 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled 782 nop 0 783 ;; 784 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0 785 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc 786 mov f6=f0 // F clear f6 787 ;; 788 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage) 789 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates 790 mov f7=f0 // F clear f7 791 ;; 792 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr 793 ld8.fill r1=[r3],16 // M0|1 load r1 794(pUStk) mov r17=1 // A 795 ;; 796#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 797(pUStk) st1 [r15]=r17 // M2|3 798#else 799(pUStk) st1 [r14]=r17 // M2|3 800#endif 801 ld8.fill r13=[r3],16 // M0|1 802 mov f8=f0 // F clear f8 803 ;; 804 ld8.fill r12=[r2] // M0|1 restore r12 (sp) 805 ld8.fill r15=[r3] // M0|1 restore r15 806 mov b6=r18 // I0 restore b6 807 808 LOAD_PHYS_STACK_REG_SIZE(r17) 809 mov f9=f0 // F clear f9 810(pKStk) br.cond.dpnt.many skip_rbs_switch // B 811 812 srlz.d // M0 ensure interruption collection is off (for cover) 813 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition 814 COVER // B add current frame into dirty partition & set cr.ifs 815 ;; 816#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 817 mov r19=ar.bsp // M2 get new backing store pointer 818 st8 [r14]=r22 // M save time at leave 819 mov f10=f0 // F clear f10 820 821 mov r22=r0 // A clear r22 822 movl r14=__kernel_syscall_via_epc // X 823 ;; 824#else 825 mov r19=ar.bsp // M2 get new backing store pointer 826 mov f10=f0 // F clear f10 827 828 nop.m 0 829 movl r14=__kernel_syscall_via_epc // X 830 ;; 831#endif 832 mov.m ar.csd=r0 // M2 clear ar.csd 833 mov.m ar.ccv=r0 // M2 clear ar.ccv 834 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc) 835 836 mov.m ar.ssd=r0 // M2 clear ar.ssd 837 mov f11=f0 // F clear f11 838 br.cond.sptk.many rbs_switch // B 839END(__paravirt_leave_syscall) 840 841GLOBAL_ENTRY(__paravirt_leave_kernel) 842 PT_REGS_UNWIND_INFO(0) 843 /* 844 * work.need_resched etc. mustn't get changed by this CPU before it returns to 845 * user- or fsys-mode, hence we disable interrupts early on. 846 * 847 * p6 controls whether current_thread_info()->flags needs to be check for 848 * extra work. We always check for extra work when returning to user-level. 849 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count 850 * is 0. After extra work processing has been completed, execution 851 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check 852 * needs to be redone. 853 */ 854#ifdef CONFIG_PREEMPT 855 RSM_PSR_I(p0, r17, r31) // disable interrupts 856 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel 857(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 858 ;; 859 .pred.rel.mutex pUStk,pKStk 860(pKStk) ld4 r21=[r20] // r21 <- preempt_count 861(pUStk) mov r21=0 // r21 <- 0 862 ;; 863 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0) 864#else 865 RSM_PSR_I(pUStk, r17, r31) 866 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel 867(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk 868#endif 869.work_processed_kernel: 870 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13 871 ;; 872(p6) ld4 r31=[r17] // load current_thread_info()->flags 873 adds r21=PT(PR)+16,r12 874 ;; 875 876 lfetch [r21],PT(CR_IPSR)-PT(PR) 877 adds r2=PT(B6)+16,r12 878 adds r3=PT(R16)+16,r12 879 ;; 880 lfetch [r21] 881 ld8 r28=[r2],8 // load b6 882 adds r29=PT(R24)+16,r12 883 884 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16) 885 adds r30=PT(AR_CCV)+16,r12 886(p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? 887 ;; 888 ld8.fill r24=[r29] 889 ld8 r15=[r30] // load ar.ccv 890(p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending? 891 ;; 892 ld8 r29=[r2],16 // load b7 893 ld8 r30=[r3],16 // load ar.csd 894(p6) br.cond.spnt .work_pending 895 ;; 896 ld8 r31=[r2],16 // load ar.ssd 897 ld8.fill r8=[r3],16 898 ;; 899 ld8.fill r9=[r2],16 900 ld8.fill r10=[r3],PT(R17)-PT(R10) 901 ;; 902 ld8.fill r11=[r2],PT(R18)-PT(R11) 903 ld8.fill r17=[r3],16 904 ;; 905 ld8.fill r18=[r2],16 906 ld8.fill r19=[r3],16 907 ;; 908 ld8.fill r20=[r2],16 909 ld8.fill r21=[r3],16 910 mov ar.csd=r30 911 mov ar.ssd=r31 912 ;; 913 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection 914 invala // invalidate ALAT 915 ;; 916 ld8.fill r22=[r2],24 917 ld8.fill r23=[r3],24 918 mov b6=r28 919 ;; 920 ld8.fill r25=[r2],16 921 ld8.fill r26=[r3],16 922 mov b7=r29 923 ;; 924 ld8.fill r27=[r2],16 925 ld8.fill r28=[r3],16 926 ;; 927 ld8.fill r29=[r2],16 928 ld8.fill r30=[r3],24 929 ;; 930 ld8.fill r31=[r2],PT(F9)-PT(R31) 931 adds r3=PT(F10)-PT(F6),r3 932 ;; 933 ldf.fill f9=[r2],PT(F6)-PT(F9) 934 ldf.fill f10=[r3],PT(F8)-PT(F10) 935 ;; 936 ldf.fill f6=[r2],PT(F7)-PT(F6) 937 ;; 938 ldf.fill f7=[r2],PT(F11)-PT(F7) 939 ldf.fill f8=[r3],32 940 ;; 941 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned) 942 mov ar.ccv=r15 943 ;; 944 ldf.fill f11=[r2] 945 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...) 946 ;; 947(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency) 948 adds r16=PT(CR_IPSR)+16,r12 949 adds r17=PT(CR_IIP)+16,r12 950 951#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 952 .pred.rel.mutex pUStk,pKStk 953 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled 954 MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave 955 nop.i 0 956 ;; 957#else 958 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled 959 nop.i 0 960 nop.i 0 961 ;; 962#endif 963 ld8 r29=[r16],16 // load cr.ipsr 964 ld8 r28=[r17],16 // load cr.iip 965 ;; 966 ld8 r30=[r16],16 // load cr.ifs 967 ld8 r25=[r17],16 // load ar.unat 968 ;; 969 ld8 r26=[r16],16 // load ar.pfs 970 ld8 r27=[r17],16 // load ar.rsc 971 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs 972 ;; 973 ld8 r24=[r16],16 // load ar.rnat (may be garbage) 974 ld8 r23=[r17],16 // load ar.bspstore (may be garbage) 975 ;; 976 ld8 r31=[r16],16 // load predicates 977 ld8 r21=[r17],16 // load b0 978 ;; 979 ld8 r19=[r16],16 // load ar.rsc value for "loadrs" 980 ld8.fill r1=[r17],16 // load r1 981 ;; 982 ld8.fill r12=[r16],16 983 ld8.fill r13=[r17],16 984#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 985(pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18 986#else 987(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 988#endif 989 ;; 990 ld8 r20=[r16],16 // ar.fpsr 991 ld8.fill r15=[r17],16 992#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 993(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred 994#endif 995 ;; 996 ld8.fill r14=[r16],16 997 ld8.fill r2=[r17] 998(pUStk) mov r17=1 999 ;; 1000#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 1001 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;; 1002 // mib : mov add br -> mib : ld8 add br 1003 // bbb_ : br nop cover;; mbb_ : mov br cover;; 1004 // 1005 // no one require bsp in r16 if (pKStk) branch is selected. 1006(pUStk) st8 [r3]=r22 // save time at leave 1007(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack 1008 shr.u r18=r19,16 // get byte size of existing "dirty" partition 1009 ;; 1010 ld8.fill r3=[r16] // deferred 1011 LOAD_PHYS_STACK_REG_SIZE(r17) 1012(pKStk) br.cond.dpnt skip_rbs_switch 1013 mov r16=ar.bsp // get existing backing store pointer 1014#else 1015 ld8.fill r3=[r16] 1016(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack 1017 shr.u r18=r19,16 // get byte size of existing "dirty" partition 1018 ;; 1019 mov r16=ar.bsp // get existing backing store pointer 1020 LOAD_PHYS_STACK_REG_SIZE(r17) 1021(pKStk) br.cond.dpnt skip_rbs_switch 1022#endif 1023 1024 /* 1025 * Restore user backing store. 1026 * 1027 * NOTE: alloc, loadrs, and cover can't be predicated. 1028 */ 1029(pNonSys) br.cond.dpnt dont_preserve_current_frame 1030 COVER // add current frame into dirty partition and set cr.ifs 1031 ;; 1032 mov r19=ar.bsp // get new backing store pointer 1033rbs_switch: 1034 sub r16=r16,r18 // krbs = old bsp - size of dirty partition 1035 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs 1036 ;; 1037 sub r19=r19,r16 // calculate total byte size of dirty partition 1038 add r18=64,r18 // don't force in0-in7 into memory... 1039 ;; 1040 shl r19=r19,16 // shift size of dirty partition into loadrs position 1041 ;; 1042dont_preserve_current_frame: 1043 /* 1044 * To prevent leaking bits between the kernel and user-space, 1045 * we must clear the stacked registers in the "invalid" partition here. 1046 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium, 1047 * 5 registers/cycle on McKinley). 1048 */ 1049# define pRecurse p6 1050# define pReturn p7 1051#ifdef CONFIG_ITANIUM 1052# define Nregs 10 1053#else 1054# define Nregs 14 1055#endif 1056 alloc loc0=ar.pfs,2,Nregs-2,2,0 1057 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8)) 1058 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize 1059 ;; 1060 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs" 1061 shladd in0=loc1,3,r17 1062 mov in1=0 1063 ;; 1064 TEXT_ALIGN(32) 1065rse_clear_invalid: 1066#ifdef CONFIG_ITANIUM 1067 // cycle 0 1068 { .mii 1069 alloc loc0=ar.pfs,2,Nregs-2,2,0 1070 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse 1071 add out0=-Nregs*8,in0 1072}{ .mfb 1073 add out1=1,in1 // increment recursion count 1074 nop.f 0 1075 nop.b 0 // can't do br.call here because of alloc (WAW on CFM) 1076 ;; 1077}{ .mfi // cycle 1 1078 mov loc1=0 1079 nop.f 0 1080 mov loc2=0 1081}{ .mib 1082 mov loc3=0 1083 mov loc4=0 1084(pRecurse) br.call.sptk.many b0=rse_clear_invalid 1085 1086}{ .mfi // cycle 2 1087 mov loc5=0 1088 nop.f 0 1089 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret 1090}{ .mib 1091 mov loc6=0 1092 mov loc7=0 1093(pReturn) br.ret.sptk.many b0 1094} 1095#else /* !CONFIG_ITANIUM */ 1096 alloc loc0=ar.pfs,2,Nregs-2,2,0 1097 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse 1098 add out0=-Nregs*8,in0 1099 add out1=1,in1 // increment recursion count 1100 mov loc1=0 1101 mov loc2=0 1102 ;; 1103 mov loc3=0 1104 mov loc4=0 1105 mov loc5=0 1106 mov loc6=0 1107 mov loc7=0 1108(pRecurse) br.call.dptk.few b0=rse_clear_invalid 1109 ;; 1110 mov loc8=0 1111 mov loc9=0 1112 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret 1113 mov loc10=0 1114 mov loc11=0 1115(pReturn) br.ret.dptk.many b0 1116#endif /* !CONFIG_ITANIUM */ 1117# undef pRecurse 1118# undef pReturn 1119 ;; 1120 alloc r17=ar.pfs,0,0,0,0 // drop current register frame 1121 ;; 1122 loadrs 1123 ;; 1124skip_rbs_switch: 1125 mov ar.unat=r25 // M2 1126(pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22 1127(pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise 1128 ;; 1129(pUStk) mov ar.bspstore=r23 // M2 1130(pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp 1131(pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise 1132 ;; 1133 MOV_TO_IPSR(p0, r29, r25) // M2 1134 mov ar.pfs=r26 // I0 1135(pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise 1136 1137 MOV_TO_IFS(p9, r30, r25)// M2 1138 mov b0=r21 // I0 1139(pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise 1140 1141 mov ar.fpsr=r20 // M2 1142 MOV_TO_IIP(r28, r25) // M2 1143 nop 0 1144 ;; 1145(pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode 1146 nop 0 1147(pLvSys)mov r2=r0 1148 1149 mov ar.rsc=r27 // M2 1150 mov pr=r31,-1 // I0 1151 RFI // B 1152 1153 /* 1154 * On entry: 1155 * r20 = ¤t->thread_info->pre_count (if CONFIG_PREEMPT) 1156 * r31 = current->thread_info->flags 1157 * On exit: 1158 * p6 = TRUE if work-pending-check needs to be redone 1159 * 1160 * Interrupts are disabled on entry, reenabled depend on work, and 1161 * disabled on exit. 1162 */ 1163.work_pending_syscall: 1164 add r2=-8,r2 1165 add r3=-8,r3 1166 ;; 1167 st8 [r2]=r8 1168 st8 [r3]=r10 1169.work_pending: 1170 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed? 1171(p6) br.cond.sptk.few .notify 1172 br.call.spnt.many rp=preempt_schedule_irq 1173.ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check) 1174(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end 1175 br.cond.sptk.many .work_processed_kernel 1176 1177.notify: 1178(pUStk) br.call.spnt.many rp=notify_resume_user 1179.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check) 1180(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end 1181 br.cond.sptk.many .work_processed_kernel 1182 1183.global __paravirt_pending_syscall_end; 1184__paravirt_pending_syscall_end: 1185 adds r2=PT(R8)+16,r12 1186 adds r3=PT(R10)+16,r12 1187 ;; 1188 ld8 r8=[r2] 1189 ld8 r10=[r3] 1190 br.cond.sptk.many __paravirt_work_processed_syscall_target 1191END(__paravirt_leave_kernel) 1192 1193#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE 1194ENTRY(handle_syscall_error) 1195 /* 1196 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could 1197 * lead us to mistake a negative return value as a failed syscall. Those syscall 1198 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If 1199 * pt_regs.r8 is zero, we assume that the call completed successfully. 1200 */ 1201 PT_REGS_UNWIND_INFO(0) 1202 ld8 r3=[r2] // load pt_regs.r8 1203 ;; 1204 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0? 1205 ;; 1206(p7) mov r10=-1 1207(p7) sub r8=0,r8 // negate return value to get errno 1208 br.cond.sptk ia64_leave_syscall 1209END(handle_syscall_error) 1210 1211 /* 1212 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed 1213 * in case a system call gets restarted. 1214 */ 1215GLOBAL_ENTRY(ia64_invoke_schedule_tail) 1216 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 1217 alloc loc1=ar.pfs,8,2,1,0 1218 mov loc0=rp 1219 mov out0=r8 // Address of previous task 1220 ;; 1221 br.call.sptk.many rp=schedule_tail 1222.ret11: mov ar.pfs=loc1 1223 mov rp=loc0 1224 br.ret.sptk.many rp 1225END(ia64_invoke_schedule_tail) 1226 1227 /* 1228 * Setup stack and call do_notify_resume_user(), keeping interrupts 1229 * disabled. 1230 * 1231 * Note that pSys and pNonSys need to be set up by the caller. 1232 * We declare 8 input registers so the system call args get preserved, 1233 * in case we need to restart a system call. 1234 */ 1235GLOBAL_ENTRY(notify_resume_user) 1236 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 1237 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart! 1238 mov r9=ar.unat 1239 mov loc0=rp // save return address 1240 mov out0=0 // there is no "oldset" 1241 adds out1=8,sp // out1=&sigscratch->ar_pfs 1242(pSys) mov out2=1 // out2==1 => we're in a syscall 1243 ;; 1244(pNonSys) mov out2=0 // out2==0 => not a syscall 1245 .fframe 16 1246 .spillsp ar.unat, 16 1247 st8 [sp]=r9,-16 // allocate space for ar.unat and save it 1248 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch 1249 .body 1250 br.call.sptk.many rp=do_notify_resume_user 1251.ret15: .restore sp 1252 adds sp=16,sp // pop scratch stack space 1253 ;; 1254 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat 1255 mov rp=loc0 1256 ;; 1257 mov ar.unat=r9 1258 mov ar.pfs=loc1 1259 br.ret.sptk.many rp 1260END(notify_resume_user) 1261 1262ENTRY(sys_rt_sigreturn) 1263 PT_REGS_UNWIND_INFO(0) 1264 /* 1265 * Allocate 8 input registers since ptrace() may clobber them 1266 */ 1267 alloc r2=ar.pfs,8,0,1,0 1268 .prologue 1269 PT_REGS_SAVES(16) 1270 adds sp=-16,sp 1271 .body 1272 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall... 1273 ;; 1274 /* 1275 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined 1276 * syscall-entry path does not save them we save them here instead. Note: we 1277 * don't need to save any other registers that are not saved by the stream-lined 1278 * syscall path, because restore_sigcontext() restores them. 1279 */ 1280 adds r16=PT(F6)+32,sp 1281 adds r17=PT(F7)+32,sp 1282 ;; 1283 stf.spill [r16]=f6,32 1284 stf.spill [r17]=f7,32 1285 ;; 1286 stf.spill [r16]=f8,32 1287 stf.spill [r17]=f9,32 1288 ;; 1289 stf.spill [r16]=f10 1290 stf.spill [r17]=f11 1291 adds out0=16,sp // out0 = &sigscratch 1292 br.call.sptk.many rp=ia64_rt_sigreturn 1293.ret19: .restore sp,0 1294 adds sp=16,sp 1295 ;; 1296 ld8 r9=[sp] // load new ar.unat 1297 mov.sptk b7=r8,ia64_native_leave_kernel 1298 ;; 1299 mov ar.unat=r9 1300 br.many b7 1301END(sys_rt_sigreturn) 1302 1303GLOBAL_ENTRY(ia64_prepare_handle_unaligned) 1304 .prologue 1305 /* 1306 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0 1307 */ 1308 mov r16=r0 1309 DO_SAVE_SWITCH_STACK 1310 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt 1311.ret21: .body 1312 DO_LOAD_SWITCH_STACK 1313 br.cond.sptk.many rp // goes to ia64_leave_kernel 1314END(ia64_prepare_handle_unaligned) 1315 1316 // 1317 // unw_init_running(void (*callback)(info, arg), void *arg) 1318 // 1319# define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15) 1320 1321GLOBAL_ENTRY(unw_init_running) 1322 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) 1323 alloc loc1=ar.pfs,2,3,3,0 1324 ;; 1325 ld8 loc2=[in0],8 1326 mov loc0=rp 1327 mov r16=loc1 1328 DO_SAVE_SWITCH_STACK 1329 .body 1330 1331 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) 1332 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE 1333 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE) 1334 adds sp=-EXTRA_FRAME_SIZE,sp 1335 .body 1336 ;; 1337 adds out0=16,sp // &info 1338 mov out1=r13 // current 1339 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack 1340 br.call.sptk.many rp=unw_init_frame_info 13411: adds out0=16,sp // &info 1342 mov b6=loc2 1343 mov loc2=gp // save gp across indirect function call 1344 ;; 1345 ld8 gp=[in0] 1346 mov out1=in1 // arg 1347 br.call.sptk.many rp=b6 // invoke the callback function 13481: mov gp=loc2 // restore gp 1349 1350 // For now, we don't allow changing registers from within 1351 // unw_init_running; if we ever want to allow that, we'd 1352 // have to do a load_switch_stack here: 1353 .restore sp 1354 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp 1355 1356 mov ar.pfs=loc1 1357 mov rp=loc0 1358 br.ret.sptk.many rp 1359END(unw_init_running) 1360 1361#ifdef CONFIG_FUNCTION_TRACER 1362#ifdef CONFIG_DYNAMIC_FTRACE 1363GLOBAL_ENTRY(_mcount) 1364 br ftrace_stub 1365END(_mcount) 1366 1367.here: 1368 br.ret.sptk.many b0 1369 1370GLOBAL_ENTRY(ftrace_caller) 1371 alloc out0 = ar.pfs, 8, 0, 4, 0 1372 mov out3 = r0 1373 ;; 1374 mov out2 = b0 1375 add r3 = 0x20, r3 1376 mov out1 = r1; 1377 br.call.sptk.many b0 = ftrace_patch_gp 1378 //this might be called from module, so we must patch gp 1379ftrace_patch_gp: 1380 movl gp=__gp 1381 mov b0 = r3 1382 ;; 1383.global ftrace_call; 1384ftrace_call: 1385{ 1386 .mlx 1387 nop.m 0x0 1388 movl r3 = .here;; 1389} 1390 alloc loc0 = ar.pfs, 4, 4, 2, 0 1391 ;; 1392 mov loc1 = b0 1393 mov out0 = b0 1394 mov loc2 = r8 1395 mov loc3 = r15 1396 ;; 1397 adds out0 = -MCOUNT_INSN_SIZE, out0 1398 mov out1 = in2 1399 mov b6 = r3 1400 1401 br.call.sptk.many b0 = b6 1402 ;; 1403 mov ar.pfs = loc0 1404 mov b0 = loc1 1405 mov r8 = loc2 1406 mov r15 = loc3 1407 br ftrace_stub 1408 ;; 1409END(ftrace_caller) 1410 1411#else 1412GLOBAL_ENTRY(_mcount) 1413 movl r2 = ftrace_stub 1414 movl r3 = ftrace_trace_function;; 1415 ld8 r3 = [r3];; 1416 ld8 r3 = [r3];; 1417 cmp.eq p7,p0 = r2, r3 1418(p7) br.sptk.many ftrace_stub 1419 ;; 1420 1421 alloc loc0 = ar.pfs, 4, 4, 2, 0 1422 ;; 1423 mov loc1 = b0 1424 mov out0 = b0 1425 mov loc2 = r8 1426 mov loc3 = r15 1427 ;; 1428 adds out0 = -MCOUNT_INSN_SIZE, out0 1429 mov out1 = in2 1430 mov b6 = r3 1431 1432 br.call.sptk.many b0 = b6 1433 ;; 1434 mov ar.pfs = loc0 1435 mov b0 = loc1 1436 mov r8 = loc2 1437 mov r15 = loc3 1438 br ftrace_stub 1439 ;; 1440END(_mcount) 1441#endif 1442 1443GLOBAL_ENTRY(ftrace_stub) 1444 mov r3 = b0 1445 movl r2 = _mcount_ret_helper 1446 ;; 1447 mov b6 = r2 1448 mov b7 = r3 1449 br.ret.sptk.many b6 1450 1451_mcount_ret_helper: 1452 mov b0 = r42 1453 mov r1 = r41 1454 mov ar.pfs = r40 1455 br b7 1456END(ftrace_stub) 1457 1458#endif /* CONFIG_FUNCTION_TRACER */ 1459 1460 .rodata 1461 .align 8 1462 .globl sys_call_table 1463sys_call_table: 1464 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S. 1465 data8 sys_exit // 1025 1466 data8 sys_read 1467 data8 sys_write 1468 data8 sys_open 1469 data8 sys_close 1470 data8 sys_creat // 1030 1471 data8 sys_link 1472 data8 sys_unlink 1473 data8 ia64_execve 1474 data8 sys_chdir 1475 data8 sys_fchdir // 1035 1476 data8 sys_utimes 1477 data8 sys_mknod 1478 data8 sys_chmod 1479 data8 sys_chown 1480 data8 sys_lseek // 1040 1481 data8 sys_getpid 1482 data8 sys_getppid 1483 data8 sys_mount 1484 data8 sys_umount 1485 data8 sys_setuid // 1045 1486 data8 sys_getuid 1487 data8 sys_geteuid 1488 data8 sys_ptrace 1489 data8 sys_access 1490 data8 sys_sync // 1050 1491 data8 sys_fsync 1492 data8 sys_fdatasync 1493 data8 sys_kill 1494 data8 sys_rename 1495 data8 sys_mkdir // 1055 1496 data8 sys_rmdir 1497 data8 sys_dup 1498 data8 sys_ia64_pipe 1499 data8 sys_times 1500 data8 ia64_brk // 1060 1501 data8 sys_setgid 1502 data8 sys_getgid 1503 data8 sys_getegid 1504 data8 sys_acct 1505 data8 sys_ioctl // 1065 1506 data8 sys_fcntl 1507 data8 sys_umask 1508 data8 sys_chroot 1509 data8 sys_ustat 1510 data8 sys_dup2 // 1070 1511 data8 sys_setreuid 1512 data8 sys_setregid 1513 data8 sys_getresuid 1514 data8 sys_setresuid 1515 data8 sys_getresgid // 1075 1516 data8 sys_setresgid 1517 data8 sys_getgroups 1518 data8 sys_setgroups 1519 data8 sys_getpgid 1520 data8 sys_setpgid // 1080 1521 data8 sys_setsid 1522 data8 sys_getsid 1523 data8 sys_sethostname 1524 data8 sys_setrlimit 1525 data8 sys_getrlimit // 1085 1526 data8 sys_getrusage 1527 data8 sys_gettimeofday 1528 data8 sys_settimeofday 1529 data8 sys_select 1530 data8 sys_poll // 1090 1531 data8 sys_symlink 1532 data8 sys_readlink 1533 data8 sys_uselib 1534 data8 sys_swapon 1535 data8 sys_swapoff // 1095 1536 data8 sys_reboot 1537 data8 sys_truncate 1538 data8 sys_ftruncate 1539 data8 sys_fchmod 1540 data8 sys_fchown // 1100 1541 data8 ia64_getpriority 1542 data8 sys_setpriority 1543 data8 sys_statfs 1544 data8 sys_fstatfs 1545 data8 sys_gettid // 1105 1546 data8 sys_semget 1547 data8 sys_semop 1548 data8 sys_semctl 1549 data8 sys_msgget 1550 data8 sys_msgsnd // 1110 1551 data8 sys_msgrcv 1552 data8 sys_msgctl 1553 data8 sys_shmget 1554 data8 sys_shmat 1555 data8 sys_shmdt // 1115 1556 data8 sys_shmctl 1557 data8 sys_syslog 1558 data8 sys_setitimer 1559 data8 sys_getitimer 1560 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */ 1561 data8 sys_ni_syscall /* was: ia64_oldlstat */ 1562 data8 sys_ni_syscall /* was: ia64_oldfstat */ 1563 data8 sys_vhangup 1564 data8 sys_lchown 1565 data8 sys_remap_file_pages // 1125 1566 data8 sys_wait4 1567 data8 sys_sysinfo 1568 data8 sys_clone 1569 data8 sys_setdomainname 1570 data8 sys_newuname // 1130 1571 data8 sys_adjtimex 1572 data8 sys_ni_syscall /* was: ia64_create_module */ 1573 data8 sys_init_module 1574 data8 sys_delete_module 1575 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */ 1576 data8 sys_ni_syscall /* was: sys_query_module */ 1577 data8 sys_quotactl 1578 data8 sys_bdflush 1579 data8 sys_sysfs 1580 data8 sys_personality // 1140 1581 data8 sys_ni_syscall // sys_afs_syscall 1582 data8 sys_setfsuid 1583 data8 sys_setfsgid 1584 data8 sys_getdents 1585 data8 sys_flock // 1145 1586 data8 sys_readv 1587 data8 sys_writev 1588 data8 sys_pread64 1589 data8 sys_pwrite64 1590 data8 sys_sysctl // 1150 1591 data8 sys_mmap 1592 data8 sys_munmap 1593 data8 sys_mlock 1594 data8 sys_mlockall 1595 data8 sys_mprotect // 1155 1596 data8 ia64_mremap 1597 data8 sys_msync 1598 data8 sys_munlock 1599 data8 sys_munlockall 1600 data8 sys_sched_getparam // 1160 1601 data8 sys_sched_setparam 1602 data8 sys_sched_getscheduler 1603 data8 sys_sched_setscheduler 1604 data8 sys_sched_yield 1605 data8 sys_sched_get_priority_max // 1165 1606 data8 sys_sched_get_priority_min 1607 data8 sys_sched_rr_get_interval 1608 data8 sys_nanosleep 1609 data8 sys_ni_syscall // old nfsservctl 1610 data8 sys_prctl // 1170 1611 data8 sys_getpagesize 1612 data8 sys_mmap2 1613 data8 sys_pciconfig_read 1614 data8 sys_pciconfig_write 1615 data8 sys_perfmonctl // 1175 1616 data8 sys_sigaltstack 1617 data8 sys_rt_sigaction 1618 data8 sys_rt_sigpending 1619 data8 sys_rt_sigprocmask 1620 data8 sys_rt_sigqueueinfo // 1180 1621 data8 sys_rt_sigreturn 1622 data8 sys_rt_sigsuspend 1623 data8 sys_rt_sigtimedwait 1624 data8 sys_getcwd 1625 data8 sys_capget // 1185 1626 data8 sys_capset 1627 data8 sys_sendfile64 1628 data8 sys_ni_syscall // sys_getpmsg (STREAMS) 1629 data8 sys_ni_syscall // sys_putpmsg (STREAMS) 1630 data8 sys_socket // 1190 1631 data8 sys_bind 1632 data8 sys_connect 1633 data8 sys_listen 1634 data8 sys_accept 1635 data8 sys_getsockname // 1195 1636 data8 sys_getpeername 1637 data8 sys_socketpair 1638 data8 sys_send 1639 data8 sys_sendto 1640 data8 sys_recv // 1200 1641 data8 sys_recvfrom 1642 data8 sys_shutdown 1643 data8 sys_setsockopt 1644 data8 sys_getsockopt 1645 data8 sys_sendmsg // 1205 1646 data8 sys_recvmsg 1647 data8 sys_pivot_root 1648 data8 sys_mincore 1649 data8 sys_madvise 1650 data8 sys_newstat // 1210 1651 data8 sys_newlstat 1652 data8 sys_newfstat 1653 data8 sys_clone2 1654 data8 sys_getdents64 1655 data8 sys_getunwind // 1215 1656 data8 sys_readahead 1657 data8 sys_setxattr 1658 data8 sys_lsetxattr 1659 data8 sys_fsetxattr 1660 data8 sys_getxattr // 1220 1661 data8 sys_lgetxattr 1662 data8 sys_fgetxattr 1663 data8 sys_listxattr 1664 data8 sys_llistxattr 1665 data8 sys_flistxattr // 1225 1666 data8 sys_removexattr 1667 data8 sys_lremovexattr 1668 data8 sys_fremovexattr 1669 data8 sys_tkill 1670 data8 sys_futex // 1230 1671 data8 sys_sched_setaffinity 1672 data8 sys_sched_getaffinity 1673 data8 sys_set_tid_address 1674 data8 sys_fadvise64_64 1675 data8 sys_tgkill // 1235 1676 data8 sys_exit_group 1677 data8 sys_lookup_dcookie 1678 data8 sys_io_setup 1679 data8 sys_io_destroy 1680 data8 sys_io_getevents // 1240 1681 data8 sys_io_submit 1682 data8 sys_io_cancel 1683 data8 sys_epoll_create 1684 data8 sys_epoll_ctl 1685 data8 sys_epoll_wait // 1245 1686 data8 sys_restart_syscall 1687 data8 sys_semtimedop 1688 data8 sys_timer_create 1689 data8 sys_timer_settime 1690 data8 sys_timer_gettime // 1250 1691 data8 sys_timer_getoverrun 1692 data8 sys_timer_delete 1693 data8 sys_clock_settime 1694 data8 sys_clock_gettime 1695 data8 sys_clock_getres // 1255 1696 data8 sys_clock_nanosleep 1697 data8 sys_fstatfs64 1698 data8 sys_statfs64 1699 data8 sys_mbind 1700 data8 sys_get_mempolicy // 1260 1701 data8 sys_set_mempolicy 1702 data8 sys_mq_open 1703 data8 sys_mq_unlink 1704 data8 sys_mq_timedsend 1705 data8 sys_mq_timedreceive // 1265 1706 data8 sys_mq_notify 1707 data8 sys_mq_getsetattr 1708 data8 sys_kexec_load 1709 data8 sys_ni_syscall // reserved for vserver 1710 data8 sys_waitid // 1270 1711 data8 sys_add_key 1712 data8 sys_request_key 1713 data8 sys_keyctl 1714 data8 sys_ioprio_set 1715 data8 sys_ioprio_get // 1275 1716 data8 sys_move_pages 1717 data8 sys_inotify_init 1718 data8 sys_inotify_add_watch 1719 data8 sys_inotify_rm_watch 1720 data8 sys_migrate_pages // 1280 1721 data8 sys_openat 1722 data8 sys_mkdirat 1723 data8 sys_mknodat 1724 data8 sys_fchownat 1725 data8 sys_futimesat // 1285 1726 data8 sys_newfstatat 1727 data8 sys_unlinkat 1728 data8 sys_renameat 1729 data8 sys_linkat 1730 data8 sys_symlinkat // 1290 1731 data8 sys_readlinkat 1732 data8 sys_fchmodat 1733 data8 sys_faccessat 1734 data8 sys_pselect6 1735 data8 sys_ppoll // 1295 1736 data8 sys_unshare 1737 data8 sys_splice 1738 data8 sys_set_robust_list 1739 data8 sys_get_robust_list 1740 data8 sys_sync_file_range // 1300 1741 data8 sys_tee 1742 data8 sys_vmsplice 1743 data8 sys_fallocate 1744 data8 sys_getcpu 1745 data8 sys_epoll_pwait // 1305 1746 data8 sys_utimensat 1747 data8 sys_signalfd 1748 data8 sys_ni_syscall 1749 data8 sys_eventfd 1750 data8 sys_timerfd_create // 1310 1751 data8 sys_timerfd_settime 1752 data8 sys_timerfd_gettime 1753 data8 sys_signalfd4 1754 data8 sys_eventfd2 1755 data8 sys_epoll_create1 // 1315 1756 data8 sys_dup3 1757 data8 sys_pipe2 1758 data8 sys_inotify_init1 1759 data8 sys_preadv 1760 data8 sys_pwritev // 1320 1761 data8 sys_rt_tgsigqueueinfo 1762 data8 sys_recvmmsg 1763 data8 sys_fanotify_init 1764 data8 sys_fanotify_mark 1765 data8 sys_prlimit64 // 1325 1766 data8 sys_name_to_handle_at 1767 data8 sys_open_by_handle_at 1768 data8 sys_clock_adjtime 1769 data8 sys_syncfs 1770 data8 sys_setns // 1330 1771 data8 sys_sendmmsg 1772 data8 sys_process_vm_readv 1773 data8 sys_process_vm_writev 1774 data8 sys_accept4 1775 data8 sys_finit_module // 1335 1776 data8 sys_sched_setattr 1777 data8 sys_sched_getattr 1778 data8 sys_renameat2 1779 data8 sys_getrandom 1780 data8 sys_memfd_create // 1340 1781 data8 sys_bpf 1782 data8 sys_execveat 1783 1784 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1785#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ 1786