1/* 2 * arch/ia64/kernel/entry.S 3 * 4 * Kernel entry points. 5 * 6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co 7 * David Mosberger-Tang <davidm@hpl.hp.com> 8 * Copyright (C) 1999, 2002-2003 9 * Asit Mallick <Asit.K.Mallick@intel.com> 10 * Don Dugger <Don.Dugger@intel.com> 11 * Suresh Siddha <suresh.b.siddha@intel.com> 12 * Fenghua Yu <fenghua.yu@intel.com> 13 * Copyright (C) 1999 VA Linux Systems 14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> 15 */ 16/* 17 * ia64_switch_to now places correct virtual mapping in in TR2 for 18 * kernel stack. This allows us to handle interrupts without changing 19 * to physical mode. 20 * 21 * Jonathan Nicklin <nicklin@missioncriticallinux.com> 22 * Patrick O'Rourke <orourke@missioncriticallinux.com> 23 * 11/07/2000 24 */ 25/* 26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp> 27 * VA Linux Systems Japan K.K. 28 * pv_ops. 29 */ 30/* 31 * Global (preserved) predicate usage on syscall entry/exit path: 32 * 33 * pKStk: See entry.h. 34 * pUStk: See entry.h. 35 * pSys: See entry.h. 36 * pNonSys: !pSys 37 */ 38 39 40#include <asm/asmmacro.h> 41#include <asm/cache.h> 42#include <asm/errno.h> 43#include <asm/kregs.h> 44#include <asm/asm-offsets.h> 45#include <asm/pgtable.h> 46#include <asm/percpu.h> 47#include <asm/processor.h> 48#include <asm/thread_info.h> 49#include <asm/unistd.h> 50#include <asm/ftrace.h> 51#include <asm/export.h> 52 53#include "minstate.h" 54 55 /* 56 * execve() is special because in case of success, we need to 57 * setup a null register window frame. 58 */ 59ENTRY(ia64_execve) 60 /* 61 * Allocate 8 input registers since ptrace() may clobber them 62 */ 63 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 64 alloc loc1=ar.pfs,8,2,3,0 65 mov loc0=rp 66 .body 67 mov out0=in0 // filename 68 ;; // stop bit between alloc and call 69 mov out1=in1 // argv 70 mov out2=in2 // envp 71 br.call.sptk.many rp=sys_execve 72.ret0: 73 cmp4.ge p6,p7=r8,r0 74 mov ar.pfs=loc1 // restore ar.pfs 75 sxt4 r8=r8 // return 64-bit result 76 ;; 77 stf.spill [sp]=f0 78 mov rp=loc0 79(p6) mov ar.pfs=r0 // clear ar.pfs on success 80(p7) br.ret.sptk.many rp 81 82 /* 83 * In theory, we'd have to zap this state only to prevent leaking of 84 * security sensitive state (e.g., if current->mm->dumpable is zero). However, 85 * this executes in less than 20 cycles even on Itanium, so it's not worth 86 * optimizing for...). 87 */ 88 mov ar.unat=0; mov ar.lc=0 89 mov r4=0; mov f2=f0; mov b1=r0 90 mov r5=0; mov f3=f0; mov b2=r0 91 mov r6=0; mov f4=f0; mov b3=r0 92 mov r7=0; mov f5=f0; mov b4=r0 93 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0 94 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0 95 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0 96 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0 97 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0 98 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0 99 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0 100 br.ret.sptk.many rp 101END(ia64_execve) 102 103/* 104 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr, 105 * u64 tls) 106 */ 107GLOBAL_ENTRY(sys_clone2) 108 /* 109 * Allocate 8 input registers since ptrace() may clobber them 110 */ 111 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 112 alloc r16=ar.pfs,8,2,6,0 113 DO_SAVE_SWITCH_STACK 114 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp 115 mov loc0=rp 116 mov loc1=r16 // save ar.pfs across do_fork 117 .body 118 mov out1=in1 119 mov out2=in2 120 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT 121 mov out3=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID 122 ;; 123(p6) st8 [r2]=in5 // store TLS in r16 for copy_thread() 124 mov out4=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID 125 mov out0=in0 // out0 = clone_flags 126 br.call.sptk.many rp=do_fork 127.ret1: .restore sp 128 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack 129 mov ar.pfs=loc1 130 mov rp=loc0 131 br.ret.sptk.many rp 132END(sys_clone2) 133 134/* 135 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls) 136 * Deprecated. Use sys_clone2() instead. 137 */ 138GLOBAL_ENTRY(sys_clone) 139 /* 140 * Allocate 8 input registers since ptrace() may clobber them 141 */ 142 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 143 alloc r16=ar.pfs,8,2,6,0 144 DO_SAVE_SWITCH_STACK 145 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp 146 mov loc0=rp 147 mov loc1=r16 // save ar.pfs across do_fork 148 .body 149 mov out1=in1 150 mov out2=16 // stacksize (compensates for 16-byte scratch area) 151 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT 152 mov out3=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID 153 ;; 154(p6) st8 [r2]=in4 // store TLS in r13 (tp) 155 mov out4=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID 156 mov out0=in0 // out0 = clone_flags 157 br.call.sptk.many rp=do_fork 158.ret2: .restore sp 159 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack 160 mov ar.pfs=loc1 161 mov rp=loc0 162 br.ret.sptk.many rp 163END(sys_clone) 164 165/* 166 * prev_task <- ia64_switch_to(struct task_struct *next) 167 * With Ingo's new scheduler, interrupts are disabled when this routine gets 168 * called. The code starting at .map relies on this. The rest of the code 169 * doesn't care about the interrupt masking status. 170 */ 171GLOBAL_ENTRY(ia64_switch_to) 172 .prologue 173 alloc r16=ar.pfs,1,0,0,0 174 DO_SAVE_SWITCH_STACK 175 .body 176 177 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13 178 movl r25=init_task 179 mov r27=IA64_KR(CURRENT_STACK) 180 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0 181 dep r20=0,in0,61,3 // physical address of "next" 182 ;; 183 st8 [r22]=sp // save kernel stack pointer of old task 184 shr.u r26=r20,IA64_GRANULE_SHIFT 185 cmp.eq p7,p6=r25,in0 186 ;; 187 /* 188 * If we've already mapped this task's page, we can skip doing it again. 189 */ 190(p6) cmp.eq p7,p6=r26,r27 191(p6) br.cond.dpnt .map 192 ;; 193.done: 194 ld8 sp=[r21] // load kernel stack pointer of new task 195 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register 196 mov r8=r13 // return pointer to previously running task 197 mov r13=in0 // set "current" pointer 198 ;; 199 DO_LOAD_SWITCH_STACK 200 201#ifdef CONFIG_SMP 202 sync.i // ensure "fc"s done by this CPU are visible on other CPUs 203#endif 204 br.ret.sptk.many rp // boogie on out in new context 205 206.map: 207 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here 208 movl r25=PAGE_KERNEL 209 ;; 210 srlz.d 211 or r23=r25,r20 // construct PA | page properties 212 mov r25=IA64_GRANULE_SHIFT<<2 213 ;; 214 MOV_TO_ITIR(p0, r25, r8) 215 MOV_TO_IFA(in0, r8) // VA of next task... 216 ;; 217 mov r25=IA64_TR_CURRENT_STACK 218 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped... 219 ;; 220 itr.d dtr[r25]=r23 // wire in new mapping... 221 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit 222 br.cond.sptk .done 223END(ia64_switch_to) 224 225/* 226 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This 227 * means that we may get an interrupt with "sp" pointing to the new kernel stack while 228 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc, 229 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a 230 * problem. Also, we don't need to specify unwind information for preserved registers 231 * that are not modified in save_switch_stack as the right unwind information is already 232 * specified at the call-site of save_switch_stack. 233 */ 234 235/* 236 * save_switch_stack: 237 * - r16 holds ar.pfs 238 * - b7 holds address to return to 239 * - rp (b0) holds return address to save 240 */ 241GLOBAL_ENTRY(save_switch_stack) 242 .prologue 243 .altrp b7 244 flushrs // flush dirty regs to backing store (must be first in insn group) 245 .save @priunat,r17 246 mov r17=ar.unat // preserve caller's 247 .body 248#ifdef CONFIG_ITANIUM 249 adds r2=16+128,sp 250 adds r3=16+64,sp 251 adds r14=SW(R4)+16,sp 252 ;; 253 st8.spill [r14]=r4,16 // spill r4 254 lfetch.fault.excl.nt1 [r3],128 255 ;; 256 lfetch.fault.excl.nt1 [r2],128 257 lfetch.fault.excl.nt1 [r3],128 258 ;; 259 lfetch.fault.excl [r2] 260 lfetch.fault.excl [r3] 261 adds r15=SW(R5)+16,sp 262#else 263 add r2=16+3*128,sp 264 add r3=16,sp 265 add r14=SW(R4)+16,sp 266 ;; 267 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0 268 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010 269 ;; 270 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090 271 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190 272 ;; 273 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110 274 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210 275 adds r15=SW(R5)+16,sp 276#endif 277 ;; 278 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5 279 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0 280 add r2=SW(F2)+16,sp // r2 = &sw->f2 281 ;; 282 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6 283 mov.m r18=ar.fpsr // preserve fpsr 284 add r3=SW(F3)+16,sp // r3 = &sw->f3 285 ;; 286 stf.spill [r2]=f2,32 287 mov.m r19=ar.rnat 288 mov r21=b0 289 290 stf.spill [r3]=f3,32 291 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7 292 mov r22=b1 293 ;; 294 // since we're done with the spills, read and save ar.unat: 295 mov.m r29=ar.unat 296 mov.m r20=ar.bspstore 297 mov r23=b2 298 stf.spill [r2]=f4,32 299 stf.spill [r3]=f5,32 300 mov r24=b3 301 ;; 302 st8 [r14]=r21,SW(B1)-SW(B0) // save b0 303 st8 [r15]=r23,SW(B3)-SW(B2) // save b2 304 mov r25=b4 305 mov r26=b5 306 ;; 307 st8 [r14]=r22,SW(B4)-SW(B1) // save b1 308 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3 309 mov r21=ar.lc // I-unit 310 stf.spill [r2]=f12,32 311 stf.spill [r3]=f13,32 312 ;; 313 st8 [r14]=r25,SW(B5)-SW(B4) // save b4 314 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs 315 stf.spill [r2]=f14,32 316 stf.spill [r3]=f15,32 317 ;; 318 st8 [r14]=r26 // save b5 319 st8 [r15]=r21 // save ar.lc 320 stf.spill [r2]=f16,32 321 stf.spill [r3]=f17,32 322 ;; 323 stf.spill [r2]=f18,32 324 stf.spill [r3]=f19,32 325 ;; 326 stf.spill [r2]=f20,32 327 stf.spill [r3]=f21,32 328 ;; 329 stf.spill [r2]=f22,32 330 stf.spill [r3]=f23,32 331 ;; 332 stf.spill [r2]=f24,32 333 stf.spill [r3]=f25,32 334 ;; 335 stf.spill [r2]=f26,32 336 stf.spill [r3]=f27,32 337 ;; 338 stf.spill [r2]=f28,32 339 stf.spill [r3]=f29,32 340 ;; 341 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30) 342 stf.spill [r3]=f31,SW(PR)-SW(F31) 343 add r14=SW(CALLER_UNAT)+16,sp 344 ;; 345 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat 346 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat 347 mov r21=pr 348 ;; 349 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat 350 st8 [r3]=r21 // save predicate registers 351 ;; 352 st8 [r2]=r20 // save ar.bspstore 353 st8 [r14]=r18 // save fpsr 354 mov ar.rsc=3 // put RSE back into eager mode, pl 0 355 br.cond.sptk.many b7 356END(save_switch_stack) 357 358/* 359 * load_switch_stack: 360 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK) 361 * - b7 holds address to return to 362 * - must not touch r8-r11 363 */ 364GLOBAL_ENTRY(load_switch_stack) 365 .prologue 366 .altrp b7 367 368 .body 369 lfetch.fault.nt1 [sp] 370 adds r2=SW(AR_BSPSTORE)+16,sp 371 adds r3=SW(AR_UNAT)+16,sp 372 mov ar.rsc=0 // put RSE into enforced lazy mode 373 adds r14=SW(CALLER_UNAT)+16,sp 374 adds r15=SW(AR_FPSR)+16,sp 375 ;; 376 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore 377 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat 378 ;; 379 ld8 r21=[r2],16 // restore b0 380 ld8 r22=[r3],16 // restore b1 381 ;; 382 ld8 r23=[r2],16 // restore b2 383 ld8 r24=[r3],16 // restore b3 384 ;; 385 ld8 r25=[r2],16 // restore b4 386 ld8 r26=[r3],16 // restore b5 387 ;; 388 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs 389 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc 390 ;; 391 ld8 r28=[r2] // restore pr 392 ld8 r30=[r3] // restore rnat 393 ;; 394 ld8 r18=[r14],16 // restore caller's unat 395 ld8 r19=[r15],24 // restore fpsr 396 ;; 397 ldf.fill f2=[r14],32 398 ldf.fill f3=[r15],32 399 ;; 400 ldf.fill f4=[r14],32 401 ldf.fill f5=[r15],32 402 ;; 403 ldf.fill f12=[r14],32 404 ldf.fill f13=[r15],32 405 ;; 406 ldf.fill f14=[r14],32 407 ldf.fill f15=[r15],32 408 ;; 409 ldf.fill f16=[r14],32 410 ldf.fill f17=[r15],32 411 ;; 412 ldf.fill f18=[r14],32 413 ldf.fill f19=[r15],32 414 mov b0=r21 415 ;; 416 ldf.fill f20=[r14],32 417 ldf.fill f21=[r15],32 418 mov b1=r22 419 ;; 420 ldf.fill f22=[r14],32 421 ldf.fill f23=[r15],32 422 mov b2=r23 423 ;; 424 mov ar.bspstore=r27 425 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7 426 mov b3=r24 427 ;; 428 ldf.fill f24=[r14],32 429 ldf.fill f25=[r15],32 430 mov b4=r25 431 ;; 432 ldf.fill f26=[r14],32 433 ldf.fill f27=[r15],32 434 mov b5=r26 435 ;; 436 ldf.fill f28=[r14],32 437 ldf.fill f29=[r15],32 438 mov ar.pfs=r16 439 ;; 440 ldf.fill f30=[r14],32 441 ldf.fill f31=[r15],24 442 mov ar.lc=r17 443 ;; 444 ld8.fill r4=[r14],16 445 ld8.fill r5=[r15],16 446 mov pr=r28,-1 447 ;; 448 ld8.fill r6=[r14],16 449 ld8.fill r7=[r15],16 450 451 mov ar.unat=r18 // restore caller's unat 452 mov ar.rnat=r30 // must restore after bspstore but before rsc! 453 mov ar.fpsr=r19 // restore fpsr 454 mov ar.rsc=3 // put RSE back into eager mode, pl 0 455 br.cond.sptk.many b7 456END(load_switch_stack) 457 458 /* 459 * Invoke a system call, but do some tracing before and after the call. 460 * We MUST preserve the current register frame throughout this routine 461 * because some system calls (such as ia64_execve) directly 462 * manipulate ar.pfs. 463 */ 464GLOBAL_ENTRY(ia64_trace_syscall) 465 PT_REGS_UNWIND_INFO(0) 466 /* 467 * We need to preserve the scratch registers f6-f11 in case the system 468 * call is sigreturn. 469 */ 470 adds r16=PT(F6)+16,sp 471 adds r17=PT(F7)+16,sp 472 ;; 473 stf.spill [r16]=f6,32 474 stf.spill [r17]=f7,32 475 ;; 476 stf.spill [r16]=f8,32 477 stf.spill [r17]=f9,32 478 ;; 479 stf.spill [r16]=f10 480 stf.spill [r17]=f11 481 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args 482 cmp.lt p6,p0=r8,r0 // check tracehook 483 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 484 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 485 mov r10=0 486(p6) br.cond.sptk strace_error // syscall failed -> 487 adds r16=PT(F6)+16,sp 488 adds r17=PT(F7)+16,sp 489 ;; 490 ldf.fill f6=[r16],32 491 ldf.fill f7=[r17],32 492 ;; 493 ldf.fill f8=[r16],32 494 ldf.fill f9=[r17],32 495 ;; 496 ldf.fill f10=[r16] 497 ldf.fill f11=[r17] 498 // the syscall number may have changed, so re-load it and re-calculate the 499 // syscall entry-point: 500 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #) 501 ;; 502 ld8 r15=[r15] 503 mov r3=NR_syscalls - 1 504 ;; 505 adds r15=-1024,r15 506 movl r16=sys_call_table 507 ;; 508 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024) 509 cmp.leu p6,p7=r15,r3 510 ;; 511(p6) ld8 r20=[r20] // load address of syscall entry point 512(p7) movl r20=sys_ni_syscall 513 ;; 514 mov b6=r20 515 br.call.sptk.many rp=b6 // do the syscall 516.strace_check_retval: 517 cmp.lt p6,p0=r8,r0 // syscall failed? 518 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 519 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10 520 mov r10=0 521(p6) br.cond.sptk strace_error // syscall failed -> 522 ;; // avoid RAW on r10 523.strace_save_retval: 524.mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8 525.mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10 526 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value 527.ret3: 528(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk 529(pUStk) rsm psr.i // disable interrupts 530 br.cond.sptk ia64_work_pending_syscall_end 531 532strace_error: 533 ld8 r3=[r2] // load pt_regs.r8 534 sub r9=0,r8 // negate return value to get errno value 535 ;; 536 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0? 537 adds r3=16,r2 // r3=&pt_regs.r10 538 ;; 539(p6) mov r10=-1 540(p6) mov r8=r9 541 br.cond.sptk .strace_save_retval 542END(ia64_trace_syscall) 543 544 /* 545 * When traced and returning from sigreturn, we invoke syscall_trace but then 546 * go straight to ia64_leave_kernel rather than ia64_leave_syscall. 547 */ 548GLOBAL_ENTRY(ia64_strace_leave_kernel) 549 PT_REGS_UNWIND_INFO(0) 550{ /* 551 * Some versions of gas generate bad unwind info if the first instruction of a 552 * procedure doesn't go into the first slot of a bundle. This is a workaround. 553 */ 554 nop.m 0 555 nop.i 0 556 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value 557} 558.ret4: br.cond.sptk ia64_leave_kernel 559END(ia64_strace_leave_kernel) 560 561ENTRY(call_payload) 562 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0) 563 /* call the kernel_thread payload; fn is in r4, arg - in r5 */ 564 alloc loc1=ar.pfs,0,3,1,0 565 mov loc0=rp 566 mov loc2=gp 567 mov out0=r5 // arg 568 ld8 r14 = [r4], 8 // fn.address 569 ;; 570 mov b6 = r14 571 ld8 gp = [r4] // fn.gp 572 ;; 573 br.call.sptk.many rp=b6 // fn(arg) 574.ret12: mov gp=loc2 575 mov rp=loc0 576 mov ar.pfs=loc1 577 /* ... and if it has returned, we are going to userland */ 578 cmp.ne pKStk,pUStk=r0,r0 579 br.ret.sptk.many rp 580END(call_payload) 581 582GLOBAL_ENTRY(ia64_ret_from_clone) 583 PT_REGS_UNWIND_INFO(0) 584{ /* 585 * Some versions of gas generate bad unwind info if the first instruction of a 586 * procedure doesn't go into the first slot of a bundle. This is a workaround. 587 */ 588 nop.m 0 589 nop.i 0 590 /* 591 * We need to call schedule_tail() to complete the scheduling process. 592 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the 593 * address of the previously executing task. 594 */ 595 br.call.sptk.many rp=ia64_invoke_schedule_tail 596} 597.ret8: 598(pKStk) br.call.sptk.many rp=call_payload 599 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13 600 ;; 601 ld4 r2=[r2] 602 ;; 603 mov r8=0 604 and r2=_TIF_SYSCALL_TRACEAUDIT,r2 605 ;; 606 cmp.ne p6,p0=r2,r0 607(p6) br.cond.spnt .strace_check_retval 608 ;; // added stop bits to prevent r8 dependency 609END(ia64_ret_from_clone) 610 // fall through 611GLOBAL_ENTRY(ia64_ret_from_syscall) 612 PT_REGS_UNWIND_INFO(0) 613 cmp.ge p6,p7=r8,r0 // syscall executed successfully? 614 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8 615 mov r10=r0 // clear error indication in r10 616(p7) br.cond.spnt handle_syscall_error // handle potential syscall failure 617END(ia64_ret_from_syscall) 618 // fall through 619 620/* 621 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't 622 * need to switch to bank 0 and doesn't restore the scratch registers. 623 * To avoid leaking kernel bits, the scratch registers are set to 624 * the following known-to-be-safe values: 625 * 626 * r1: restored (global pointer) 627 * r2: cleared 628 * r3: 1 (when returning to user-level) 629 * r8-r11: restored (syscall return value(s)) 630 * r12: restored (user-level stack pointer) 631 * r13: restored (user-level thread pointer) 632 * r14: set to __kernel_syscall_via_epc 633 * r15: restored (syscall #) 634 * r16-r17: cleared 635 * r18: user-level b6 636 * r19: cleared 637 * r20: user-level ar.fpsr 638 * r21: user-level b0 639 * r22: cleared 640 * r23: user-level ar.bspstore 641 * r24: user-level ar.rnat 642 * r25: user-level ar.unat 643 * r26: user-level ar.pfs 644 * r27: user-level ar.rsc 645 * r28: user-level ip 646 * r29: user-level psr 647 * r30: user-level cfm 648 * r31: user-level pr 649 * f6-f11: cleared 650 * pr: restored (user-level pr) 651 * b0: restored (user-level rp) 652 * b6: restored 653 * b7: set to __kernel_syscall_via_epc 654 * ar.unat: restored (user-level ar.unat) 655 * ar.pfs: restored (user-level ar.pfs) 656 * ar.rsc: restored (user-level ar.rsc) 657 * ar.rnat: restored (user-level ar.rnat) 658 * ar.bspstore: restored (user-level ar.bspstore) 659 * ar.fpsr: restored (user-level ar.fpsr) 660 * ar.ccv: cleared 661 * ar.csd: cleared 662 * ar.ssd: cleared 663 */ 664GLOBAL_ENTRY(ia64_leave_syscall) 665 PT_REGS_UNWIND_INFO(0) 666 /* 667 * work.need_resched etc. mustn't get changed by this CPU before it returns to 668 * user- or fsys-mode, hence we disable interrupts early on. 669 * 670 * p6 controls whether current_thread_info()->flags needs to be check for 671 * extra work. We always check for extra work when returning to user-level. 672 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count 673 * is 0. After extra work processing has been completed, execution 674 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check 675 * needs to be redone. 676 */ 677#ifdef CONFIG_PREEMPT 678 RSM_PSR_I(p0, r2, r18) // disable interrupts 679 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall 680(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 681 ;; 682 .pred.rel.mutex pUStk,pKStk 683(pKStk) ld4 r21=[r20] // r21 <- preempt_count 684(pUStk) mov r21=0 // r21 <- 0 685 ;; 686 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0) 687#else /* !CONFIG_PREEMPT */ 688 RSM_PSR_I(pUStk, r2, r18) 689 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall 690(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk 691#endif 692.global ia64_work_processed_syscall; 693ia64_work_processed_syscall: 694#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 695 adds r2=PT(LOADRS)+16,r12 696 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave 697 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 698 ;; 699(p6) ld4 r31=[r18] // load current_thread_info()->flags 700 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs" 701 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred 702 ;; 703#else 704 adds r2=PT(LOADRS)+16,r12 705 adds r3=PT(AR_BSPSTORE)+16,r12 706 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 707 ;; 708(p6) ld4 r31=[r18] // load current_thread_info()->flags 709 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs" 710 nop.i 0 711 ;; 712#endif 713 mov r16=ar.bsp // M2 get existing backing store pointer 714 ld8 r18=[r2],PT(R9)-PT(B6) // load b6 715(p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? 716 ;; 717 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage) 718(p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending? 719(p6) br.cond.spnt .work_pending_syscall 720 ;; 721 // start restoring the state saved on the kernel stack (struct pt_regs): 722 ld8 r9=[r2],PT(CR_IPSR)-PT(R9) 723 ld8 r11=[r3],PT(CR_IIP)-PT(R11) 724(pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE! 725 ;; 726 invala // M0|1 invalidate ALAT 727 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection 728 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs 729 730 ld8 r29=[r2],16 // M0|1 load cr.ipsr 731 ld8 r28=[r3],16 // M0|1 load cr.iip 732#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 733(pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13 734 ;; 735 ld8 r30=[r2],16 // M0|1 load cr.ifs 736 ld8 r25=[r3],16 // M0|1 load ar.unat 737(pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13 738 ;; 739#else 740 mov r22=r0 // A clear r22 741 ;; 742 ld8 r30=[r2],16 // M0|1 load cr.ifs 743 ld8 r25=[r3],16 // M0|1 load ar.unat 744(pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13 745 ;; 746#endif 747 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs 748 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled 749 nop 0 750 ;; 751 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0 752 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc 753 mov f6=f0 // F clear f6 754 ;; 755 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage) 756 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates 757 mov f7=f0 // F clear f7 758 ;; 759 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr 760 ld8.fill r1=[r3],16 // M0|1 load r1 761(pUStk) mov r17=1 // A 762 ;; 763#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 764(pUStk) st1 [r15]=r17 // M2|3 765#else 766(pUStk) st1 [r14]=r17 // M2|3 767#endif 768 ld8.fill r13=[r3],16 // M0|1 769 mov f8=f0 // F clear f8 770 ;; 771 ld8.fill r12=[r2] // M0|1 restore r12 (sp) 772 ld8.fill r15=[r3] // M0|1 restore r15 773 mov b6=r18 // I0 restore b6 774 775 LOAD_PHYS_STACK_REG_SIZE(r17) 776 mov f9=f0 // F clear f9 777(pKStk) br.cond.dpnt.many skip_rbs_switch // B 778 779 srlz.d // M0 ensure interruption collection is off (for cover) 780 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition 781 COVER // B add current frame into dirty partition & set cr.ifs 782 ;; 783#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 784 mov r19=ar.bsp // M2 get new backing store pointer 785 st8 [r14]=r22 // M save time at leave 786 mov f10=f0 // F clear f10 787 788 mov r22=r0 // A clear r22 789 movl r14=__kernel_syscall_via_epc // X 790 ;; 791#else 792 mov r19=ar.bsp // M2 get new backing store pointer 793 mov f10=f0 // F clear f10 794 795 nop.m 0 796 movl r14=__kernel_syscall_via_epc // X 797 ;; 798#endif 799 mov.m ar.csd=r0 // M2 clear ar.csd 800 mov.m ar.ccv=r0 // M2 clear ar.ccv 801 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc) 802 803 mov.m ar.ssd=r0 // M2 clear ar.ssd 804 mov f11=f0 // F clear f11 805 br.cond.sptk.many rbs_switch // B 806END(ia64_leave_syscall) 807 808GLOBAL_ENTRY(ia64_leave_kernel) 809 PT_REGS_UNWIND_INFO(0) 810 /* 811 * work.need_resched etc. mustn't get changed by this CPU before it returns to 812 * user- or fsys-mode, hence we disable interrupts early on. 813 * 814 * p6 controls whether current_thread_info()->flags needs to be check for 815 * extra work. We always check for extra work when returning to user-level. 816 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count 817 * is 0. After extra work processing has been completed, execution 818 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check 819 * needs to be redone. 820 */ 821#ifdef CONFIG_PREEMPT 822 RSM_PSR_I(p0, r17, r31) // disable interrupts 823 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel 824(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13 825 ;; 826 .pred.rel.mutex pUStk,pKStk 827(pKStk) ld4 r21=[r20] // r21 <- preempt_count 828(pUStk) mov r21=0 // r21 <- 0 829 ;; 830 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0) 831#else 832 RSM_PSR_I(pUStk, r17, r31) 833 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel 834(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk 835#endif 836.work_processed_kernel: 837 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13 838 ;; 839(p6) ld4 r31=[r17] // load current_thread_info()->flags 840 adds r21=PT(PR)+16,r12 841 ;; 842 843 lfetch [r21],PT(CR_IPSR)-PT(PR) 844 adds r2=PT(B6)+16,r12 845 adds r3=PT(R16)+16,r12 846 ;; 847 lfetch [r21] 848 ld8 r28=[r2],8 // load b6 849 adds r29=PT(R24)+16,r12 850 851 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16) 852 adds r30=PT(AR_CCV)+16,r12 853(p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE? 854 ;; 855 ld8.fill r24=[r29] 856 ld8 r15=[r30] // load ar.ccv 857(p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending? 858 ;; 859 ld8 r29=[r2],16 // load b7 860 ld8 r30=[r3],16 // load ar.csd 861(p6) br.cond.spnt .work_pending 862 ;; 863 ld8 r31=[r2],16 // load ar.ssd 864 ld8.fill r8=[r3],16 865 ;; 866 ld8.fill r9=[r2],16 867 ld8.fill r10=[r3],PT(R17)-PT(R10) 868 ;; 869 ld8.fill r11=[r2],PT(R18)-PT(R11) 870 ld8.fill r17=[r3],16 871 ;; 872 ld8.fill r18=[r2],16 873 ld8.fill r19=[r3],16 874 ;; 875 ld8.fill r20=[r2],16 876 ld8.fill r21=[r3],16 877 mov ar.csd=r30 878 mov ar.ssd=r31 879 ;; 880 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection 881 invala // invalidate ALAT 882 ;; 883 ld8.fill r22=[r2],24 884 ld8.fill r23=[r3],24 885 mov b6=r28 886 ;; 887 ld8.fill r25=[r2],16 888 ld8.fill r26=[r3],16 889 mov b7=r29 890 ;; 891 ld8.fill r27=[r2],16 892 ld8.fill r28=[r3],16 893 ;; 894 ld8.fill r29=[r2],16 895 ld8.fill r30=[r3],24 896 ;; 897 ld8.fill r31=[r2],PT(F9)-PT(R31) 898 adds r3=PT(F10)-PT(F6),r3 899 ;; 900 ldf.fill f9=[r2],PT(F6)-PT(F9) 901 ldf.fill f10=[r3],PT(F8)-PT(F10) 902 ;; 903 ldf.fill f6=[r2],PT(F7)-PT(F6) 904 ;; 905 ldf.fill f7=[r2],PT(F11)-PT(F7) 906 ldf.fill f8=[r3],32 907 ;; 908 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned) 909 mov ar.ccv=r15 910 ;; 911 ldf.fill f11=[r2] 912 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...) 913 ;; 914(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency) 915 adds r16=PT(CR_IPSR)+16,r12 916 adds r17=PT(CR_IIP)+16,r12 917 918#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 919 .pred.rel.mutex pUStk,pKStk 920 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled 921 MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave 922 nop.i 0 923 ;; 924#else 925 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled 926 nop.i 0 927 nop.i 0 928 ;; 929#endif 930 ld8 r29=[r16],16 // load cr.ipsr 931 ld8 r28=[r17],16 // load cr.iip 932 ;; 933 ld8 r30=[r16],16 // load cr.ifs 934 ld8 r25=[r17],16 // load ar.unat 935 ;; 936 ld8 r26=[r16],16 // load ar.pfs 937 ld8 r27=[r17],16 // load ar.rsc 938 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs 939 ;; 940 ld8 r24=[r16],16 // load ar.rnat (may be garbage) 941 ld8 r23=[r17],16 // load ar.bspstore (may be garbage) 942 ;; 943 ld8 r31=[r16],16 // load predicates 944 ld8 r21=[r17],16 // load b0 945 ;; 946 ld8 r19=[r16],16 // load ar.rsc value for "loadrs" 947 ld8.fill r1=[r17],16 // load r1 948 ;; 949 ld8.fill r12=[r16],16 950 ld8.fill r13=[r17],16 951#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 952(pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18 953#else 954(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 955#endif 956 ;; 957 ld8 r20=[r16],16 // ar.fpsr 958 ld8.fill r15=[r17],16 959#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 960(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred 961#endif 962 ;; 963 ld8.fill r14=[r16],16 964 ld8.fill r2=[r17] 965(pUStk) mov r17=1 966 ;; 967#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 968 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;; 969 // mib : mov add br -> mib : ld8 add br 970 // bbb_ : br nop cover;; mbb_ : mov br cover;; 971 // 972 // no one require bsp in r16 if (pKStk) branch is selected. 973(pUStk) st8 [r3]=r22 // save time at leave 974(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack 975 shr.u r18=r19,16 // get byte size of existing "dirty" partition 976 ;; 977 ld8.fill r3=[r16] // deferred 978 LOAD_PHYS_STACK_REG_SIZE(r17) 979(pKStk) br.cond.dpnt skip_rbs_switch 980 mov r16=ar.bsp // get existing backing store pointer 981#else 982 ld8.fill r3=[r16] 983(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack 984 shr.u r18=r19,16 // get byte size of existing "dirty" partition 985 ;; 986 mov r16=ar.bsp // get existing backing store pointer 987 LOAD_PHYS_STACK_REG_SIZE(r17) 988(pKStk) br.cond.dpnt skip_rbs_switch 989#endif 990 991 /* 992 * Restore user backing store. 993 * 994 * NOTE: alloc, loadrs, and cover can't be predicated. 995 */ 996(pNonSys) br.cond.dpnt dont_preserve_current_frame 997 COVER // add current frame into dirty partition and set cr.ifs 998 ;; 999 mov r19=ar.bsp // get new backing store pointer 1000rbs_switch: 1001 sub r16=r16,r18 // krbs = old bsp - size of dirty partition 1002 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs 1003 ;; 1004 sub r19=r19,r16 // calculate total byte size of dirty partition 1005 add r18=64,r18 // don't force in0-in7 into memory... 1006 ;; 1007 shl r19=r19,16 // shift size of dirty partition into loadrs position 1008 ;; 1009dont_preserve_current_frame: 1010 /* 1011 * To prevent leaking bits between the kernel and user-space, 1012 * we must clear the stacked registers in the "invalid" partition here. 1013 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium, 1014 * 5 registers/cycle on McKinley). 1015 */ 1016# define pRecurse p6 1017# define pReturn p7 1018#ifdef CONFIG_ITANIUM 1019# define Nregs 10 1020#else 1021# define Nregs 14 1022#endif 1023 alloc loc0=ar.pfs,2,Nregs-2,2,0 1024 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8)) 1025 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize 1026 ;; 1027 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs" 1028 shladd in0=loc1,3,r17 1029 mov in1=0 1030 ;; 1031 TEXT_ALIGN(32) 1032rse_clear_invalid: 1033#ifdef CONFIG_ITANIUM 1034 // cycle 0 1035 { .mii 1036 alloc loc0=ar.pfs,2,Nregs-2,2,0 1037 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse 1038 add out0=-Nregs*8,in0 1039}{ .mfb 1040 add out1=1,in1 // increment recursion count 1041 nop.f 0 1042 nop.b 0 // can't do br.call here because of alloc (WAW on CFM) 1043 ;; 1044}{ .mfi // cycle 1 1045 mov loc1=0 1046 nop.f 0 1047 mov loc2=0 1048}{ .mib 1049 mov loc3=0 1050 mov loc4=0 1051(pRecurse) br.call.sptk.many b0=rse_clear_invalid 1052 1053}{ .mfi // cycle 2 1054 mov loc5=0 1055 nop.f 0 1056 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret 1057}{ .mib 1058 mov loc6=0 1059 mov loc7=0 1060(pReturn) br.ret.sptk.many b0 1061} 1062#else /* !CONFIG_ITANIUM */ 1063 alloc loc0=ar.pfs,2,Nregs-2,2,0 1064 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse 1065 add out0=-Nregs*8,in0 1066 add out1=1,in1 // increment recursion count 1067 mov loc1=0 1068 mov loc2=0 1069 ;; 1070 mov loc3=0 1071 mov loc4=0 1072 mov loc5=0 1073 mov loc6=0 1074 mov loc7=0 1075(pRecurse) br.call.dptk.few b0=rse_clear_invalid 1076 ;; 1077 mov loc8=0 1078 mov loc9=0 1079 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret 1080 mov loc10=0 1081 mov loc11=0 1082(pReturn) br.ret.dptk.many b0 1083#endif /* !CONFIG_ITANIUM */ 1084# undef pRecurse 1085# undef pReturn 1086 ;; 1087 alloc r17=ar.pfs,0,0,0,0 // drop current register frame 1088 ;; 1089 loadrs 1090 ;; 1091skip_rbs_switch: 1092 mov ar.unat=r25 // M2 1093(pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22 1094(pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise 1095 ;; 1096(pUStk) mov ar.bspstore=r23 // M2 1097(pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp 1098(pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise 1099 ;; 1100 MOV_TO_IPSR(p0, r29, r25) // M2 1101 mov ar.pfs=r26 // I0 1102(pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise 1103 1104 MOV_TO_IFS(p9, r30, r25)// M2 1105 mov b0=r21 // I0 1106(pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise 1107 1108 mov ar.fpsr=r20 // M2 1109 MOV_TO_IIP(r28, r25) // M2 1110 nop 0 1111 ;; 1112(pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode 1113 nop 0 1114(pLvSys)mov r2=r0 1115 1116 mov ar.rsc=r27 // M2 1117 mov pr=r31,-1 // I0 1118 RFI // B 1119 1120 /* 1121 * On entry: 1122 * r20 = ¤t->thread_info->pre_count (if CONFIG_PREEMPT) 1123 * r31 = current->thread_info->flags 1124 * On exit: 1125 * p6 = TRUE if work-pending-check needs to be redone 1126 * 1127 * Interrupts are disabled on entry, reenabled depend on work, and 1128 * disabled on exit. 1129 */ 1130.work_pending_syscall: 1131 add r2=-8,r2 1132 add r3=-8,r3 1133 ;; 1134 st8 [r2]=r8 1135 st8 [r3]=r10 1136.work_pending: 1137 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed? 1138(p6) br.cond.sptk.few .notify 1139 br.call.spnt.many rp=preempt_schedule_irq 1140.ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check) 1141(pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end 1142 br.cond.sptk.many .work_processed_kernel 1143 1144.notify: 1145(pUStk) br.call.spnt.many rp=notify_resume_user 1146.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check) 1147(pLvSys)br.cond.sptk.few ia64_work_pending_syscall_end 1148 br.cond.sptk.many .work_processed_kernel 1149 1150.global ia64_work_pending_syscall_end; 1151ia64_work_pending_syscall_end: 1152 adds r2=PT(R8)+16,r12 1153 adds r3=PT(R10)+16,r12 1154 ;; 1155 ld8 r8=[r2] 1156 ld8 r10=[r3] 1157 br.cond.sptk.many ia64_work_processed_syscall 1158END(ia64_leave_kernel) 1159 1160ENTRY(handle_syscall_error) 1161 /* 1162 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could 1163 * lead us to mistake a negative return value as a failed syscall. Those syscall 1164 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If 1165 * pt_regs.r8 is zero, we assume that the call completed successfully. 1166 */ 1167 PT_REGS_UNWIND_INFO(0) 1168 ld8 r3=[r2] // load pt_regs.r8 1169 ;; 1170 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0? 1171 ;; 1172(p7) mov r10=-1 1173(p7) sub r8=0,r8 // negate return value to get errno 1174 br.cond.sptk ia64_leave_syscall 1175END(handle_syscall_error) 1176 1177 /* 1178 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed 1179 * in case a system call gets restarted. 1180 */ 1181GLOBAL_ENTRY(ia64_invoke_schedule_tail) 1182 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 1183 alloc loc1=ar.pfs,8,2,1,0 1184 mov loc0=rp 1185 mov out0=r8 // Address of previous task 1186 ;; 1187 br.call.sptk.many rp=schedule_tail 1188.ret11: mov ar.pfs=loc1 1189 mov rp=loc0 1190 br.ret.sptk.many rp 1191END(ia64_invoke_schedule_tail) 1192 1193 /* 1194 * Setup stack and call do_notify_resume_user(), keeping interrupts 1195 * disabled. 1196 * 1197 * Note that pSys and pNonSys need to be set up by the caller. 1198 * We declare 8 input registers so the system call args get preserved, 1199 * in case we need to restart a system call. 1200 */ 1201GLOBAL_ENTRY(notify_resume_user) 1202 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8) 1203 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart! 1204 mov r9=ar.unat 1205 mov loc0=rp // save return address 1206 mov out0=0 // there is no "oldset" 1207 adds out1=8,sp // out1=&sigscratch->ar_pfs 1208(pSys) mov out2=1 // out2==1 => we're in a syscall 1209 ;; 1210(pNonSys) mov out2=0 // out2==0 => not a syscall 1211 .fframe 16 1212 .spillsp ar.unat, 16 1213 st8 [sp]=r9,-16 // allocate space for ar.unat and save it 1214 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch 1215 .body 1216 br.call.sptk.many rp=do_notify_resume_user 1217.ret15: .restore sp 1218 adds sp=16,sp // pop scratch stack space 1219 ;; 1220 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat 1221 mov rp=loc0 1222 ;; 1223 mov ar.unat=r9 1224 mov ar.pfs=loc1 1225 br.ret.sptk.many rp 1226END(notify_resume_user) 1227 1228ENTRY(sys_rt_sigreturn) 1229 PT_REGS_UNWIND_INFO(0) 1230 /* 1231 * Allocate 8 input registers since ptrace() may clobber them 1232 */ 1233 alloc r2=ar.pfs,8,0,1,0 1234 .prologue 1235 PT_REGS_SAVES(16) 1236 adds sp=-16,sp 1237 .body 1238 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall... 1239 ;; 1240 /* 1241 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined 1242 * syscall-entry path does not save them we save them here instead. Note: we 1243 * don't need to save any other registers that are not saved by the stream-lined 1244 * syscall path, because restore_sigcontext() restores them. 1245 */ 1246 adds r16=PT(F6)+32,sp 1247 adds r17=PT(F7)+32,sp 1248 ;; 1249 stf.spill [r16]=f6,32 1250 stf.spill [r17]=f7,32 1251 ;; 1252 stf.spill [r16]=f8,32 1253 stf.spill [r17]=f9,32 1254 ;; 1255 stf.spill [r16]=f10 1256 stf.spill [r17]=f11 1257 adds out0=16,sp // out0 = &sigscratch 1258 br.call.sptk.many rp=ia64_rt_sigreturn 1259.ret19: .restore sp,0 1260 adds sp=16,sp 1261 ;; 1262 ld8 r9=[sp] // load new ar.unat 1263 mov.sptk b7=r8,ia64_leave_kernel 1264 ;; 1265 mov ar.unat=r9 1266 br.many b7 1267END(sys_rt_sigreturn) 1268 1269GLOBAL_ENTRY(ia64_prepare_handle_unaligned) 1270 .prologue 1271 /* 1272 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0 1273 */ 1274 mov r16=r0 1275 DO_SAVE_SWITCH_STACK 1276 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt 1277.ret21: .body 1278 DO_LOAD_SWITCH_STACK 1279 br.cond.sptk.many rp // goes to ia64_leave_kernel 1280END(ia64_prepare_handle_unaligned) 1281 1282 // 1283 // unw_init_running(void (*callback)(info, arg), void *arg) 1284 // 1285# define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15) 1286 1287GLOBAL_ENTRY(unw_init_running) 1288 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) 1289 alloc loc1=ar.pfs,2,3,3,0 1290 ;; 1291 ld8 loc2=[in0],8 1292 mov loc0=rp 1293 mov r16=loc1 1294 DO_SAVE_SWITCH_STACK 1295 .body 1296 1297 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2) 1298 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE 1299 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE) 1300 adds sp=-EXTRA_FRAME_SIZE,sp 1301 .body 1302 ;; 1303 adds out0=16,sp // &info 1304 mov out1=r13 // current 1305 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack 1306 br.call.sptk.many rp=unw_init_frame_info 13071: adds out0=16,sp // &info 1308 mov b6=loc2 1309 mov loc2=gp // save gp across indirect function call 1310 ;; 1311 ld8 gp=[in0] 1312 mov out1=in1 // arg 1313 br.call.sptk.many rp=b6 // invoke the callback function 13141: mov gp=loc2 // restore gp 1315 1316 // For now, we don't allow changing registers from within 1317 // unw_init_running; if we ever want to allow that, we'd 1318 // have to do a load_switch_stack here: 1319 .restore sp 1320 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp 1321 1322 mov ar.pfs=loc1 1323 mov rp=loc0 1324 br.ret.sptk.many rp 1325END(unw_init_running) 1326EXPORT_SYMBOL(unw_init_running) 1327 1328#ifdef CONFIG_FUNCTION_TRACER 1329#ifdef CONFIG_DYNAMIC_FTRACE 1330GLOBAL_ENTRY(_mcount) 1331 br ftrace_stub 1332END(_mcount) 1333EXPORT_SYMBOL(_mcount) 1334 1335.here: 1336 br.ret.sptk.many b0 1337 1338GLOBAL_ENTRY(ftrace_caller) 1339 alloc out0 = ar.pfs, 8, 0, 4, 0 1340 mov out3 = r0 1341 ;; 1342 mov out2 = b0 1343 add r3 = 0x20, r3 1344 mov out1 = r1; 1345 br.call.sptk.many b0 = ftrace_patch_gp 1346 //this might be called from module, so we must patch gp 1347ftrace_patch_gp: 1348 movl gp=__gp 1349 mov b0 = r3 1350 ;; 1351.global ftrace_call; 1352ftrace_call: 1353{ 1354 .mlx 1355 nop.m 0x0 1356 movl r3 = .here;; 1357} 1358 alloc loc0 = ar.pfs, 4, 4, 2, 0 1359 ;; 1360 mov loc1 = b0 1361 mov out0 = b0 1362 mov loc2 = r8 1363 mov loc3 = r15 1364 ;; 1365 adds out0 = -MCOUNT_INSN_SIZE, out0 1366 mov out1 = in2 1367 mov b6 = r3 1368 1369 br.call.sptk.many b0 = b6 1370 ;; 1371 mov ar.pfs = loc0 1372 mov b0 = loc1 1373 mov r8 = loc2 1374 mov r15 = loc3 1375 br ftrace_stub 1376 ;; 1377END(ftrace_caller) 1378 1379#else 1380GLOBAL_ENTRY(_mcount) 1381 movl r2 = ftrace_stub 1382 movl r3 = ftrace_trace_function;; 1383 ld8 r3 = [r3];; 1384 ld8 r3 = [r3];; 1385 cmp.eq p7,p0 = r2, r3 1386(p7) br.sptk.many ftrace_stub 1387 ;; 1388 1389 alloc loc0 = ar.pfs, 4, 4, 2, 0 1390 ;; 1391 mov loc1 = b0 1392 mov out0 = b0 1393 mov loc2 = r8 1394 mov loc3 = r15 1395 ;; 1396 adds out0 = -MCOUNT_INSN_SIZE, out0 1397 mov out1 = in2 1398 mov b6 = r3 1399 1400 br.call.sptk.many b0 = b6 1401 ;; 1402 mov ar.pfs = loc0 1403 mov b0 = loc1 1404 mov r8 = loc2 1405 mov r15 = loc3 1406 br ftrace_stub 1407 ;; 1408END(_mcount) 1409#endif 1410 1411GLOBAL_ENTRY(ftrace_stub) 1412 mov r3 = b0 1413 movl r2 = _mcount_ret_helper 1414 ;; 1415 mov b6 = r2 1416 mov b7 = r3 1417 br.ret.sptk.many b6 1418 1419_mcount_ret_helper: 1420 mov b0 = r42 1421 mov r1 = r41 1422 mov ar.pfs = r40 1423 br b7 1424END(ftrace_stub) 1425 1426#endif /* CONFIG_FUNCTION_TRACER */ 1427 1428 .rodata 1429 .align 8 1430 .globl sys_call_table 1431sys_call_table: 1432 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S. 1433 data8 sys_exit // 1025 1434 data8 sys_read 1435 data8 sys_write 1436 data8 sys_open 1437 data8 sys_close 1438 data8 sys_creat // 1030 1439 data8 sys_link 1440 data8 sys_unlink 1441 data8 ia64_execve 1442 data8 sys_chdir 1443 data8 sys_fchdir // 1035 1444 data8 sys_utimes 1445 data8 sys_mknod 1446 data8 sys_chmod 1447 data8 sys_chown 1448 data8 sys_lseek // 1040 1449 data8 sys_getpid 1450 data8 sys_getppid 1451 data8 sys_mount 1452 data8 sys_umount 1453 data8 sys_setuid // 1045 1454 data8 sys_getuid 1455 data8 sys_geteuid 1456 data8 sys_ptrace 1457 data8 sys_access 1458 data8 sys_sync // 1050 1459 data8 sys_fsync 1460 data8 sys_fdatasync 1461 data8 sys_kill 1462 data8 sys_rename 1463 data8 sys_mkdir // 1055 1464 data8 sys_rmdir 1465 data8 sys_dup 1466 data8 sys_ia64_pipe 1467 data8 sys_times 1468 data8 ia64_brk // 1060 1469 data8 sys_setgid 1470 data8 sys_getgid 1471 data8 sys_getegid 1472 data8 sys_acct 1473 data8 sys_ioctl // 1065 1474 data8 sys_fcntl 1475 data8 sys_umask 1476 data8 sys_chroot 1477 data8 sys_ustat 1478 data8 sys_dup2 // 1070 1479 data8 sys_setreuid 1480 data8 sys_setregid 1481 data8 sys_getresuid 1482 data8 sys_setresuid 1483 data8 sys_getresgid // 1075 1484 data8 sys_setresgid 1485 data8 sys_getgroups 1486 data8 sys_setgroups 1487 data8 sys_getpgid 1488 data8 sys_setpgid // 1080 1489 data8 sys_setsid 1490 data8 sys_getsid 1491 data8 sys_sethostname 1492 data8 sys_setrlimit 1493 data8 sys_getrlimit // 1085 1494 data8 sys_getrusage 1495 data8 sys_gettimeofday 1496 data8 sys_settimeofday 1497 data8 sys_select 1498 data8 sys_poll // 1090 1499 data8 sys_symlink 1500 data8 sys_readlink 1501 data8 sys_uselib 1502 data8 sys_swapon 1503 data8 sys_swapoff // 1095 1504 data8 sys_reboot 1505 data8 sys_truncate 1506 data8 sys_ftruncate 1507 data8 sys_fchmod 1508 data8 sys_fchown // 1100 1509 data8 ia64_getpriority 1510 data8 sys_setpriority 1511 data8 sys_statfs 1512 data8 sys_fstatfs 1513 data8 sys_gettid // 1105 1514 data8 sys_semget 1515 data8 sys_semop 1516 data8 sys_semctl 1517 data8 sys_msgget 1518 data8 sys_msgsnd // 1110 1519 data8 sys_msgrcv 1520 data8 sys_msgctl 1521 data8 sys_shmget 1522 data8 sys_shmat 1523 data8 sys_shmdt // 1115 1524 data8 sys_shmctl 1525 data8 sys_syslog 1526 data8 sys_setitimer 1527 data8 sys_getitimer 1528 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */ 1529 data8 sys_ni_syscall /* was: ia64_oldlstat */ 1530 data8 sys_ni_syscall /* was: ia64_oldfstat */ 1531 data8 sys_vhangup 1532 data8 sys_lchown 1533 data8 sys_remap_file_pages // 1125 1534 data8 sys_wait4 1535 data8 sys_sysinfo 1536 data8 sys_clone 1537 data8 sys_setdomainname 1538 data8 sys_newuname // 1130 1539 data8 sys_adjtimex 1540 data8 sys_ni_syscall /* was: ia64_create_module */ 1541 data8 sys_init_module 1542 data8 sys_delete_module 1543 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */ 1544 data8 sys_ni_syscall /* was: sys_query_module */ 1545 data8 sys_quotactl 1546 data8 sys_bdflush 1547 data8 sys_sysfs 1548 data8 sys_personality // 1140 1549 data8 sys_ni_syscall // sys_afs_syscall 1550 data8 sys_setfsuid 1551 data8 sys_setfsgid 1552 data8 sys_getdents 1553 data8 sys_flock // 1145 1554 data8 sys_readv 1555 data8 sys_writev 1556 data8 sys_pread64 1557 data8 sys_pwrite64 1558 data8 sys_sysctl // 1150 1559 data8 sys_mmap 1560 data8 sys_munmap 1561 data8 sys_mlock 1562 data8 sys_mlockall 1563 data8 sys_mprotect // 1155 1564 data8 ia64_mremap 1565 data8 sys_msync 1566 data8 sys_munlock 1567 data8 sys_munlockall 1568 data8 sys_sched_getparam // 1160 1569 data8 sys_sched_setparam 1570 data8 sys_sched_getscheduler 1571 data8 sys_sched_setscheduler 1572 data8 sys_sched_yield 1573 data8 sys_sched_get_priority_max // 1165 1574 data8 sys_sched_get_priority_min 1575 data8 sys_sched_rr_get_interval 1576 data8 sys_nanosleep 1577 data8 sys_ni_syscall // old nfsservctl 1578 data8 sys_prctl // 1170 1579 data8 sys_getpagesize 1580 data8 sys_mmap2 1581 data8 sys_pciconfig_read 1582 data8 sys_pciconfig_write 1583 data8 sys_perfmonctl // 1175 1584 data8 sys_sigaltstack 1585 data8 sys_rt_sigaction 1586 data8 sys_rt_sigpending 1587 data8 sys_rt_sigprocmask 1588 data8 sys_rt_sigqueueinfo // 1180 1589 data8 sys_rt_sigreturn 1590 data8 sys_rt_sigsuspend 1591 data8 sys_rt_sigtimedwait 1592 data8 sys_getcwd 1593 data8 sys_capget // 1185 1594 data8 sys_capset 1595 data8 sys_sendfile64 1596 data8 sys_ni_syscall // sys_getpmsg (STREAMS) 1597 data8 sys_ni_syscall // sys_putpmsg (STREAMS) 1598 data8 sys_socket // 1190 1599 data8 sys_bind 1600 data8 sys_connect 1601 data8 sys_listen 1602 data8 sys_accept 1603 data8 sys_getsockname // 1195 1604 data8 sys_getpeername 1605 data8 sys_socketpair 1606 data8 sys_send 1607 data8 sys_sendto 1608 data8 sys_recv // 1200 1609 data8 sys_recvfrom 1610 data8 sys_shutdown 1611 data8 sys_setsockopt 1612 data8 sys_getsockopt 1613 data8 sys_sendmsg // 1205 1614 data8 sys_recvmsg 1615 data8 sys_pivot_root 1616 data8 sys_mincore 1617 data8 sys_madvise 1618 data8 sys_newstat // 1210 1619 data8 sys_newlstat 1620 data8 sys_newfstat 1621 data8 sys_clone2 1622 data8 sys_getdents64 1623 data8 sys_getunwind // 1215 1624 data8 sys_readahead 1625 data8 sys_setxattr 1626 data8 sys_lsetxattr 1627 data8 sys_fsetxattr 1628 data8 sys_getxattr // 1220 1629 data8 sys_lgetxattr 1630 data8 sys_fgetxattr 1631 data8 sys_listxattr 1632 data8 sys_llistxattr 1633 data8 sys_flistxattr // 1225 1634 data8 sys_removexattr 1635 data8 sys_lremovexattr 1636 data8 sys_fremovexattr 1637 data8 sys_tkill 1638 data8 sys_futex // 1230 1639 data8 sys_sched_setaffinity 1640 data8 sys_sched_getaffinity 1641 data8 sys_set_tid_address 1642 data8 sys_fadvise64_64 1643 data8 sys_tgkill // 1235 1644 data8 sys_exit_group 1645 data8 sys_lookup_dcookie 1646 data8 sys_io_setup 1647 data8 sys_io_destroy 1648 data8 sys_io_getevents // 1240 1649 data8 sys_io_submit 1650 data8 sys_io_cancel 1651 data8 sys_epoll_create 1652 data8 sys_epoll_ctl 1653 data8 sys_epoll_wait // 1245 1654 data8 sys_restart_syscall 1655 data8 sys_semtimedop 1656 data8 sys_timer_create 1657 data8 sys_timer_settime 1658 data8 sys_timer_gettime // 1250 1659 data8 sys_timer_getoverrun 1660 data8 sys_timer_delete 1661 data8 sys_clock_settime 1662 data8 sys_clock_gettime 1663 data8 sys_clock_getres // 1255 1664 data8 sys_clock_nanosleep 1665 data8 sys_fstatfs64 1666 data8 sys_statfs64 1667 data8 sys_mbind 1668 data8 sys_get_mempolicy // 1260 1669 data8 sys_set_mempolicy 1670 data8 sys_mq_open 1671 data8 sys_mq_unlink 1672 data8 sys_mq_timedsend 1673 data8 sys_mq_timedreceive // 1265 1674 data8 sys_mq_notify 1675 data8 sys_mq_getsetattr 1676 data8 sys_kexec_load 1677 data8 sys_ni_syscall // reserved for vserver 1678 data8 sys_waitid // 1270 1679 data8 sys_add_key 1680 data8 sys_request_key 1681 data8 sys_keyctl 1682 data8 sys_ioprio_set 1683 data8 sys_ioprio_get // 1275 1684 data8 sys_move_pages 1685 data8 sys_inotify_init 1686 data8 sys_inotify_add_watch 1687 data8 sys_inotify_rm_watch 1688 data8 sys_migrate_pages // 1280 1689 data8 sys_openat 1690 data8 sys_mkdirat 1691 data8 sys_mknodat 1692 data8 sys_fchownat 1693 data8 sys_futimesat // 1285 1694 data8 sys_newfstatat 1695 data8 sys_unlinkat 1696 data8 sys_renameat 1697 data8 sys_linkat 1698 data8 sys_symlinkat // 1290 1699 data8 sys_readlinkat 1700 data8 sys_fchmodat 1701 data8 sys_faccessat 1702 data8 sys_pselect6 1703 data8 sys_ppoll // 1295 1704 data8 sys_unshare 1705 data8 sys_splice 1706 data8 sys_set_robust_list 1707 data8 sys_get_robust_list 1708 data8 sys_sync_file_range // 1300 1709 data8 sys_tee 1710 data8 sys_vmsplice 1711 data8 sys_fallocate 1712 data8 sys_getcpu 1713 data8 sys_epoll_pwait // 1305 1714 data8 sys_utimensat 1715 data8 sys_signalfd 1716 data8 sys_ni_syscall 1717 data8 sys_eventfd 1718 data8 sys_timerfd_create // 1310 1719 data8 sys_timerfd_settime 1720 data8 sys_timerfd_gettime 1721 data8 sys_signalfd4 1722 data8 sys_eventfd2 1723 data8 sys_epoll_create1 // 1315 1724 data8 sys_dup3 1725 data8 sys_pipe2 1726 data8 sys_inotify_init1 1727 data8 sys_preadv 1728 data8 sys_pwritev // 1320 1729 data8 sys_rt_tgsigqueueinfo 1730 data8 sys_recvmmsg 1731 data8 sys_fanotify_init 1732 data8 sys_fanotify_mark 1733 data8 sys_prlimit64 // 1325 1734 data8 sys_name_to_handle_at 1735 data8 sys_open_by_handle_at 1736 data8 sys_clock_adjtime 1737 data8 sys_syncfs 1738 data8 sys_setns // 1330 1739 data8 sys_sendmmsg 1740 data8 sys_process_vm_readv 1741 data8 sys_process_vm_writev 1742 data8 sys_accept4 1743 data8 sys_finit_module // 1335 1744 data8 sys_sched_setattr 1745 data8 sys_sched_getattr 1746 data8 sys_renameat2 1747 data8 sys_getrandom 1748 data8 sys_memfd_create // 1340 1749 data8 sys_bpf 1750 data8 sys_execveat 1751 data8 sys_userfaultfd 1752 data8 sys_membarrier 1753 data8 sys_kcmp // 1345 1754 data8 sys_mlock2 1755 data8 sys_copy_file_range 1756 data8 sys_preadv2 1757 data8 sys_pwritev2 1758 1759 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls 1760