xref: /openbmc/linux/arch/ia64/include/asm/tlb.h (revision 612a462a)
1 #ifndef _ASM_IA64_TLB_H
2 #define _ASM_IA64_TLB_H
3 /*
4  * Based on <asm-generic/tlb.h>.
5  *
6  * Copyright (C) 2002-2003 Hewlett-Packard Co
7  *	David Mosberger-Tang <davidm@hpl.hp.com>
8  */
9 /*
10  * Removing a translation from a page table (including TLB-shootdown) is a four-step
11  * procedure:
12  *
13  *	(1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory
14  *	    (this is a no-op on ia64).
15  *	(2) Clear the relevant portions of the page-table
16  *	(3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs
17  *	(4) Release the pages that were freed up in step (2).
18  *
19  * Note that the ordering of these steps is crucial to avoid races on MP machines.
20  *
21  * The Linux kernel defines several platform-specific hooks for TLB-shootdown.  When
22  * unmapping a portion of the virtual address space, these hooks are called according to
23  * the following template:
24  *
25  *	tlb <- tlb_gather_mmu(mm, start, end);		// start unmap for address space MM
26  *	{
27  *	  for each vma that needs a shootdown do {
28  *	    tlb_start_vma(tlb, vma);
29  *	      for each page-table-entry PTE that needs to be removed do {
30  *		tlb_remove_tlb_entry(tlb, pte, address);
31  *		if (pte refers to a normal page) {
32  *		  tlb_remove_page(tlb, page);
33  *		}
34  *	      }
35  *	    tlb_end_vma(tlb, vma);
36  *	  }
37  *	}
38  *	tlb_finish_mmu(tlb, start, end);	// finish unmap for address space MM
39  */
40 #include <linux/mm.h>
41 #include <linux/pagemap.h>
42 #include <linux/swap.h>
43 
44 #include <asm/pgalloc.h>
45 #include <asm/processor.h>
46 #include <asm/tlbflush.h>
47 #include <asm/machvec.h>
48 
49 /*
50  * If we can't allocate a page to make a big batch of page pointers
51  * to work on, then just handle a few from the on-stack structure.
52  */
53 #define	IA64_GATHER_BUNDLE	8
54 
55 struct mmu_gather {
56 	struct mm_struct	*mm;
57 	unsigned int		nr;
58 	unsigned int		max;
59 	unsigned char		fullmm;		/* non-zero means full mm flush */
60 	unsigned char		need_flush;	/* really unmapped some PTEs? */
61 	unsigned long		start, end;
62 	unsigned long		start_addr;
63 	unsigned long		end_addr;
64 	struct page		**pages;
65 	struct page		*local[IA64_GATHER_BUNDLE];
66 };
67 
68 struct ia64_tr_entry {
69 	u64 ifa;
70 	u64 itir;
71 	u64 pte;
72 	u64 rr;
73 }; /*Record for tr entry!*/
74 
75 extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size);
76 extern void ia64_ptr_entry(u64 target_mask, int slot);
77 
78 extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
79 
80 /*
81  region register macros
82 */
83 #define RR_TO_VE(val)   (((val) >> 0) & 0x0000000000000001)
84 #define RR_VE(val)	(((val) & 0x0000000000000001) << 0)
85 #define RR_VE_MASK	0x0000000000000001L
86 #define RR_VE_SHIFT	0
87 #define RR_TO_PS(val)	(((val) >> 2) & 0x000000000000003f)
88 #define RR_PS(val)	(((val) & 0x000000000000003f) << 2)
89 #define RR_PS_MASK	0x00000000000000fcL
90 #define RR_PS_SHIFT	2
91 #define RR_RID_MASK	0x00000000ffffff00L
92 #define RR_TO_RID(val) 	((val >> 8) & 0xffffff)
93 
94 static inline void
95 ia64_tlb_flush_mmu_tlbonly(struct mmu_gather *tlb, unsigned long start, unsigned long end)
96 {
97 	tlb->need_flush = 0;
98 
99 	if (tlb->fullmm) {
100 		/*
101 		 * Tearing down the entire address space.  This happens both as a result
102 		 * of exit() and execve().  The latter case necessitates the call to
103 		 * flush_tlb_mm() here.
104 		 */
105 		flush_tlb_mm(tlb->mm);
106 	} else if (unlikely (end - start >= 1024*1024*1024*1024UL
107 			     || REGION_NUMBER(start) != REGION_NUMBER(end - 1)))
108 	{
109 		/*
110 		 * If we flush more than a tera-byte or across regions, we're probably
111 		 * better off just flushing the entire TLB(s).  This should be very rare
112 		 * and is not worth optimizing for.
113 		 */
114 		flush_tlb_all();
115 	} else {
116 		/*
117 		 * XXX fix me: flush_tlb_range() should take an mm pointer instead of a
118 		 * vma pointer.
119 		 */
120 		struct vm_area_struct vma;
121 
122 		vma.vm_mm = tlb->mm;
123 		/* flush the address range from the tlb: */
124 		flush_tlb_range(&vma, start, end);
125 		/* now flush the virt. page-table area mapping the address range: */
126 		flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
127 	}
128 
129 }
130 
131 static inline void
132 ia64_tlb_flush_mmu_free(struct mmu_gather *tlb)
133 {
134 	unsigned long i;
135 	unsigned int nr;
136 
137 	/* lastly, release the freed pages */
138 	nr = tlb->nr;
139 
140 	tlb->nr = 0;
141 	tlb->start_addr = ~0UL;
142 	for (i = 0; i < nr; ++i)
143 		free_page_and_swap_cache(tlb->pages[i]);
144 }
145 
146 /*
147  * Flush the TLB for address range START to END and, if not in fast mode, release the
148  * freed pages that where gathered up to this point.
149  */
150 static inline void
151 ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
152 {
153 	if (!tlb->need_flush)
154 		return;
155 	ia64_tlb_flush_mmu_tlbonly(tlb, start, end);
156 	ia64_tlb_flush_mmu_free(tlb);
157 }
158 
159 static inline void __tlb_alloc_page(struct mmu_gather *tlb)
160 {
161 	unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0);
162 
163 	if (addr) {
164 		tlb->pages = (void *)addr;
165 		tlb->max = PAGE_SIZE / sizeof(void *);
166 	}
167 }
168 
169 
170 static inline void
171 arch_tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm,
172 			unsigned long start, unsigned long end)
173 {
174 	tlb->mm = mm;
175 	tlb->max = ARRAY_SIZE(tlb->local);
176 	tlb->pages = tlb->local;
177 	tlb->nr = 0;
178 	tlb->fullmm = !(start | (end+1));
179 	tlb->start = start;
180 	tlb->end = end;
181 	tlb->start_addr = ~0UL;
182 }
183 
184 /*
185  * Called at the end of the shootdown operation to free up any resources that were
186  * collected.
187  */
188 static inline void
189 arch_tlb_finish_mmu(struct mmu_gather *tlb,
190 			unsigned long start, unsigned long end, bool force)
191 {
192 	if (force)
193 		tlb->need_flush = 1;
194 	/*
195 	 * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and
196 	 * tlb->end_addr.
197 	 */
198 	ia64_tlb_flush_mmu(tlb, start, end);
199 
200 	/* keep the page table cache within bounds */
201 	check_pgt_cache();
202 
203 	if (tlb->pages != tlb->local)
204 		free_pages((unsigned long)tlb->pages, 0);
205 }
206 
207 /*
208  * Logically, this routine frees PAGE.  On MP machines, the actual freeing of the page
209  * must be delayed until after the TLB has been flushed (see comments at the beginning of
210  * this file).
211  */
212 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
213 {
214 	tlb->need_flush = 1;
215 
216 	if (!tlb->nr && tlb->pages == tlb->local)
217 		__tlb_alloc_page(tlb);
218 
219 	tlb->pages[tlb->nr++] = page;
220 	VM_WARN_ON(tlb->nr > tlb->max);
221 	if (tlb->nr == tlb->max)
222 		return true;
223 	return false;
224 }
225 
226 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
227 {
228 	ia64_tlb_flush_mmu_tlbonly(tlb, tlb->start_addr, tlb->end_addr);
229 }
230 
231 static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
232 {
233 	ia64_tlb_flush_mmu_free(tlb);
234 }
235 
236 static inline void tlb_flush_mmu(struct mmu_gather *tlb)
237 {
238 	ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
239 }
240 
241 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
242 {
243 	if (__tlb_remove_page(tlb, page))
244 		tlb_flush_mmu(tlb);
245 }
246 
247 static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
248 					  struct page *page, int page_size)
249 {
250 	return __tlb_remove_page(tlb, page);
251 }
252 
253 static inline void tlb_remove_page_size(struct mmu_gather *tlb,
254 					struct page *page, int page_size)
255 {
256 	return tlb_remove_page(tlb, page);
257 }
258 
259 /*
260  * Remove TLB entry for PTE mapped at virtual address ADDRESS.  This is called for any
261  * PTE, not just those pointing to (normal) physical memory.
262  */
263 static inline void
264 __tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
265 {
266 	if (tlb->start_addr == ~0UL)
267 		tlb->start_addr = address;
268 	tlb->end_addr = address + PAGE_SIZE;
269 }
270 
271 #define tlb_migrate_finish(mm)	platform_tlb_migrate_finish(mm)
272 
273 #define tlb_start_vma(tlb, vma)			do { } while (0)
274 #define tlb_end_vma(tlb, vma)			do { } while (0)
275 
276 #define tlb_remove_tlb_entry(tlb, ptep, addr)		\
277 do {							\
278 	tlb->need_flush = 1;				\
279 	__tlb_remove_tlb_entry(tlb, ptep, addr);	\
280 } while (0)
281 
282 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address)	\
283 	tlb_remove_tlb_entry(tlb, ptep, address)
284 
285 #define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
286 static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
287 						     unsigned int page_size)
288 {
289 }
290 
291 #define pte_free_tlb(tlb, ptep, address)		\
292 do {							\
293 	tlb->need_flush = 1;				\
294 	__pte_free_tlb(tlb, ptep, address);		\
295 } while (0)
296 
297 #define pmd_free_tlb(tlb, ptep, address)		\
298 do {							\
299 	tlb->need_flush = 1;				\
300 	__pmd_free_tlb(tlb, ptep, address);		\
301 } while (0)
302 
303 #define pud_free_tlb(tlb, pudp, address)		\
304 do {							\
305 	tlb->need_flush = 1;				\
306 	__pud_free_tlb(tlb, pudp, address);		\
307 } while (0)
308 
309 #endif /* _ASM_IA64_TLB_H */
310